Hi Bjorn,
> Subject: Re: [PATCH v2 1/5] PCI/P2PDMA: Don't enforce ACS check for
> functions of same device
>
> On Wed, Oct 30, 2024 at 03:20:02PM -0600, Logan Gunthorpe wrote:
> > On 2024-10-30 12:46, Bjorn Helgaas wrote:
> > > On Fri, Oct 25, 2024 at 06:57:37AM +, Kasireddy, Vivek wrote:
> >
On 2024/10/30 17:17, Vignesh Raman wrote:
We can remove the xfails/update-xfails.py script as it is not
used in CI jobs. Once ci-collate [1] is tested for drm-ci,
we can use this tool directly to update fails and flakes.
[1] https://gitlab.freedesktop.org/gfx-ci/ci-collate/
Signed-off-by: Vign
On 2024/10/29 18:47, Vignesh Raman wrote:
Hi Helen,
On 29/10/24 16:07, Helen Mae Koike Fornazier wrote:
On Thu, 17 Oct 2024 00:39:48 -0300 WangYuli wrote ---
> GitHub Dependabot keeps bugging us about old, vulnerable Python
packages.
>
> Until we figure out a way to make it
On Wed, Oct 23, 2024 at 12:07:58AM -0500, Lucas De Marchi wrote:
On Tue, Oct 22, 2024 at 11:52:10PM +0200, Peter Zijlstra wrote:
On Fri, Oct 18, 2024 at 02:46:31PM -0500, Lucas De Marchi wrote:
I will give this a try with i915 and/or xe.
Less horrible version here:
git://git.kernel.org/pub/
From: Jocelyn Falempe
Virtio gpu supports the drm_panic module, which displays a message to
the screen when a kernel panic occurs.
Signed-off-by: Ryosuke Yasuoka
Signed-off-by: Jocelyn Falempe
---
drivers/gpu/drm/virtio/virtgpu_drv.h | 28 +
drivers/gpu/drm/virtio/virtgpu_plane.c | 161
'smc_fw' is not released when its size is not as expected, causing memory
leak. And when other firmware sizes do not meet expectations, 'err' is
assigned but does not jump to 'out'.
Signed-off-by: Lu Yao
---
drivers/gpu/drm/radeon/ni.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(
Hi Maxime,
On 10/30/2024, Maxime Ripard wrote:
> On Mon, Oct 28, 2024 at 10:37:30AM +0800, Liu Ying wrote:
>> Multiple display modes could be read from a display device's EDID.
>> Use clk_round_rate() to validate the "ldb" clock rate for each mode
>> in drm_bridge_funcs::mode_valid() to filter uns
Hi Maxime,
On 10/22/2024, Maxime Ripard wrote:
> On Tue, Oct 22, 2024 at 02:13:57PM +0800, Liu Ying wrote:
>> On 10/13/2024, Marek Vasut wrote:
>>> On 10/11/24 8:18 AM, Liu Ying wrote:
On 10/11/2024, Marek Vasut wrote:
> On 10/10/24 7:22 AM, Liu Ying wrote:
>> On 10/09/2024, Marek Vas
On 2024/10/30 2:42, Lyude Paul wrote:
> Reviewed-by: Lyude Paul
>
> Will push upstream in a moment
>
Thank you for reviewing.
Thanks,
Huafei
> On Sun, 2024-10-27 at 01:38 +0800, Li Huafei wrote:
>> When the call to gf100_grctx_generate() fails, unlock gr->fecs.mutex
>> before returning the er
On 2024/10/25 8:55 PM, Alex Deucher wrote:
External email: Use caution opening links or attachments
On Fri, Oct 25, 2024 at 3:51 AM Kai-Heng Feng wrote:
On 2024/10/23 11:27 PM, Alex Deucher wrote:
External email: Use caution opening links or attachments
On Tue, Oct 22, 2024 at 9:27 P
All CPU mappings are forced as uncached for Panthor buffer objects when
system(IO) coherency is disabled. Physical backing for Panthor BOs is
allocated by shmem, which clears the pages also after allocation. But
there is no explicit cache flush done after the clearing of pages.
So it could happen t
This commit fixes the potential misalignment between the value of device
tree property "dma-coherent" and default value of COHERENCY_ENABLE
register.
Panthor driver didn't explicitly program the COHERENCY_ENABLE register
with the desired coherency mode. The default value of COHERENCY_ENABLE
registe
Mali GPU Arch spec forbids the GPU PTEs to indicate Inner or Outer
shareability when no_coherency protocol is selected. Doing so results in
unexpected or undesired snooping of the CPU caches on some platforms,
such as Juno FPGA, causing functional issues. For example the boot of
MCU firmware fails
This patch series contains 3 cache coherency related fixes for the
Panthor driver.
- The first fix, regarding the Inner-shareability, is mandatory to
ensure things work on all platforms (including Juno FPGA) when
no_coherency protocol is selected.
- The second fix regarding the coherency featur
GuC to host communication is interrupt driven, the handling has 3
parts: interrupt context, tasklet and request queue worker.
During GuC reset prepare, interrupt is disabled before destroy
contexts steps start. The IRQ and worker flushed to finish
in progress message handling if there are. The task
On Wed, Oct 30, 2024 at 03:20:02PM -0600, Logan Gunthorpe wrote:
> On 2024-10-30 12:46, Bjorn Helgaas wrote:
> > On Fri, Oct 25, 2024 at 06:57:37AM +, Kasireddy, Vivek wrote:
> > In the PCIe world, I don't think a TLP can "loop back" to another
> > function on the same device.
>
> I'm not sure
On 2024-10-30 12:46, Bjorn Helgaas wrote:
> On Fri, Oct 25, 2024 at 06:57:37AM +, Kasireddy, Vivek wrote:
> In the PCIe world, I don't think a TLP can "loop back" to another
> function on the same device.
I'm not sure if the spec says anything that specifically denies this.
But it seems to
On Wed, Oct 30, 2024 at 10:28 AM Adam Ford wrote:
>
> On Wed, Oct 30, 2024 at 4:01 AM Frieder Schrempf
> wrote:
> >
> > Hi Johannes,
> >
> > On 25.10.24 10:05 AM, mailingli...@johanneskirchmair.de wrote:
> > > [Sie erhalten nicht häufig E-Mails von mailingli...@johanneskirchmair.de.
> > > Weiter
On Thu, Oct 31, 2024 at 12:45:24AM +0800, Sui Jingfeng wrote:
> Hi,
>
> On 2024/10/18 23:43, Dmitry Baryshkov wrote:
> > On Fri, Oct 18, 2024 at 03:49:34PM +0300, Abel Vesa wrote:
> >> The assignment of the of_node to the aux bridge needs to mark the
> >> of_node as reused as well, otherwise resou
On Mon, Oct 28, 2024 at 4:14 PM Ian Forbes wrote:
>
> We replaced our custom list of resolutions with the noedid list, which is
> based on the VESA DMT standard, in the referenced fixes commit. The reason
> for this was that the user can technically set any resolution they want by
> using Autofit
On 10/30/2024 3:48 AM, Dmitry Baryshkov wrote:
On Tue, Oct 29, 2024 at 02:30:12PM -0700, Abhinav Kumar wrote:
On 10/24/2024 5:20 PM, Dmitry Baryshkov wrote:
Only several SSPP blocks support such features as YUV output or scaling,
thus different DRM planes have different features. Properly
On Fri, Oct 25, 2024 at 06:57:37AM +, Kasireddy, Vivek wrote:
> > Subject: Re: [PATCH v2 1/5] PCI/P2PDMA: Don't enforce ACS check for
> > functions of same device
> >
> > On Thu, Oct 24, 2024 at 05:58:48AM +, Kasireddy, Vivek wrote:
> > > > Subject: Re: [PATCH v2 1/5] PCI/P2PDMA: Don't enf
The hardware can be shared among multiple user applications. The
hardware resources are allocated/freed based on the request from
user application via driver IOCTLs.
DRM_IOCTL_AMDXDNA_CREATE_HWCTX
Allocate tile columns and create a hardware context structure to track the
usage and status of the re
On Wed, Oct 30, 2024 at 12:43:19PM +0100, Michał Winiarski wrote:
> On Mon, Oct 28, 2024 at 11:56:04AM -0500, Bjorn Helgaas wrote:
> > On Fri, Oct 25, 2024 at 11:50:36PM +0200, Michał Winiarski wrote:
> > > VF MMIO resource reservation, either created by system firmware and
> > > inherited by Linux
On 24.10.24 14:41, Christian König wrote:
The merge function initially handled only individual fences and
arrays which in turn were created by the merge function. This allowed
to create the new array by a simple merge sort based on the fence
context number.
The problem is now that since the addi
Hi,
On Wed, Oct 30, 2024 at 12:24 AM Tejas Vipin wrote:
>
> On 10/29/24 12:24 AM, Doug Anderson wrote:
> > Hi,
> >
> > On Fri, Oct 25, 2024 at 9:00 PM Tejas Vipin wrote:
> >>
> >> @@ -418,79 +398,42 @@ static const struct ltk050h3146w_desc
> >> ltk050h3146w_data = {
> >> MIPI_DS
On Wed, Oct 30, 2024 at 4:01 AM Frieder Schrempf
wrote:
>
> Hi Johannes,
>
> On 25.10.24 10:05 AM, mailingli...@johanneskirchmair.de wrote:
> > [Sie erhalten nicht häufig E-Mails von mailingli...@johanneskirchmair.de.
> > Weitere Informationen, warum dies wichtig ist, finden Sie unter
> > https:
Hi,
On 2024/10/18 23:43, Dmitry Baryshkov wrote:
On Fri, Oct 18, 2024 at 03:49:34PM +0300, Abel Vesa wrote:
The assignment of the of_node to the aux bridge needs to mark the
of_node as reused as well, otherwise resource providers like pinctrl will
report a gpio as already requested by a differe
On 30/10/2024 08:24, Tejas Vipin wrote:
On 10/29/24 12:24 AM, Doug Anderson wrote:
Hi,
On Fri, Oct 25, 2024 at 9:00 PM Tejas Vipin wrote:
@@ -418,79 +398,42 @@ static const struct ltk050h3146w_desc ltk050h3146w_data =
{
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET,
}
The AI Engine consists of 2D array of tiles arranged as columns. Provides
the basic column allocation and release functions for the tile columns.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Reviewed-by: Jeffrey Hugo
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/Makefile | 1
Add GET_INFO ioctl to retrieve hardware information, including
AIE, clock, hardware context etc.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Reviewed-by: Jeffrey Hugo
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_message.c| 65 +++
drivers/accel/amdxdna/aie2_pci.c
There different types of BOs are supported:
- shmem
A user application uses shmem BOs as input/output for its workload running
on NPU.
- device memory heap
The fixed size buffer dedicated to the device.
- device buffer
The buffer object allocated from device memory heap.
- command buffer
The bu
Implement PCI power management suspend and resume callbacks.
Co-developed-by: Narendra Gutta
Signed-off-by: Narendra Gutta
Co-developed-by: Xiaoming Ren
Signed-off-by: Xiaoming Ren
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Reviewed-by: Jeffrey Hugo
Signed-off-by: Lizhi Hou
---
drivers
AMD NPU (Neural Processing Unit) is a multi-user AI inference accelerator
integrated into AMD client APU. NPU enables efficient execution of Machine
Learning applications like CNN, LLM, etc. NPU is based on AMD XDNA
Architecture. NPU is managed by amdxdna driver.
Co-developed-by: Sonal Santan
Sig
When there is a hardware error, the NPU firmware notifies the host through
a mailbox message. The message includes details of the error, such as the
tile and column indexes where the error occurred.
The driver starts a thread to handle the NPU error message. The thread
stops the clients which are
Add interfaces for user application to submit command and wait for its
completion.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_ctx.c | 664 +-
drivers/accel/amdxdna/aie2_message.c | 343 +
d
AMD AI Engine forms the core of AMD NPU and can be used for accelerating
machine learning applications.
Add the driver to support AI Engine integrated to AMD CPU.
Only very basic functionalities are added.
- module and PCI device initialization
- firmware load
- power up
- low level hardwa
The hardware mailboxes are used by the driver to submit requests to
firmware and receive the completion notices from hardware.
Initially, a management mailbox channel is up and running. The driver may
request firmware to create/destroy more channels dynamically through
management channel.
Add dri
This patchset introduces a new Linux Kernel Driver, amdxdna for AMD NPUs.
The driver is based on Linux accel subsystem.
NPU (Neural Processing Unit) is an AI inference accelerator integrated
into AMD client CPUs. NPU enables efficient execution of Machine Learning
applications like CNNs, LLMs, etc
On Thu, 24 Oct 2024 15:54:29 +0100
Akash Goel wrote:
> This patch series contains 3 cache coherency related fixes for the
> Panthor driver.
> - The first fix, regarding the Inner-shareability, is mandatory to
> ensure things work on all platforms (including Juno FPGA) when
> no_coherency prot
On 14/10/24 - 11:50, Maíra Canal wrote:
> I haven't been able to properly review the work on the driver for a while.
> Hence, this commit removes me from the maintainers list.
>
> Signed-off-by: Maíra Canal
Acked-by: Louis Chauvet
Thanks,
Louis Chauvet
> ---
> MAINTAINERS | 1 -
> 1 file cha
On Tue, 29 Oct 2024 16:29:09 +0100
Boris Brezillon wrote:
> Hello,
>
> What initially started as a simple fix to avoid queueing jobs to a group
> that can't be scheduled has turned into a series of three patches
> improving the group state reporting. Two of them are actual fixes, the
> last one
On Wed, 30 Oct 2024 16:02:31 +0100
Boris Brezillon wrote:
> The system and GPU MMU page size might differ, which becomes a
> problem for FW sections that need to be mapped at explicit addresses
> since our PAGE_SIZE alignment might cover a VA range that's
> expected to be used for another section
On Wed, 9 Oct 2024 22:43:30 +0100
Adrián Larumbe wrote:
> Fix Panthor documentation build errors uncovered by the makedocs target
> when building with extra warnings enabled.
>
> Signed-off-by: Adrián Larumbe
> Fixes: f25044688b04 ("drm/panthor: add sysfs knob for enabling job profiling")
Que
On 10/30/24 09:33, Thomas Zimmermann wrote:
Hi
Am 29.10.24 um 21:42 schrieb Helge Deller:
Hi Thomas,
On 10/28/24 09:41, Thomas Zimmermann wrote:
Am 25.10.24 um 17:37 schrieb Helge Deller:
On 10/25/24 11:25, Gonzalo Silvalde Blanco wrote:
The fb_udl driver currently depends on CONFIG_FB_DEVI
On Wed, 30 Oct 2024 16:13:58 +0100
Boris Brezillon wrote:
> On Thu, 3 Oct 2024 14:30:29 +0100
> Adrián Larumbe wrote:
>
> > Make sure in case of errors between the first fetch of an OPP in
> > panthor_devfreq_init and its successive put, the error path decrements its
> > reference count to avo
On Thu, 3 Oct 2024 14:30:29 +0100
Adrián Larumbe wrote:
> Make sure in case of errors between the first fetch of an OPP in
> panthor_devfreq_init and its successive put, the error path decrements its
> reference count to avoid OPP object leaks when removing the device.
>
> Signed-off-by: Adrián
The system and GPU MMU page size might differ, which becomes a
problem for FW sections that need to be mapped at explicit addresses
since our PAGE_SIZE alignment might cover a VA range that's
expected to be used for another section.
Make sure we never map more than we need.
Changes in v3:
- Add R
Hi,
On 2024/10/21 21:08, Neil Armstrong wrote:
Hi,
On Fri, 18 Oct 2024 15:49:34 +0300, Abel Vesa wrote:
The assignment of the of_node to the aux bridge needs to mark the
of_node as reused as well, otherwise resource providers like pinctrl will
report a gpio as already requested by a different
Am 25.10.24 um 08:52 schrieb Friedrich Vock:
On 24.10.24 22:29, Matthew Brost wrote:
On Thu, Oct 24, 2024 at 02:41:57PM +0200, Christian König wrote:
Reports indicates that some userspace applications try to merge more
than
80k of fences into a single dma_fence_array leading to a warning from
Hi,
On 30/10/2024 06:51, Saravana Kannan wrote:
On Tue, Oct 29, 2024 at 4:21 AM Tomi Valkeinen
wrote:
Hi,
On 28/10/2024 22:39, Saravana Kannan wrote:
On Mon, Oct 28, 2024 at 1:06 AM Tomi Valkeinen
wrote:
Hi,
On 26/10/2024 07:52, Saravana Kannan wrote:
In attempting to optimize fw_devli
On Tue, Oct 29, 2024 at 05:19:33PM +0100, Boris Brezillon wrote:
> On Tue, 29 Oct 2024 16:29:12 +0100
> Boris Brezillon wrote:
>
> > Groups can be killed during a reset even though they did nothing wrong.
> > That usually happens when the FW is put in a bad state by other groups,
> > resulting in
On 29/10/2024 16:19, Boris Brezillon wrote:
> On Tue, 29 Oct 2024 16:29:12 +0100
> Boris Brezillon wrote:
>
>> Groups can be killed during a reset even though they did nothing wrong.
>> That usually happens when the FW is put in a bad state by other groups,
>> resulting in group suspension failur
Hi Matthias,
On 29/10/24 08:24, matthias@kernel.org wrote:
From: Matthias Brugger
Function drm_gem_shmem_create_with_mnt() creates an object
without using the mountpoint if gemfs is NULL.
Drop the else branch calling drm_gem_shmem_create().
Signed-off-by: Matthias Brugger
Applied to m
Hi,
Below issue was seen with drm-ci testing,
Pipeline: https://gitlab.freedesktop.org/vigneshraman/linux/-/jobs/65859386
Linux version: 6.12-rc2
Branch: drm-misc-next
DEBUG - Begin test testdisplay
[ 1229.996702] INFO: task testdisplay:2546 blocked for more than 122
seconds.
[ 1229.997303]
Hi Sean,
On 28/10/2024 17:04, Tomi Valkeinen wrote:
Hi,
On 25/10/2024 17:58, Sean Anderson wrote:
Hi Tomi,
On 10/3/24 10:53, Sean Anderson wrote:
On 10/2/24 10:50, Tomi Valkeinen wrote:
Hi,
On 01/10/2024 21:31, Sean Anderson wrote:
On 8/9/24 15:35, Sean Anderson wrote:
This series cleans
Hi,
On 28/10/2024 15:42, Steffen Dirkwinkel wrote:
From: Steffen Dirkwinkel
drm_kms_helper_poll_init needs to be called after zynqmp_dpsub_kms_init.
zynqmp_dpsub_kms_init creates the connector and without it we don't
enable hotplug detection.
Fixes: eb2d64bfcc17 ("drm: xlnx: zynqmp_dpsub: Rep
Hi,
On 28/10/2024 15:39, Steffen Dirkwinkel wrote:
From: Steffen Dirkwinkel
layer->info can be null if we have an error on the first layer in
zynqmp_disp_create_layers
Fixes: 1836fd5ed98d ("drm: xlnx: zynqmp_dpsub: Minimize usage of global flag")
Signed-off-by: Steffen Dirkwinkel
---
drive
On Mon, Oct 28, 2024 at 11:56:04AM -0500, Bjorn Helgaas wrote:
> On Fri, Oct 25, 2024 at 11:50:36PM +0200, Michał Winiarski wrote:
> > VF MMIO resource reservation, either created by system firmware and
> > inherited by Linux PCI subsystem or created by the subsystem itself,
> > should contain enou
On Tue, Oct 29, 2024 at 02:30:12PM -0700, Abhinav Kumar wrote:
>
>
> On 10/24/2024 5:20 PM, Dmitry Baryshkov wrote:
> > Only several SSPP blocks support such features as YUV output or scaling,
> > thus different DRM planes have different features. Properly utilizing
> > all planes requires the a
On Mon, Oct 28, 2024 at 10:37:30AM +0800, Liu Ying wrote:
> Multiple display modes could be read from a display device's EDID.
> Use clk_round_rate() to validate the "ldb" clock rate for each mode
> in drm_bridge_funcs::mode_valid() to filter unsupported modes out.
>
> Also, since this driver does
On Wed, Oct 30, 2024 at 11:25:40AM +0100, Geert Uytterhoeven wrote:
> On Mon, Oct 28, 2024 at 2:34 PM Dmitry Baryshkov wrote:
> > On Tue, Oct 22, 2024 at 07:37:01AM -0700, Doug Anderson wrote:
> > > On Tue, Oct 22, 2024 at 12:12 AM Geert Uytterhoeven wrote:
> > > > > > > > > However, using i2c_clie
Hi Dmitry,
On Mon, Oct 28, 2024 at 2:34 PM Dmitry Baryshkov
wrote:
> On Tue, Oct 22, 2024 at 07:37:01AM -0700, Doug Anderson wrote:
> > On Tue, Oct 22, 2024 at 12:12 AM Geert Uytterhoeven
> > wrote:
> > > > > > > > However, using i2c_client->adapter->nr instead of ida_alloc()
> > > > > > > > in
On Tue, Oct 29, 2024 at 03:07:30PM -0700, Abhinav Kumar wrote:
>
>
> On 10/24/2024 5:20 PM, Dmitry Baryshkov wrote:
> > Virtual wide planes give high amount of flexibility, but it is not
> > always enough:
> >
> > In parallel multirect case only the half of the usual width is supported
> > for t
Applied to drm-mic-next
On 10/17/2024 4:58 PM, Jacek Lawrynowicz wrote:
> - Remove support for deprecated and unused copy engine
> - Improved open() performance by lazy allocating MMU page tables
> - Error handling fixes in MMU code
> - Extend VPU address ranges to allow bigger workloads
>
>
Applied to drm-misc-fixes
On 10/17/2024 4:49 PM, Jacek Lawrynowicz wrote:
> From: Andrzej Kacprowski
>
> The NOC firewall interrupt means that the HW prevented
> unauthorized access to a protected resource, so there
> is no need to trigger device reset in such case.
>
> To facilitate security t
We can remove the xfails/update-xfails.py script as it is not
used in CI jobs. Once ci-collate [1] is tested for drm-ci,
we can use this tool directly to update fails and flakes.
[1] https://gitlab.freedesktop.org/gfx-ci/ci-collate/
Signed-off-by: Vignesh Raman
---
drivers/gpu/drm/ci/xfails/req
On Wed, Oct 30, 2024 at 03:30:34AM +, CK Hu (胡俊光) wrote:
> Hi, Chen-yu:
>
> On Tue, 2024-10-29 at 19:13 +0800, Chen-Yu Tsai wrote:
> > External email : Please do not click links or open attachments until you
> > have verified the sender or the content.
> >
> >
> > The recent attempt to make
Hi Dmitry Baryshkov,
> -Original Message-
> From: Dmitry Baryshkov
> Sent: 30 October 2024 03:17
> Subject: Re: [PATCH v4 00/13] Add ITE IT6263 LVDS to HDMI converter support
>
> On Tue, 29 Oct 2024 at 04:41, Liu Ying wrote:
> >
> > On 10/28/2024, Dmitry Baryshkov wrote:
> > > On Mon, O
Hi Johannes,
On 25.10.24 10:05 AM, mailingli...@johanneskirchmair.de wrote:
> [Sie erhalten nicht häufig E-Mails von mailingli...@johanneskirchmair.de.
> Weitere Informationen, warum dies wichtig ist, finden Sie unter
> https://aka.ms/LearnAboutSenderIdentification ]
>
> Hey,
> We had some prob
On Wed, Oct 30, 2024 at 4:48 PM CK Hu (胡俊光) wrote:
>
> On Wed, 2024-10-30 at 09:25 +0100, mrip...@kernel.org wrote:
> > On Wed, Oct 30, 2024 at 03:30:34AM +, CK Hu (胡俊光) wrote:
> > > Hi, Chen-yu:
> > >
> > > On Tue, 2024-10-29 at 19:13 +0800, Chen-Yu Tsai wrote:
> > > > External email : Please
acpi_evaluate_object() may return AE_NOT_FOUND (failure), which
would result in dereferencing buffer.pointer (obj) while being NULL.
Bail out also when status is AE_NOT_FOUND with a proper error message.
This fixes 1 FORWARD_NULL issue reported by Coverity
Report: CID 1600951: Null pointer deref
Hi
Am 29.10.24 um 21:42 schrieb Helge Deller:
Hi Thomas,
On 10/28/24 09:41, Thomas Zimmermann wrote:
Am 25.10.24 um 17:37 schrieb Helge Deller:
On 10/25/24 11:25, Gonzalo Silvalde Blanco wrote:
The fb_udl driver currently depends on CONFIG_FB_DEVICE to create
sysfs
entries and access framebu
This series adds support for Adreno 663 gpu found in SA8775P chipsets.
The closest gpu which is currently supported in drm-msm is A660.
Following are the major differences with that:
1. gmu/zap firmwares
2. Recommended to disable Level2 swizzling
Verified kmscube/weston/glmark2-es2
On 10/29/24 12:24 AM, Doug Anderson wrote:
> Hi,
>
> On Fri, Oct 25, 2024 at 9:00 PM Tejas Vipin wrote:
>>
>> @@ -418,79 +398,42 @@ static const struct ltk050h3146w_desc
>> ltk050h3146w_data = {
>> MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET,
>> };
>>
>> -static int ltk05
From: Puranam V G Tejaswi
Add gpu and gmu nodes for sa8775p chipset. As of now all
SKUs have the same GPU fmax, so there is no requirement of
speed bin support.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
Reviewed-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sa8775p
From: Puranam V G Tejaswi
Enable GPU for sa8775p-ride platform and provide path for zap
shader.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
Reviewed-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 8
1 file changed, 8 insertions(+)
diff --
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