On Sun, Oct 06, 2024 at 08:42:49PM +, Alain Volmat wrote:
> ST STiH410 SoC has a Mali400. Add a compatible for it.
>
> Signed-off-by: Alain Volmat
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Krzysztof Kozlowski
Best
On Mon, Oct 07, 2024 at 10:28:34AM +0800, Moudy Ho wrote:
> The display node in mt8195.dtsi was triggering a CHECK_DTBS error due
> to an excessively long 'clocks' property:
> display@14f06000: clocks: [[31, 14], [31, 43], [31, 44]] is too long
>
> To resolve this issue, the constraints for 'clo
When (mode->clock * 1000) is larger than (1<<31), int to unsigned long
conversion will sign extend the int to 64 bits and the pclk_rate value
will be incorrect.
Fix this by making the result of the multiplication unsigned.
Note that above (1<<32) would still be broken and require more changes, bu
drm_mode_vrefresh() can introduce a large rounding error, avoid it.
Fixes: 7c9e4a554d4a ("drm/msm/dsi: Reduce pclk rate for compression")
Signed-off-by: Jonathan Marek
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/d
On 10/4/24 10:50, Jeffrey Hugo wrote:
On 9/11/2024 12:05 PM, Lizhi Hou wrote:
diff --git a/drivers/accel/amdxdna/aie2_ctx.c
b/drivers/accel/amdxdna/aie2_ctx.c
new file mode 100644
index ..52a71661f887
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_ctx.c
@@ -0,0 +1,186 @@
+// SPDX-
Thank you. I am looking at the problem now.
On Mon, Oct 7, 2024 at 1:37 AM Christophe Leroy
wrote:
>
>
>
> Le 06/10/2024 à 18:56, Christian Zigotzky a écrit :
> > On 03 October 2024 at 08:06 am, Wu Hoi Pok wrote:
> >> This is a fix patch not tested yet,
> >> for a bug I introduce in previous rewo
On 10/4/24 10:34, Jeffrey Hugo wrote:
On 9/11/2024 12:05 PM, Lizhi Hou wrote:
+struct create_ctx_req {
+ __u32 aie_type;
+ __u8 start_col;
+ __u8 num_col;
+ __u16 reserved;
+ __u8 num_cq_pairs_requested;
+ __u8 reserved1;
+ __u16 pasid;
+ __u32 p
On 10/4/24 10:21, Jeffrey Hugo wrote:
On 9/11/2024 12:05 PM, Lizhi Hou wrote:
diff --git a/drivers/accel/amdxdna/aie2_pci.c
b/drivers/accel/amdxdna/aie2_pci.c
new file mode 100644
index ..e21b32557fc2
--- /dev/null
+++ b/drivers/accel/amdxdna/aie2_pci.c
@@ -0,0 +1,183 @@
+// SPDX-
On 06 October 2024 at 8:01pm, Christian Zigotzky wrote:
On 06 October 2024 at 7:37pm, Christophe Leroy wrote:
Le 06/10/2024 à 18:56, Christian Zigotzky a écrit :
Hello Wu Hoi Pok,
Thanks a lot for your patch. Unfortunately there is a new issue
after patching the RC1. Could you please fix the
Hi Shuah and Advait,
On 05/10/24 12:41 am, Shuah Khan wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know
> the content is safe
>
> On 10/4/24 09:08, Advait Dhamorikar wrote:
>> atmel_hlcdc_plane_update_buffers: may use an uninitialized
>> sr variable when the if cond
The display node in mt8195.dtsi was triggering a CHECK_DTBS error due
to an excessively long 'clocks' property:
display@14f06000: clocks: [[31, 14], [31, 43], [31, 44]] is too long
To resolve this issue, the constraints for 'clocks' and
other properties within the subschemas will be reinforced.
2024년 9월 26일 (목) 오후 2:33, Kwanghoon Son 님이 작성:
>
> exynos_drm_crtc_wait_pending_update, exynos_drm_crtc_finish_update
> are not used anymore.
Merged.
Thanks,
Inki Dae
>
> Signed-off-by: Kwanghoon Son
> ---
> drivers/gpu/drm/exynos/exynos_drm_crtc.h | 3 ---
> 1 file changed, 3 deletions(-)
>
>
2024년 9월 9일 (월) 오후 5:08, Shen Lichuan 님이 작성:
>
> Replace 'initailization' with 'initialization' in the comment.
>
> Signed-off-by: Shen Lichuan
> ---
> drivers/gpu/drm/exynos/exynos_drm_gsc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_dr
Add support for the monochrome Sharp Memory LCDs.
Co-developed-by: Mehdi Djait
Signed-off-by: Mehdi Djait
Signed-off-by: Alex Lanzano
Reviewed-by: Dmitry Baryshkov
---
MAINTAINERS | 6 +
drivers/gpu/drm/tiny/Kconfig| 20 +
drivers/gpu/drm/tiny/Makefile
Add device tree bindings for the monochrome Sharp Memory LCD
Co-developed-by: Mehdi Djait
Signed-off-by: Mehdi Djait
Signed-off-by: Alex Lanzano
Reviewed-by: Krzysztof Kozlowski
---
.../bindings/display/sharp,ls010b7dh04.yaml | 92 +++
1 file changed, 92 insertions(+)
creat
This patch series add support for the monochrome Sharp Memory LCD
panels. This series is based off of the work done by Mehdi Djait.
References:
https://lore.kernel.org/dri-devel/71a9dbf4609dbba46026a31f60261830163a0b99.1701267411.git.mehdi.dj...@bootlin.com/
https://www.sharpsde.com/fileadmin/prod
se: next-20241003
patch link:
https://lore.kernel.org/r/20241003111851.10453-6-ville.syrjala%40linux.intel.com
patch subject: [PATCH v2 05/10] drm/armada: Allow build with COMPILE_TEST=y
config: csky-randconfig-r121-20241006
(https://download.01.org/0day-ci/archive/20241007/20241007073
On Mon, Sep 30, 2024 at 08:35:59PM GMT, Barnabás Czémán wrote:
> From: Dmitry Baryshkov
>
> Add support for MSM8917, which has MDP5 v1.15. It looks like
> trimmed down version of MSM8937. Even fewer PP, LM and no DSI1.
>
> Signed-off-by: Dmitry Baryshkov
> [Remove intr_start from CTLs config, r
On Mon, Sep 30, 2024 at 08:35:58PM GMT, Barnabás Czémán wrote:
> From: Dmitry Baryshkov
>
> Add support for MSM8937, which has MDP5 v1.14. It looks like
> trimmed down version of MSM8996. Less SSPP, LM and PP blocks. No DSC,
> etc.
>
> Signed-off-by: Dmitry Baryshkov
> [Remove intr_start from C
On Mon, Sep 30, 2024 at 08:35:57PM GMT, Barnabás Czémán wrote:
> From: Dmitry Baryshkov
>
> Add support for MSM8953, which has MDP5 v1.16. It looks like
> trimmed down version of MSM8996. Less SSPP, LM and PP blocks. No DSC,
> etc.
>
> Signed-off-by: Dmitry Baryshkov
> [Remove intr_start from C
On Mon, Sep 30, 2024 at 08:35:56PM GMT, Barnabás Czémán wrote:
> From: Konrad Dybcio
>
> Add support for MSM8996, which - fun fact - was the SoC that this driver
> (or rather SDE, its downstream origin) was meant for and first tested on.
>
> It has some hardware that differs from the modern SoCs
On Tue, Oct 01, 2024 at 12:11:40PM GMT, Mahadevan via B4 Relay wrote:
> From: Mahadevan
>
> Add devicetree changes to enable MDSS0 display-subsystem its
> display-controller(DPU) for Qualcomm SA8775P platform.
>
> Signed-off-by: Mahadevan
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 89
> +
On Tue, Oct 01, 2024 at 12:11:39PM GMT, Mahadevan via B4 Relay wrote:
> From: Mahadevan
>
> Add definitions for the display hardware used on the
> Qualcomm SA8775P platform.
>
> Reviewed-by: Dmitry Baryshkov
> Signed-off-by: Mahadevan
> ---
> .../drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h
On Tue, Oct 01, 2024 at 12:11:38PM GMT, Mahadevan via B4 Relay wrote:
> From: Mahadevan
>
> Add Mobile Display Subsystem (MDSS) support for the SA8775P platform.
>
> Signed-off-by: Mahadevan
> ---
> drivers/gpu/drm/msm/msm_mdss.c | 11 +++
> 1 file changed, 11 insertions(+)
>
Reviewe
Enable the GPU on the stih410-b2260 board.
Signed-off-by: Alain Volmat
---
arch/arm/boot/dts/st/stih410-b2260.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/st/stih410-b2260.dts
b/arch/arm/boot/dts/st/stih410-b2260.dts
index
240b6204b8c0357d39504d3475186958bf
Add the entry for the GPU (Mali400) on the stih410.dtsi
Signed-off-by: Alain Volmat
---
arch/arm/boot/dts/st/stih410.dtsi | 34 ++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/st/stih410.dtsi
b/arch/arm/boot/dts/st/stih410.dtsi
index
a6923185
ST STiH410 SoC has a Mali400. Add a compatible for it.
Signed-off-by: Alain Volmat
---
Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml
b/Documentation/devicetree/bindings/gp
This series adds necessary node within the stih410.dtsi for
the MALI400 GPU and enable the GPU on the stih410-b2260
board.
For that purpose and since the MALI400 GPU is available on
the STi platform (stih410 / stih418), a new st,sti-mali
compatible is also added within the mali bindings.
Signed-of
Hi Krzysztof,
On Sun, Oct 06, 2024 at 02:45:43PM +0200, Krzysztof Kozlowski wrote:
> On Sat, Oct 05, 2024 at 06:07:59PM +, Alain Volmat wrote:
> > ST STi SoC family (stih410, stih418) has a Mali400.
> > Add a compatible for it.
> >
> > Signed-off-by: Alain Volmat
> > ---
> > Documentation/d
On Fri, Oct 04, 2024 at 04:00:46PM GMT, Soutrik Mukhopadhyay wrote:
> The Qualcomm SA8775P platform comes with 2 DisplayPort controllers
> for each mdss, having different base offsets than the previous
> SoCs. The support for all 4 DPTX have been added here, and
> validation of only MDSS0 DPTX0 and
On Fri, Oct 04, 2024 at 07:01:20PM GMT, Vignesh Raman wrote:
> Add job that executes the IGT test suite for sm8350-hdk.
>
> Signed-off-by: Vignesh Raman
> ---
> drivers/gpu/drm/ci/arm64.config | 7 +-
> drivers/gpu/drm/ci/build.sh | 1 +
> drivers/gpu/drm/ci/t
Add support for MIPI-DSI based S6E3HA8 AMOLED panel
driver. This panel has 1440x2960 resolution, 5.8-inch physical
size, and can be found in starqltechn device.
Brightness regulation is not yet supported.
Reviewed-by: Neil Armstrong
Signed-off-by: Dzmitry Sankouski
---
Changes for v6:
- return c
Add binding for the Samsung s6e3ha8 panel found in the Samsung S9.
Reviewed-by: Conor Dooley
Signed-off-by: Dzmitry Sankouski
---
Changes for v5:
- fix required properties order
- fix example indentation
Changes in v4:
- change dts example intendation from tabs
to spaces
- remove reset-gpios d
mipi_dsi_compression_mode_multi can help with
error handling.
Signed-off-by: Dzmitry Sankouski
---
drivers/gpu/drm/drm_mipi_dsi.c | 16
include/drm/drm_mipi_dsi.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mi
The s6e3ha8 is a 1440x2960 DPI AMOLED display panel from Samsung Mobile
Displays (SMD)
Signed-off-by: Dzmitry Sankouski
---
Changes in v6:
- add new patch with mipi_dsi_compression_mode_multi function
- Link to v5:
https://lore.kernel.org/r/20240926-starqltechn_integration_upstream-v5-0-1cb0e4
On 06 October 2024 at 7:37pm, Christophe Leroy wrote:
Le 06/10/2024 à 18:56, Christian Zigotzky a écrit :
Hello Wu Hoi Pok,
Thanks a lot for your patch. Unfortunately there is a new issue after
patching the RC1. Could you please fix the following issue?
Thanks,
Christian
---
Linux fienix
>buffer);
---
base-commit: 98f7e32f20d28ec452afb208f9cffc08448a2652
change-id: 20241006-drm_fbdev_dma_deferred_io_cleanup-de87ee345dbc
Best regards,
--
Janne Grunau
Le 06/10/2024 à 18:56, Christian Zigotzky a écrit :
On 03 October 2024 at 08:06 am, Wu Hoi Pok wrote:
This is a fix patch not tested yet,
for a bug I introduce in previous rework of radeon driver.
The bug is a null dereference in 'aux.dev', which is the
'device' not registered, resulting in k
On Sat, Oct 05, 2024 at 10:38:10AM GMT, Jonathan Marek wrote:
> When (mode->clock * 1000) is larger than (1<<31), int to unsigned long
> conversion will sign extend the int to 64 bits and the pclk_rate value
> will be incorrect.
>
> Fix this by making the result of the multiplication unsigned.
>
On Sat, Oct 05, 2024 at 10:38:09AM GMT, Jonathan Marek wrote:
> drm_mode_vrefresh() can introduce a large rounding error, avoid it.
>
Fixes?
> Signed-off-by: Jonathan Marek
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/driv
On 03 October 2024 at 08:06 am, Wu Hoi Pok wrote:
This is a fix patch not tested yet,
for a bug I introduce in previous rework of radeon driver.
The bug is a null dereference in 'aux.dev', which is the
'device' not registered, resulting in kernel panic. By having
'late_register', the connector sh
On Fri, 4 Oct 2024 at 12:30, Soutrik Mukhopadhyay
wrote:
>
> This series adds support for the DisplayPort controller
> and eDP PHY v5 found on the Qualcomm SA8775P platform.
>
> ---
> v2: Fixed review comments from Dmitry and Bjorn
> - Made aux_cfg array as const.
> - Reused edp_sw
On Sat, Oct 05, 2024 at 06:07:59PM +, Alain Volmat wrote:
> ST STi SoC family (stih410, stih418) has a Mali400.
> Add a compatible for it.
>
> Signed-off-by: Alain Volmat
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --gi
Fix typos in comments: "wether -> whether".
Signed-off-by: Andrew Kreimer
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
drivers/gpu/drm/amd/amdg
Fix the indentation to ensure consistent code style and improve
readability, and to fix this warning:
drivers/video/fbdev/nvidia/nv_hw.c:1512 NVLoadStateExt() warn:
inconsistent indenting
Signed-off-by: SurajSonawane2415
---
drivers/video/fbdev/nvidia/nv_hw.c | 8
1 file changed, 4 inse
On 5.10.2024 4:38 PM, Jonathan Marek wrote:
> drm_mode_vrefresh() can introduce a large rounding error, avoid it.
>
> Signed-off-by: Jonathan Marek
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_hos
These warnings/errors are reported by checkpatch.
Fix them with minor changes to make it clean.
No other functional changes.
WARNING: Block comments use * on subsequent lines
+ /* only support discovering the end of the buffer,
+ but also allow SEEK_SET to maintain the idiomatic
WA
> There is no need to call the dev_err() function directly to print a
> custom message when handling an error from platform_get_irq() function
> as it is going to display an appropriate error message in case of a
> failure.
Can such a change description become a bit nicer with an additional
impera
From: Yassine Oudjana
On 05/10/2024 12:52 pm, Jason-JH.Lin wrote:
If the constant alpha always set, the SoCs that is not supported the
ignore alpha bit will still use constant alpha. That will break the
original constant alpha setting of XRGB foramt for blend_modes
unsupported SoCs, such as MT8
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