Hi Sean and the vkms maintainers:
I’m Leo, currently one of the mentees of the Linux Kernel Bug Fixing
Program 2024 Summer Unpaid[1]. I saw an item on the DRM TODO list
regarding "Convert logging to drm_* functions with drm_device
parameter"[2]. It also suggests reaching out to the driver maintain
From: Alvin Lee
commit 8a0f02b7beed7b2b768dbdf3b79960de68f460c5 upstream.
[Why]
There is some logic error where the wrong variable was used to check for
OTG_MASTER and DPP_PIPE.
[How]
Add booleans to confirm that the expected pipes were found before
validating schedulability.
Tested-by: Daniel
From: Alvin Lee
commit 8a0f02b7beed7b2b768dbdf3b79960de68f460c5 upstream.
[Why]
There is some logic error where the wrong variable was used to check for
OTG_MASTER and DPP_PIPE.
[How]
Add booleans to confirm that the expected pipes were found before
validating schedulability.
Tested-by: Daniel
On Tue, Sep 17, 2024 at 10:11:05AM +0530, Ghimiray, Himal Prasad wrote:
> On 17-09-2024 09:32, Raag Jadav wrote:
> > This was previously attempted as xe specific reset uevent but dropped
> > in commit 77a0d4d1cea2 ("drm/xe/uapi: Remove reset uevent for now")
> > as part of refactoring.
> >
> > Now
On 9/16/24 03:10, Qianqiang Liu wrote:
syzbot has found a NULL pointer dereference bug in fbcon [1].
This issue is caused by ops->putcs being a NULL pointer.
We need to check the pointer before using it.
[1] https://syzkaller.appspot.com/bug?extid=3d613ae53c031502687a
Cc: sta...@vger.kernel.or
On Mon, Sep 16, 2024 at 06:04:08PM GMT, Abhinav Kumar wrote:
>
>
> On 9/2/2024 8:22 PM, Dmitry Baryshkov wrote:
> > Historically CRTC resources (LMs and CTLs) were assigned in
> > dpu_crtc_atomic_begin(). The commit 9222cdd27e82 ("drm/msm/dpu: move hw
> > resource tracking to crtc state") simply
On 17/09/2024 01:26, Konrad Dybcio wrote:
> On 16.09.2024 10:33 PM, Dmitry Baryshkov wrote:
>> On Mon, Sep 16, 2024 at 05:23:55PM GMT, Krzysztof Kozlowski wrote:
>>> On Fri, Sep 13, 2024 at 04:07:51PM +0530, Soutrik Mukhopadhyay wrote:
Add compatible string for the supported eDP PHY on sa8775p
On 17-09-2024 09:32, Raag Jadav wrote:
This was previously attempted as xe specific reset uevent but dropped
in commit 77a0d4d1cea2 ("drm/xe/uapi: Remove reset uevent for now")
as part of refactoring.
Now that we have device wedged event supported by DRM core, make use
of it. With this in pla
Now that we have device wedged event supported by DRM core, make use
of it. With this in place, userspace will be notified of wedged device
on gt reset failure.
Signed-off-by: Raag Jadav
---
drivers/gpu/drm/i915/gt/intel_reset.c | 2 ++
drivers/gpu/drm/i915/i915_driver.c| 10 ++
2 f
This was previously attempted as xe specific reset uevent but dropped
in commit 77a0d4d1cea2 ("drm/xe/uapi: Remove reset uevent for now")
as part of refactoring.
Now that we have device wedged event supported by DRM core, make use
of it. With this in place userspace will be notified of wedged devi
Now that we have device wedged event in place, add wedge_recovery sysfs
attribute which will expose recovery methods supported by the DRM device.
This is useful for userspace consumers in cases where the device supports
multiple recovery methods which can be used as fallbacks.
$ cat /sys/class/drm
Introduce device wedged event, which will notify userspace of wedged
(hanged/unusable) state of the DRM device through a uevent. This is
useful especially in cases where the device is no longer operating as
expected and has become unrecoverable from driver context.
Purpose of this implementation i
This series introduces device wedged event in DRM subsystem and uses
it in xe and i915 drivers. Detailed description in commit message.
This was earlier attempted as xe specific uevent in v1 and v2.
https://patchwork.freedesktop.org/series/136909/
v2: Change authorship to Himal (Aravind)
Add
Hi Conor,
On 14/08/24 7:29 pm, Conor Dooley wrote:
> On Wed, Aug 14, 2024 at 04:22:53PM +0530, Manikandan Muralidharan wrote:
>> Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
>> Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
>> Controller for the sam9x7
On 9/2/2024 8:22 PM, Dmitry Baryshkov wrote:
Historically CRTC resources (LMs and CTLs) were assigned in
dpu_crtc_atomic_begin(). The commit 9222cdd27e82 ("drm/msm/dpu: move hw
resource tracking to crtc state") simply moved resources to
struct dpu_crtc_state, without changing the code sequence
On 9/2/2024 8:22 PM, Dmitry Baryshkov wrote:
The commit b954fa6baaca ("drm/msm/dpu: Refactor rm iterator") removed
zero-init of the hw_ctl array, but didn't change the error condition,
that checked for hw_ctl[i] being NULL. At the same time because of the
early returns in case of an error dpu_
On 16.09.2024 10:33 PM, Dmitry Baryshkov wrote:
> On Mon, Sep 16, 2024 at 05:23:55PM GMT, Krzysztof Kozlowski wrote:
>> On Fri, Sep 13, 2024 at 04:07:51PM +0530, Soutrik Mukhopadhyay wrote:
>>> Add compatible string for the supported eDP PHY on sa8775p platform.
>>>
>>> Signed-off-by: Soutrik Mukho
It turns out that if you happen to have a kernel config where
CONFIG_DRM_PANIC is disabled and spinlock debugging is enabled, along with
KMS being enabled - we'll end up trying to acquire an uninitialized
spin_lock with drm_panic_lock() when we try to do a commit:
rvkms rvkms.0: [drm:drm_atomic_
On 9/2/2024 5:56 PM, Yang Li wrote:
./drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c:282:2-3: Unneeded semicolon
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9852
Signed-off-by: Yang Li
---
drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 2 +-
1 file changed, 1 in
Function drm_sched_entity_push_job() doesn't have return value,
remove the return value description for it.
Correct several other typo errors.
v2 (Philipp):
- more correction with related comments.
Signed-off-by: Shuicheng Lin
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/sched_entity.c |
Acked-by: Alex Deucher
And applied.
Thanks!
On Sun, Sep 15, 2024 at 10:19 AM wrote:
>
> From: "Dr. David Alan Gilbert"
>
> bios_get_vga_enabled_displays has been unused since
> commit 5a8132b9f606 ("drm/amd/display: remove dead dc vbios code")
>
> Remove it.
>
> Signed-off-by: Dr. David Ala
Acked-by: Alex Deucher
And applied.
Thanks!
On Mon, Sep 16, 2024 at 9:03 AM wrote:
>
> From: Tobias Jakobi
>
> As set_drr() is called from IRQ context, it can happen that the
> pipe context has been nulled by dc_state_destruct().
>
> Apply the same protection here that is already present for
On Mon, Sep 16, 2024 at 08:52:00PM +0200, Philipp Stanner wrote:
> DRM's GPU scheduler is arguably in need of more intensive maintenance.
> Danilo and Philipp volunteer to help with the maintainership.
>
> Signed-off-by: Philipp Stanner
> Cc: Christian König
> Cc: Luben Tuikov
> Cc: Matthew Bro
Sigh. Took me a minute but I think I know what happened - I meant to push the
entire series to drm-misc-next and not drm-misc-fixes, but I must have misread
or typo'd the branch name and pushed the second half of patches to drm-misc-
fixes by mistake. So the nouveau commit is present in drm-misc-ne
On Mon, Sep 16, 2024 at 05:23:55PM GMT, Krzysztof Kozlowski wrote:
> On Fri, Sep 13, 2024 at 04:07:51PM +0530, Soutrik Mukhopadhyay wrote:
> > Add compatible string for the supported eDP PHY on sa8775p platform.
> >
> > Signed-off-by: Soutrik Mukhopadhyay
> > ---
> > v2: No change
> >
>
> Acke
On Mon, Sep 16, 2024 at 08:52:00PM +0200, Philipp Stanner wrote:
> DRM's GPU scheduler is arguably in need of more intensive maintenance.
> Danilo and Philipp volunteer to help with the maintainership.
>
> Signed-off-by: Philipp Stanner
> Cc: Christian König
> Cc: Luben Tuikov
> Cc: Matthew Bro
On Fri, Sep 13, 2024 at 06:07:47PM +0300, Dzmitry Sankouski wrote:
> Add binding for the Samsung s6e3ha8 panel found in the Samsung S9.
>
> Signed-off-by: Dzmitry Sankouski
>
> ---
> Changes in v4:
> - change dts example intendation from tabs
> to spaces
> - remove reset-gpios description
> ---
dma_buf_fd() takes dmabuf and either inserts the corresponding
struct file reference into descriptor table (and returns the descriptor)
or returns an error. In the former case dmabuf reference is consumed,
in the latter it is not.
At the very least, the calling conventions are wro
On 2024-08-26 12:57, Mario Limonciello wrote:
> On 8/24/2024 13:33, Thomas Weißschuh wrote:
>> Not all platforms provide the full range of PWM backlight capabilities
>> supported by the hardware through ATIF.
>> Use the generic drm panel minimum backlight quirk infrastructure to
>> override the
On Mon, Sep 16, 2024 at 3:03 PM Philipp Stanner wrote:
>
> DRM's GPU scheduler is arguably in need of more intensive maintenance.
> Danilo and Philipp volunteer to help with the maintainership.
>
> Signed-off-by: Philipp Stanner
> Cc: Christian König
> Cc: Luben Tuikov
> Cc: Matthew Brost
> Cc
Am 16.09.24 um 20:52 schrieb Philipp Stanner:
DRM's GPU scheduler is arguably in need of more intensive maintenance.
Danilo and Philipp volunteer to help with the maintainership.
Signed-off-by: Philipp Stanner
Cc: Christian König
Cc: Luben Tuikov
Cc: Matthew Brost
Cc: Danilo Krummrich
Cc: T
DRM's GPU scheduler is arguably in need of more intensive maintenance.
Danilo and Philipp volunteer to help with the maintainership.
Signed-off-by: Philipp Stanner
Cc: Christian König
Cc: Luben Tuikov
Cc: Matthew Brost
Cc: Danilo Krummrich
Cc: Tvrtko Ursulin
---
MAINTAINERS | 2 ++
1 file
Hi Harry, Leo and other amdgpu maintainers,
On 2024-08-24 20:33:53+, Thomas Weißschuh wrote:
> The value of "min_input_signal" returned from ATIF on a Framework AMD 13
> is "12". This leads to a fairly bright minimum display backlight.
>
> Introduce a quirk to override "min_input_signal" to "
On Mon, Sep 16, 2024 at 04:49:27PM +0300, Alexander Usyskin wrote:
> Enable access to internal spi on DGFX with GSC/CSC devices
> via a child device.
> The spi child device is exposed via auxiliary bus.
>
> Signed-off-by: Alexander Usyskin
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> d
In DP alt mode, when pin assignment is D, only one PHY lane is owned
by the display. intel_cx0pll_enable currently performs a power cycle
ready on both the lanes in all cases.
Address the todo to perfom power state ready on owned lanes.
Tested on Meteor Lake-P [Intel Arc Graphics] with DP alt mod
On Mon, Sep 16, 2024 at 04:49:23PM +0300, Alexander Usyskin wrote:
> Enable runtime PM in spi driver to notify graphics driver that
> whole card should be kept awake while spi operations are
> performed through this driver.
>
> CC: Lucas De Marchi
> Signed-off-by: Alexander Usyskin
> ---
> driv
On Thu, Sep 12, 2024 at 05:48:45PM +0200, Antonino Maniscalco wrote:
> On 9/10/24 6:43 PM, Akhil P Oommen wrote:
> > On Mon, Sep 09, 2024 at 01:22:22PM +0100, Connor Abbott wrote:
> > > On Fri, Sep 6, 2024 at 9:03 PM Akhil P Oommen
> > > wrote:
> > > >
> > > > On Thu, Sep 05, 2024 at 04:51:22PM
On 16/09/2024 13:20, Tvrtko Ursulin wrote:
On 16/09/2024 13:11, Christian König wrote:
Am 13.09.24 um 18:05 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Having removed one re-lock cycle on the entity->lock in a patch titled
"drm/sched: Optimise drm_sched_entity_push_job", with only a tiny
From: Tvrtko Ursulin
Having removed one re-lock cycle on the entity->lock in a patch titled
"drm/sched: Optimise drm_sched_entity_push_job", with only a tiny bit
larger refactoring we can do the same optimisation on the rq->lock.
(Currently both drm_sched_rq_add_entity() and
drm_sched_rq_update_f
On Sat, 14 Sep 2024 14:31:20 +0800, Jianeng Ceng wrote:
> This is v8 of the MT8186 Chromebook device tree series.
> ---
> Changes in v8:
> - PATCH 1/2: Remove custom label.
> - PATCH 2/2: Change the commit about ponyta.
> - Link to
> v7:https://lore.kernel.org/all/20240913031505.372868-1-cengjia
On Wed, Sep 11, 2024 at 06:22:15PM +0800, He Lugang wrote:
> Use devm_add_action_or_reset() to release resources in case of failure,
> because the cleanup function will be automatically called.
>
> Reviewed-by: Rodrigo Vivi
> Signed-off-by: He Lugang
> ---
> v2:move devm_add_action_or_reset afte
Hi,
On 2024-09-15 19:12 +03:00, Jason-JH.Lin wrote:
> OVL_CON_CLRFMT_MAN is an configuration for extending color format
> settings of DISP_REG_OVL_CON(n).
> It will change some of the original color format settings.
>
> Take the settings of (3 << 12) for example.
> - If OVL_CON_CLRFMT_MAN = 0 mea
On Fri, Sep 13, 2024 at 04:07:51PM +0530, Soutrik Mukhopadhyay wrote:
> Add compatible string for the supported eDP PHY on sa8775p platform.
>
> Signed-off-by: Soutrik Mukhopadhyay
> ---
> v2: No change
>
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Fri, Sep 13, 2024 at 04:07:51PM +0530, Soutrik Mukhopadhyay wrote:
> Add compatible string for the supported eDP PHY on sa8775p platform.
>
> Signed-off-by: Soutrik Mukhopadhyay
> ---
> v2: No change
>
> ---
> Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml | 1 +
Reviewed-by: Krzys
On 16/09/2024 14:32, Pierre-Eric Pelloux-Prayer wrote:
In debugfs gem_info/vm_info files, timeout handler and page fault reports.
This information is useful with the virtio/native-context driver: this
allows the guest applications identifier to visible in amdgpu's output.
The output in amdgpu
Following the design direction communicated here:
https://lore.kernel.org/linux-mm/b7491378-defd-4f1c-31e2-29e4c77e2...@amd.com/T/#ma918844aa8a6efe8768fdcda0c6590d5c93850c9
Export the LRU walker for driver shrinker use and add a bo
shrinker helper for initial use by the xe driver.
v8:
- Split ou
The XE_PL_TT watermark was set to 50% of system memory.
The idea behind that was unclear since the net effect is that
TT memory will be evicted to TTM_PL_SYSTEM memory if that
watermark is exceeded, requiring PPGTT rebinds and dma
remapping. But there is no similar watermark for TTM_PL_1SYSTEM
memo
Rather than relying on the TTM watermark accounting add a shrinker
for xe_bos in TT or system memory.
Leverage the newly added TTM per-page shrinking and shmem backup
support.
Although xe doesn't fully support WONTNEED (purgeable) bos yet,
introduce and add shrinker support for purgeable ttm_tts.
Use fault-injection to test partial TTM swapout and interrupted swapin.
Return -EINTR for swapin to test the callers ability to handle and
restart the swapin, and on swapout perform a partial swapout to test that
the swapin and release_shrunken functionality.
v8:
- Use the core fault-injection sys
Provide a helper to shrink ttm_tt page-vectors on a per-page
basis. A ttm_backup backend could then in theory get away with
allocating a single temporary page for each struct ttm_tt.
This is accomplished by splitting larger pages before trying to
back them up.
In the future we could allow ttm_bac
Initially intended for experimenting with different backup
solutions (shmem vs direct swap cache insertion), abstract
the backup destination using a virtual base class.
Also provide a sample implementation for shmem.
While when settling on a preferred backup solution, one could
perhaps skip the a
Make the interface more symmetric by providing and using a
ttm_resource_cursor_init().
v10:
- Fix a stray newline (Matthew Brost)
- Update kerneldoc (Matthew Brost)
Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/ttm/ttm_bo.c | 3 ++-
drivers/gpu/drm/ttm/t
This series implements TTM shrinker / eviction helpers and an xe bo
shrinker. It builds on a previous series, *and obsoletes that one*.
https://lore.kernel.org/linux-mm/b7491378-defd-4f1c-31e2-29e4c77e2...@amd.com/T/
Where the comment about layering
https://lore.kernel.org/linux-mm/b7491378-defd-
On 16/09/2024 14:32, Pierre-Eric Pelloux-Prayer wrote:
Add an optional drm-client-name field to drm fdinfo's output.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
Documentation/gpu/drm-usage-stats.rst | 5 +
drivers/gpu/drm/drm_file.c| 5 +
2 files changed, 10 insertio
On 16/09/2024 14:32, Pierre-Eric Pelloux-Prayer wrote:
Giving the opportunity to userspace to associate a free-form
name with a drm_file struct is helpful for tracking and debugging.
This is similar to the existing DMA_BUF_SET_NAME ioctl.
Access to name is protected by a mutex, and the 'clien
Am 16.09.24 um 13:00 schrieb Javier Martinez Canillas:
That can be used by drivers to check if the Generic System Framebuffers
(sysfb) support can handle the data contained in the global screen_info.
Drivers might need this information to know if have to setup the system
framebuffer, or if th
Hi, Vamsi.
Thanks for your patch. Please, see my feedback below.
Quoting Vamsi Krishna Brahmajosyula (2024-09-06 14:46:01-03:00)
>In DP alt mode one lane is owned by display and the other by usb
>intel_cx0pll_enable currently performs a power cycle ready on both
>the lanes in all cases.
>
>Addres
From: Tomas Winkler
Add the dGFX spi region map and convey it via auxiliary device
to the spi child device.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/spi/intel_spi.c | 8
1 file changed, 8 insertions(
Enable access to internal spi on DGFX with GSC/CSC devices
via a child device.
The spi child device is exposed via auxiliary bus.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c | 3 +
drivers/gpu/drm/xe/xe_device_types.h |
Check SPI access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4
drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +---
drivers/gpu/drm/xe/xe_spi.c | 33 ++
From: Tomas Winkler
Enable access to internal spi on DGFX devices via a child device.
The spi child device is exposed via auxiliary bus.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/Makefile| 4 ++
drive
Check SPI access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/spi/intel_spi.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/spi/in
Enable runtime PM in spi driver to notify graphics driver that
whole card should be kept awake while spi operations are
performed through this driver.
CC: Lucas De Marchi
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 44 ++
1 file changed,
GSC SPI HW errors on quad access overlapping 1K border.
Align 64bit read and write to avoid readq/writeq over 1K border.
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/spi/spi-intel-
From: Tomas Winkler
Implement mtd read, erase, and write handlers.
For erase operation address and size should be 4K aligned.
For write operation address and size has to be 4bytes aligned.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Vitaly Lubart
Signed-o
From: Tomas Winkler
Register the on-die spi device with the mtd subsystem.
Refcount spi object on _get and _put mtd callbacks.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 111
From: Tomas Winkler
Implement spi_read(), spi_erase() and spi_write() functions.
CC: Lucas De Marchi
CC: Rodrigo Vivi
Signed-off-by: Tomas Winkler
Signed-off-by: Vitaly Lubart
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 199 +
1 fil
From: Tomas Winkler
In intel-dg spi, there is no access to the spi controller,
the information is extracted from the descriptor region.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 190 +++
Add auxiliary driver for intel discrete graphics
on-die spi device.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
MAINTAINERS | 7 ++
drivers/spi/Kconfig | 11 +++
drivers/spi/Makefile |
Add driver for access to Intel discrete graphics card
internal SPI device.
Expose device on auxiliary bus by i915 and Xe drivers and
provide spi driver to register this device with MTD framework.
This is a rewrite of "drm/i915/spi: spi access for discrete graphics"
series with connection to the Xe
Am 16.09.24 um 15:32 schrieb Pierre-Eric Pelloux-Prayer:
In debugfs gem_info/vm_info files, timeout handler and page fault reports.
This information is useful with the virtio/native-context driver: this
allows the guest applications identifier to visible in amdgpu's output.
The output in amdgpu
Am 16.09.24 um 15:32 schrieb Pierre-Eric Pelloux-Prayer:
Add an optional drm-client-name field to drm fdinfo's output.
Signed-off-by: Pierre-Eric Pelloux-Prayer
Reviewed-by: Christian König
---
Documentation/gpu/drm-usage-stats.rst | 5 +
drivers/gpu/drm/drm_file.c| 5 ++
Am 16.09.24 um 15:32 schrieb Pierre-Eric Pelloux-Prayer:
Giving the opportunity to userspace to associate a free-form
name with a drm_file struct is helpful for tracking and debugging.
This is similar to the existing DMA_BUF_SET_NAME ioctl.
Access to name is protected by a mutex, and the 'clien
Hi Laurent,
Thanks for the quick review.
On 13/09/24 13:54, Laurent Pinchart wrote:
> Hi Devarsh,
>
> On Thu, Sep 12, 2024 at 10:41:42PM +0530, Devarsh Thakkar wrote:
>> Modify license to include dual licensing as GPL-2.0-only OR MIT license for
>> tidss display driver. This allows other operati
From: Thierry Reding
In order to store device DMA parameters, the DMA framework depends on
the device's dma_parms field to point at a valid memory location. Add
backing storage for this in struct host1x_memory_context and point to
it.
Reported-by: Jonathan Hunter
Signed-off-by: Thierry Reding
In debugfs gem_info/vm_info files, timeout handler and page fault reports.
This information is useful with the virtio/native-context driver: this
allows the guest applications identifier to visible in amdgpu's output.
The output in amdgpu_vm_info/amdgpu_gem_info looks like this:
pid:12255P
Giving the opportunity to userspace to associate a free-form
name with a drm_file struct is helpful for tracking and debugging.
This is similar to the existing DMA_BUF_SET_NAME ioctl.
Access to name is protected by a mutex, and the 'clients' debugfs
file has been updated to print it.
Userspace M
Add an optional drm-client-name field to drm fdinfo's output.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
Documentation/gpu/drm-usage-stats.rst | 5 +
drivers/gpu/drm/drm_file.c| 5 +
2 files changed, 10 insertions(+)
diff --git a/Documentation/gpu/drm-usage-stats.rst
b/D
From: Joaquín Ignacio Aramendía
Add quirk orientation for AYA NEO GEEK. The name appears without
spaces in DMI strings. The board name is completely different to
the previous models making it difficult to reuse their quirks
despite being the same resolution and using the same orientation.
Tested
From: Joaquín Ignacio Aramendía
Add quirk orientation for AYA NEO Founder. The name appears with spaces in
DMI strings as other devices of the brand. The panel is the same as the
NEXT and 2021 models. Those could not be reused as the former has VENDOR
name as "AYANEO" without spaces and the latte
On 16/09/2024 10:25, Thomas Zimmermann wrote:
A number of TX chips are listed in VGACRD1, but not supported by
the ast driver. Whether any existing product uses such a chip is
unknown. Warn if the driver encounters any. We can then add
support as necessary.
Thanks, it looks good to me.
Reviewe
On 16/09/2024 10:25, Thomas Zimmermann wrote:
Replace magic values with named constants when reading the TX chip
from VGACRD1.
Thanks, it looks good to me.
Reviewed-by: Jocelyn Falempe
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_dp501.c | 13 +++--
drivers/gpu/d
From: Joaquín Ignacio Aramendía
Add quirk orientation for AYA NEO 2. The name appears without spaces in
DMI strings. That made it difficult to reuse the 2021 match. Also the
display is larger in resolution.
Tested by the JELOS team that has been patching their own kernel for a
while now and conf
From: Tobias Jakobi
Hello,
this is a re-submit of panel orientation quirks for some of the handheld
devices by vendor AYA NEO.
The quirks were posted to dri-devel some time ago, but got lost:
https://lore.kernel.org/lkml/20230621220615.1253571-2-samsa...@gmail.com/T/#u
With best wishes,
Tobias
On 16/09/2024 10:25, Thomas Zimmermann wrote:
The type of the TX chip is provided in VGACRD1. Rename the constants
accordingly.
Thanks, it looks good to me.
Reviewed-by: Jocelyn Falempe
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_main.c | 4 ++--
drivers/gpu/drm/ast/a
From: Tobias Jakobi
Hello,
this is a follow-up for these (already merged) patches:
https://lore.kernel.org/all/cover.1725269643.git.tjak...@math.uni-bielefeld.de/
A user on the GitLab issue tracker pointed out that the problem
also manifests itself on DCE110 hardware.
This is a straight port o
On 9/16/24 06:15, Stephen Rothwell wrote:
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
between commit:
e835d5144f5e ("drm/amd/display: Avoid race between dcn35_set_drr() and
dc_state_destruct()")
from Linu
From: Tobias Jakobi
As set_drr() is called from IRQ context, it can happen that the
pipe context has been nulled by dc_state_destruct().
Apply the same protection here that is already present for
dcn35_set_drr() and dcn10_set_drr(). I.e. fetch the tg pointer
first (to avoid a race with dc_state_
Hi Tvrtko,
On 8/13/24 07:25, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Lockdep thinks our seqcount_t usage is unsafe because the update path can
be both from irq and worker context:
[ ]
[ ] WARNING: inconsistent lock state
[ ] 6.10.3-v8-16k-numa #159 Ta
On 16/09/2024 13:11, Christian König wrote:
Am 13.09.24 um 18:05 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Having removed one re-lock cycle on the entity->lock in a patch titled
"drm/sched: Optimise drm_sched_entity_push_job", with only a tiny bit
larger refactoring we can do the same opt
Am 13.09.24 um 18:05 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Having removed one re-lock cycle on the entity->lock in a patch titled
"drm/sched: Optimise drm_sched_entity_push_job", with only a tiny bit
larger refactoring we can do the same optimisation on the rq->lock.
(Currently both drm_
Hi,
We have an issue where two devices have dependencies to each other,
according to drivers/base/core.c's fw_devlinks, and this prevents them
from probing. I've been adding debugging to the core.c, but so far I
don't quite grasp the issue, so I thought to ask. Maybe someone can
instantly say
Gentle ping - is there anything more I need to do before this can land?
Thanks,
Derek
On 2024-08-28 03:31, Jani Nikula wrote:
On Tue, 27 Aug 2024, Derek Foreman wrote:
The largest infoframe we create is the DRM (Dynamic Range Mastering)
infoframe which is 26 bytes + a 4 byte header, for a tot
Am 13.09.24 um 18:05 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
In FIFO mode We can avoid dropping the lock only to immediately re-acquire
by adding a new drm_sched_rq_update_fifo_locked() helper.
v2:
* Remove drm_sched_rq_update_fifo() altogether. (Christian)
Signed-off-by: Tvrtko Ursuli
Il 15/09/24 18:12, Jason-JH.Lin ha scritto:
OVL_CON_CLRFMT_MAN is an configuration for extending color format
settings of DISP_REG_OVL_CON(n).
It will change some of the original color format settings.
Take the settings of (3 << 12) for example.
- If OVL_CON_CLRFMT_MAN = 0 means OVL_CON_CLRFMT_R
On Mon, Sep 16, 2024 at 12:15:32PM +0200, Andi Shyti wrote:
> Hi Andrew,
>
> On Sun, Sep 15, 2024 at 03:01:55PM GMT, Andrew Kreimer wrote:
> > Fix typos in documentation.
> >
> > Reported-by: Matthew Wilcox
> > Signed-off-by: Andrew Kreimer
>
> Reviewed-by: Andi Shyti
>
> Because we are rece
On 13/09/2024 13:42, Adrián Larumbe wrote:
> In order to support UM in calculating rates of GPU utilisation, the current
> operating and maximum GPU clock frequencies must be recorded during device
> initialisation, and also during OPP state transitions.
>
> Signed-off-by: Adrián Larumbe
Reviewe
On 13/09/2024 13:42, Adrián Larumbe wrote:
> Enable calculations of job submission times in clock cycles and wall
> time. This is done by expanding the boilerplate command stream when running
> a job to include instructions that compute said times right before and
> after a user CS.
>
> A separate
Hello,
This is v4 of a fix to prevent both coreboot and sysfb drivers to register
a platform device to setup a system framebuffer. It has been converted to
a series since contains changes for both drivers, to prevent build issues
on architectures that don't define a global struct screen_info.
Pat
That can be used by drivers to check if the Generic System Framebuffers
(sysfb) support can handle the data contained in the global screen_info.
Drivers might need this information to know if have to setup the system
framebuffer, or if they have to delegate this action to sysfb instead.
Suggested
1 - 100 of 130 matches
Mail list logo
