MCIMX-LVDS1[1] display module integrates a HannStar HSD100PXN1 LVDS
display panel and a touch IC. Add an overlay to support the LVDS
panel on i.MX53 QSB / QSRB platforms.
[1] https://www.nxp.com/part/MCIMX-LVDS1
Signed-off-by: Liu Ying
---
I mark RFC in patch subject prefix because if the DT ov
On 7/22/2024 1:48 PM, Dmitry Baryshkov wrote:
> On Sat, Jul 20, 2024 at 09:16:11AM GMT, Ekansh Gupta wrote:
>> Memory intensive applications(which requires more tha 4GB) that wants
>> to offload tasks to DSP might have to split the tasks to multiple
>> user PD to make the resources available.
>>
Hello,
On Thu, 25 Jul 2024 20:07:01 -0400
Alex Lanzano wrote:
> What would be the best way to go about doing this? I'm guessing appending to
> MODULE_AUTHOR and adding a Signed-of-by or Co-Developed-by?
Depends on how much you've changed things compared to Mehdi's version.
If you've mostly kept
Yeah, I agree weakdep is a better choice here. It solves the confusion
of softdep
which the depend module is optional.
But I prefer using weakdep directly instead of creating an aliasing of
it which has
no actual difference.
On Thu, Jul 25, 2024 at 4:21 PM Dragan Simic wrote:
>
> Hello Qiang,
>
Hi Linus,
Fixes for rc1, mostly amdgpu, i915 and xe, with some other misc ones,
doesn't seem to be anything too serious.
Dave.
drm-next-2024-07-26:
drm fixes for 6.11-rc1
amdgpu:
- Bump driver version for GFX12 DCC
- DC documention warning fixes
- VCN unified queue power fix
- SMU fix
- RAS fix
On Thu, Jul 25, 2024 at 08:08:57AM GMT, Krzysztof Kozlowski wrote:
> On 25/07/2024 02:47, Alex Lanzano wrote:
> > +static const struct spi_device_id sharp_memory_ids[] = {
> > + {"ls010b7dh04", LS010B7DH04},
> > + {"ls011b7dh03", LS011B7DH03},
> > + {"ls012b7dd01", LS012B7DD01},
> > + {"ls0
On Thu, Jul 25, 2024 at 4:41 PM Jani Nikula wrote:
>
> On Thu, 25 Jul 2024, Zhaoxiong Lv
> wrote:
> > Move the 11/29 command from enable() to init() function
>
> OOC, what is the "11/29" command?
>
> BR,
> Jani.
hi Jani
Sorry, maybe I didn't describe it clearly. The 11/29 commands are sent
by t
On Thu, Jul 25, 2024 at 08:18:44AM GMT, Krzysztof Kozlowski wrote:
> On 25/07/2024 02:47, Alex Lanzano wrote:
> > Add device tree bindings for the monochrome Sharp Memory LCD
> >
> > Signed-off-by: Alex Lanzano
> > ---
> > .../bindings/display/sharp,sharp-memory.yaml | 97 +++
>
Thank you for the review! I will address these comments in V2
On Thu, Jul 25, 2024 at 08:17:01AM GMT, Krzysztof Kozlowski wrote:
> On 25/07/2024 02:47, Alex Lanzano wrote:
> > Add device tree bindings for the monochrome Sharp Memory LCD
> >
> > Signed-off-by: Alex Lanzano
> > ---
> > .../bindin
On Thu, Jul 25, 2024 at 07:45:32AM GMT, Thomas Petazzoni wrote:
> Hello Alex,
>
> On Wed, 24 Jul 2024 20:47:01 -0400
> Alex Lanzano wrote:
>
> > This patch series add support for the monochrome Sharp Memory LCD
> > panels. This series is based off of the work done by Mehdi Djait.
>
> Thanks for
On 18/07/2024 08:16, Helen Koike wrote:
On 17/07/2024 20:52, Deborah Brouwer wrote:
Before building an image, the build script looks to see if there are
fixes
to apply from an upstream repository. The link for the upstream
repository
git://anongit.freedesktop.org/drm/drm became obsolete w
On Thu, Jul 25, 2024 at 08:21:51AM +, Tomer Tayar wrote:
> On 24/07/2024 19:08, Dan Carpenter wrote:
> > Hello Tomer Tayar,
> >
> > Commit 09524eb8824e ("accel/habanalabs: enforce release order of
> > compute device and dma-buf") from Jan 22, 2023 (linux-next), leads to
> > the following Smatch
Fix the voltage swing and pre-emphasis tables for sm8350 as the current
one do not match the hardware docs.
Fixes: ef14aff107bd ("phy: qcom: com-qmp-combo: add SM8350 & SM8450 support")
Signed-off-by: Abhinav Kumar
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
1 file changed, 2 inserti
Before re-starting link training reset the link phy params namely
the pre-emphasis and voltage swing levels otherwise the next
link training begins at the previously cached levels which can result
in link training failures.
Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on Snapdragon
C
Currently the DP driver hard-codes the max supported bpp to 30.
This is incorrect because the number of lanes and max data rate
supported by the lanes need to be taken into account.
Replace the hardcoded limit with the appropriate math which accounts
for the accurate number of lanes and max data r
Applied. Thanks!
Alex
On Thu, Jul 25, 2024 at 2:20 PM Nikita Zhandarovich
wrote:
>
> Several cs track offsets (such as 'track->db_s_read_offset')
> either are initialized with or plainly take big enough values that,
> once shifted 8 bits left, may be hit with integer overflow if the
> resulting
Hook up drm_crtc_vblank_on_config() in amdgpu_dm. So, that we can enable
PSR and other static screen optimizations more quickly, while avoiding
stuttering issues that are accompanied by the following dmesg error:
[drm:dc_dmub_srv_wait_idle [amdgpu]] *ERROR* Error waiting for DMUB idle:
status=3
We would like to be able to enable vblank_disable_immediate
unconditionally, however there are a handful of cases where a small off
delay is necessary (e.g. with PSR enabled). So, we would like to be able
to adjust the vblank off delay and disable imminent values dynamically
for a given CRTC. Since
Hi Dave, Sima,
Fixes for 6.11.
The following changes since commit 627a24f5f25d689682f395f3df1411273be4436b:
Merge tag 'amd-drm-fixes-6.11-2024-07-18' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2024-07-22 13:03:50
+1000)
are available in the Git repository at:
https://gi
This is already fixed in:
https://gitlab.freedesktop.org/agd5f/linux/-/commit/6e169c7e0f842c48c7bf683fb789dbf5a8b1dfd8
Alex
On Wed, Jul 24, 2024 at 3:55 PM Ricardo B. Marliere
wrote:
>
> On 24 Jul 24 23:24, Abhishek Tamboli wrote:
> > Fix documentation compile warning by adding description
> > f
Applied. Thanks!
Alex
On Wed, Jul 24, 2024 at 10:35 PM Jiapeng Chong
wrote:
>
> No functional modification involved.
>
> ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c:481:2-3:
> Unneeded semicolon.
> ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/d
On Tue, 2024-07-16 at 11:25 +0200, Daniel Vetter wrote:
> On Mon, Jul 15, 2024 at 02:05:49PM -0300, Daniel Almeida wrote:
> > Hi Sima!
> >
> >
> > >
> > > Yeah I'm not sure a partially converted driver where the main driver is
> > > still C really works, that pretty much has to throw out all the
On Thu, Jul 25, 2024 at 4:52 AM Christian König
wrote:
>
> Am 20.07.24 um 09:15 schrieb Yunfei Dong:
> > From: "T.J. Mercier"
> >
> > The docs for dma_heap_get_name were incorrect, and since they were
> > duplicated in the header they were wrong there too.
> >
> > The docs formatting was inconsis
Several cs track offsets (such as 'track->db_s_read_offset')
either are initialized with or plainly take big enough values that,
once shifted 8 bits left, may be hit with integer overflow if the
resulting values end up going over u32 limit.
Some debug prints take this into account (see according d
Hi,
On Thu, Jul 25, 2024 at 1:28 AM Maxime Ripard wrote:
>
> On Wed, Jul 24, 2024 at 06:32:14PM GMT, Jani Nikula wrote:
> > On Wed, 24 Jul 2024, Tejas Vipin wrote:
> > > Changes all the multi functions to check if the current context requires
> > > errors to be printed or not using the quiet mem
From: Vitaly Prosyak
The current implementation of drm_sched_start uses a hardcoded -ECANCELED to
dispose of a job when
the parent/hw fence is NULL. This results in drm_sched_job_done being called
with -ECANCELED for
each job with a NULL parent in the pending list, making it difficult to
disti
On 2024-07-05 21:35, Melissa Wen wrote:
instead of parsing struct edid.
A more informative commit message will be helpful.
Signed-off-by: Melissa Wen
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 15 +++
1 file changed, 3 insertions(+), 12 deletions(-)
diff --gi
On 2024-07-05 21:35, Melissa Wen wrote:
instead of parsing struct edid.
A more informative commit message will be helpful.
Signed-off-by: Melissa Wen
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git
Can this be merged with [PATCH 10/11] drm/amd/display: get SADB from
drm_eld when parsing EDID caps
On 2024-07-05 21:35, Melissa Wen wrote:
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff
On 2024-07-05 21:35, Melissa Wen wrote:
Connectors have source physical address available in display
info. Use drm_dp_cec_attach() to use it instead of parsing the EDID
again.
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 ++---
1 file changed, 2 ins
Please see inline comments.
On 2024-07-05 21:35, Melissa Wen wrote:
Replace raw edid handling (struct edid) with the opaque EDID type
(struct drm_edid) on amdgpu_dm_connector for consistency. It may also
prevent mismatch of approaches in different parts of the driver code.
Working in progress. I
On Wed, Jul 24, 2024 at 11:30 PM wrote:
>
> From: Vitaly Prosyak
>
> The current implementation of drm_sched_start uses a hardcoded -ECANCELED to
> dispose of a job when
> the parent/hw fence is NULL. This results in drm_sched_job_done being called
> with -ECANCELED for
> each job with a NULL p
On Mon, 22 Jul 2024 08:53:32 +0200, Alexandre Mergnat wrote:
> Add the audio codec sub-device. This sub-device is used to set the
> optional voltage values according to the hardware.
> The properties are:
> - Setup of microphone bias voltage.
> - Setup of the speaker pin pull-down.
>
> Also, a
On Fri, 14 Jun 2024 09:27:46 +0200, Alexandre Mergnat wrote:
> Add the audio codec sub-device. This sub-device is used to set the
> optional voltage values according to the hardware.
> The properties are:
> - Setup of microphone bias voltage.
> - Setup of the speaker pin pull-down.
>
> Also, a
Hi Melissa,
There are no commit messages in this patch.
Also, do you think this can be merged with Patch 5 "drm/amd/display:
remove redundant freesync parser for DP"?
On 2024-07-05 21:35, Melissa Wen wrote:
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
It may be possible for the sum of the values derived from
i915_ggtt_offset() and __get_parent_scratch_offset()/
i915_ggtt_offset() to go over the u32 limit before being assigned
to wq offsets of u64 type.
Mitigate these issues by expanding one of the right operands
to u64 to avoid any overflow iss
Hi,
On Wed, 10 Jul 2024 16:47:11 +0800, Cong Yang wrote:
> This series main purpose is to break some common CMDS into helper
> functions (select page and reload CMDS), refer to the discussion
> between Linus and Doug [1]. It is expected that there will be no
> impact on the functionality, but I do
Hi,
Here's this week drm-misc-next-fixes PR
Maxime
drm-misc-next-fixes-2024-07-25:
A single fix for a panel compatible
The following changes since commit 1fe1c66274fb80cc1ac42e0d38917d53adc7d7a3:
drm/v3d: Fix Indirect Dispatch configuration for V3D 7.1.6 and later
(2024-07-15 12:49:52 -0300)
Hi,
On 7/25/24 01:17, Jani Nikula wrote:
> On Wed, 24 Jul 2024, Nikita Zhandarovich wrote:
>> On the off chance that clock value ends up being too high (by means
>> of skl_ddi_calculate_wrpll() having benn called with big enough
>> value of crtc_state->port_clock * 1000), one possible consequence
On Thu, Jul 25, 2024 at 09:42:08AM +0200, Christian König wrote:
> Am 25.07.24 um 01:44 schrieb Matthew Brost:
> > Only start in drm_sched_job_begin on first job being added to the
> > pending list as if pending list non-empty the TDR has already been
> > started. It is problematic to restart the T
Check SPI access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 5
drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +---
drivers/gpu/drm/xe/xe_spi.c | 33 ++
Enable access to internal spi on DGFX with GSC/CSC devices
via a child device.
The spi child device is exposed via auxiliary bus.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c | 3 ++
drivers/gpu/drm/xe/xe_device_types.h |
Check SPI access mode from GSC FW status registers
and overwrite access status read from SPI descriptor, if needed.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/spi/intel_spi.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/spi/in
From: Tomas Winkler
Add the dGFX spi region map and convey it via auxiliary device
to the spi child device.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/spi/intel_spi.c | 8
1 file changed, 8 insertions(
From: Tomas Winkler
Enable access to internal spi on DGFX devices via a child device.
The spi child device is exposed via auxiliary bus.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/Makefile| 4 ++
drive
Enable runtime PM in spi driver to notify graphics driver that
whole card should be kept awake while spi operations are
performed through this driver.
CC: Lucas De Marchi
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 44 ++
1 file changed,
GSC SPI HW errors on quad access overlapping 1K border.
Align 64bit read and write to avoid readq/writeq over 1K border.
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/spi/spi-intel-
From: Tomas Winkler
Implement mtd read, erase, and write handlers.
For erase operation address and size should be 4K aligned.
For write operation address and size has to be 4bytes aligned.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Vitaly Lubart
Signed-o
From: Tomas Winkler
Register the on-die spi device with the mtd subsystem.
Refcount spi object on _get and _put mtd callbacks.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 111
From: Tomas Winkler
Implement spi_read(), spi_erase() and spi_write() functions.
CC: Lucas De Marchi
CC: Rodrigo Vivi
Signed-off-by: Tomas Winkler
Signed-off-by: Vitaly Lubart
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 199 +
1 fil
From: Tomas Winkler
In intel-dg spi, there is no access to the spi controller,
the information is extracted from the descriptor region.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/spi/spi-intel-dg.c | 190 +++
Add auxiliary driver for intel discrete graphics
on-die spi device.
CC: Rodrigo Vivi
CC: Lucas De Marchi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
MAINTAINERS | 7 ++
drivers/spi/Kconfig | 11 +++
drivers/spi/Makefile |
Add driver for access to Intel discrete graphics card
internal SPI device.
Expose device on auxiliary bus by i915 and Xe drivers and
provide spi driver to register this device with MTD framework.
This is a rewrite of "drm/i915/spi: spi access for discrete graphics"
series with connection to the Xe
On 7/23/24 2:17 PM, Christian König wrote:
This reverts commit 24dc64c1ba5c3ef0463d59fef6df09336754188d.
Shouldn't be needed by drivers any more.
Signed-off-by: Christian König
Reviewed-by: Matthew Brost
Technically, this series should be a v2, right? I also still think it would be
good to
On Tue, Jul 23, 2024 at 09:10:35PM +0200, Marco Pagani wrote:
> Replace deferred action function wrappers with equivalent ones defined
> using the macro introduced by commit 56778b49c9a2 ("kunit: Add a macro to
> wrap a deferred action function")
>
> Signed-off-by: Marco Pagani
Merged to drm-mis
On Tue, Jul 23, 2024 at 02:17:48PM +0200, Christian König wrote:
> This reverts commit 24dc64c1ba5c3ef0463d59fef6df09336754188d.
>
> Shouldn't be needed by drivers any more.
>
> Signed-off-by: Christian König
> Reviewed-by: Matthew Brost
On the last 3 patches:
Reviewed-by: Daniel Vetter
> -
On Tue, Jul 23, 2024 at 02:17:47PM +0200, Christian König wrote:
> This reverts commit 64ad2abfe9a628ce79859d072704bd1ef7682044.
>
> To me it looks like this functionality was never actually used. At least
> I can't find any protection in vmw_bo_free().
Just to double-check I've done the audit of
On Tue, Jul 23, 2024 at 02:17:46PM +0200, Christian König wrote:
> Instead of a TTM reference grab a GEM reference whenever necessary.
>
> Signed-off-by: Christian König
> Cc: Zack Rusin
> Cc: Broadcom internal kernel review list
>
There's a ttm_bo_put in vmwgfx_mob.c that you didn't convert,
On Tue, Jul 23, 2024 at 02:17:45PM +0200, Christian König wrote:
> Instead of a TTM reference grab a GEM reference whenever necessary.
>
> Signed-off-by: Christian König
> Cc: Sui Jingfeng
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/loongson/lsdc_ttm.c | 8 ++--
> 1 file changed,
On Tue, Jul 23, 2024 at 02:17:44PM +0200, Christian König wrote:
> Instead of a TTM reference grab a GEM reference whenever necessary.
>
> Signed-off-by: Christian König
> Cc: Alex Deucher
> Cc: amd-...@lists.freedesktop.org
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/radeon/radeon_ge
On Tue, Jul 23, 2024 at 02:17:43PM +0200, Christian König wrote:
> Instead of a TTM reference grab a GEM reference whenever necessary.
>
> Signed-off-by: Christian König
> Cc: Alex Deucher
> Cc: Felix Kuehling
> Cc: amd-...@lists.freedesktop.org
I was worried that changing the refcounting for
Add support for the CSW MNB601LS1-4, pleace the EDID here for
subsequent reference.
00 ff ff ff ff ff ff 00 0e 77 04 11 00 00 00 00
00 22 01 04 a5 1a 0e 78 03 a1 35 9b 5e 58 91 25
1c 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 09 1e 56 dc 50 00 28 30 30 20
36 00 00 90 10 00 00 1a
Am 20.07.24 um 09:15 schrieb Yunfei Dong:
From: "T.J. Mercier"
The docs for dma_heap_get_name were incorrect, and since they were
duplicated in the header they were wrong there too.
The docs formatting was inconsistent so I tried to make it more
consistent across functions since I'm already in
On 7/23/24 5:06 PM, Boris Brezillon wrote:
Hi Steve,
On Mon, 15 Jul 2024 10:12:16 +0100
Steven Price wrote:
I note it also shows that the "panthor_regs.rs" would ideally be shared.
For arm64 we have been moving to generating system register descriptions
from a text source (see arch/arm64/t
We did discuss this, but I've come to the conclusion that's the wrong
approach. Converting is going to need to track kernel closely as there
are lots of dependencies with the various rust abstractions needed. If
we just copy over the C driver, that's an invitation to diverge and
accumulate tech
Hello Steven,
On 2024-07-25 11:20, Steven Price wrote:
On 25/07/2024 09:24, Dragan Simic wrote:
Hello Steven and Boris,
Another option has become available for expressing additional module
dependencies, weakdeps. [1][2] Long story short, weakdeps are similar
to softdeps, in the sense of t
On Mon, Jul 15, 2024 at 11:32:34AM GMT, Tomi Valkeinen wrote:
> On 02/07/2024 14:43, Maxime Ripard wrote:
> > Hi Tomi,
> >
> > On Wed, Jun 26, 2024 at 06:53:40PM GMT, Tomi Valkeinen wrote:
> > > On 26/06/2024 18:07, Maxime Ripard wrote:
> > > > On Wed, Jun 26, 2024 at 12:55:39PM GMT, Tomi Valkeine
On 2024-07-25 11:25, Maxime Ripard wrote:
> On Thu, Jun 27, 2024 at 04:29:49PM GMT, Dmitry Baryshkov wrote:
>> On Thu, Jun 27, 2024 at 11:49:37AM GMT, Maxime Ripard wrote:
>>> On Wed, Jun 26, 2024 at 07:09:34PM GMT, Dmitry Baryshkov wrote:
On Wed, Jun 26, 2024 at 04:05:01PM GMT, Maxime Ripard
Hi Piotr,
On Wed, 24 Jul 2024 at 23:06, Piotr Zalewski wrote:
> Add support for gamma LUT in VOP2 driver. The implementation is based on
> the one found in VOP driver and modified to be compatible with VOP2. Blue
> and red channels in gamma LUT register write were swapped with respect to
> how ga
On Thursday, 25 July 2024 11:20:22 CEST Steven Price wrote:
> [1] Although from my understanding it's firmware which is the real cause
> of bloat in initramfs size. I guess I need to start paying attention to
> this for panthor which adds GPU firmware - although currently tiny in
> comparison to ot
On Fri, 19 Jul 2024 19:05:36 +0800, Pin-yen Lin wrote:
> When the bridge is powered off, disable the IRQ until the next power on
> to workaround an interrupt storm on some badly-designed hardware.
>
>
Applied, thanks!
[1/1] drm/bridge: it6505: Disable IRQ when powered off
https://cgit.fre
On 2024-07-25 03:37, Christian König wrote:
> Am 24.07.24 um 20:43 schrieb vitaly.pros...@amd.com:
>> From: Vitaly Prosyak
>>
>> The current implementation of drm_sched_start uses a hardcoded -ECANCELED to
>> dispose of a job when
>> the parent/hw fence is NULL. This results in drm_sched_job_do
Il 05/07/24 11:28, CK Hu (胡俊光) ha scritto:
On Tue, 2024-06-11 at 08:54 +0200, AngeloGioacchino Del Regno wrote:
Il 11/06/24 08:48, CK Hu (胡俊光) ha scritto:
On Mon, 2024-06-10 at 10:28 +0200, AngeloGioacchino Del Regno wrote:
Il 06/06/24 07:29, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Wed, 2024-
https://bugzilla.kernel.org/show_bug.cgi?id=219092
Artem S. Tashkinov (a...@gmx.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
Hello all,
Just checking, is this patch good enough to be accepted? If not, is
there
some other preferred way for cleaning up the produced messages?
On 2024-07-04 01:32, Dragan Simic wrote:
Clean up a few logged messages, which were previously worded as rather
incomplete sentences separated
On Thu, Jun 27, 2024 at 04:29:49PM GMT, Dmitry Baryshkov wrote:
> On Thu, Jun 27, 2024 at 11:49:37AM GMT, Maxime Ripard wrote:
> > On Wed, Jun 26, 2024 at 07:09:34PM GMT, Dmitry Baryshkov wrote:
> > > On Wed, Jun 26, 2024 at 04:05:01PM GMT, Maxime Ripard wrote:
> > > > On Fri, Jun 21, 2024 at 02:09
Hi Dragan,
On 25/07/2024 09:24, Dragan Simic wrote:
> Hello Steven and Boris,
> Another option has become available for expressing additional module
> dependencies, weakdeps. [1][2] Long story short, weakdeps are similar
> to softdeps, in the sense of telling the initial ramdisk utilities to
>
On Thu, 25 Jul 2024, Zhaoxiong Lv
wrote:
> Move the 11/29 command from enable() to init() function
OOC, what is the "11/29" command?
BR,
Jani.
>
> As mentioned in the patch:
> https://lore.kernel.org/all/20240624141926.5250-2-lvzhaoxi...@huaqin.corp-partner.google.com/
>
> Our DSI host has dif
Move the 11/29 command from enable() to init() function
As mentioned in the patch:
https://lore.kernel.org/all/20240624141926.5250-2-lvzhaoxi...@huaqin.corp-partner.google.com/
Our DSI host has different modes in prepare() and enable()
functions. prepare() is in LP mode and enable() is in HS mode
Modify the Melfas panel init code to satisfy the gamma
value of 2.2
Signed-off-by: Zhaoxiong Lv
---
.../gpu/drm/panel/panel-jadard-jd9365da-h3.c | 78 +--
1 file changed, 39 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
b/drivers/
This 11/29 command needs to be sent in LP mode, so move 11/29 command
to the init() function.
Modify the Melfas panel init code to satisfy the gamma value of 2.2.
Zhaoxiong Lv (2):
drm/panel: jd9365da: Move the sending location of the 11/29 command
drm/panel: jd9365da: Modify the init code of
On Wed, Jul 24, 2024 at 06:32:14PM GMT, Jani Nikula wrote:
> On Wed, 24 Jul 2024, Tejas Vipin wrote:
> > Changes all the multi functions to check if the current context requires
> > errors to be printed or not using the quiet member.
> >
> > Signed-off-by: Tejas Vipin
> > ---
> > drivers/gpu/drm
Hello Steven and Boris,
On 2024-07-03 16:52, Dragan Simic wrote:
On 2024-07-03 15:20, Steven Price wrote:
On 03/07/2024 13:42, Dragan Simic wrote:
On 2024-06-17 22:17, Dragan Simic wrote:
Panfrost DRM driver uses devfreq to perform DVFS, while using
simple_ondemand
devfreq governor by default
On 24/07/2024 19:08, Dan Carpenter wrote:
> Hello Tomer Tayar,
>
> Commit 09524eb8824e ("accel/habanalabs: enforce release order of
> compute device and dma-buf") from Jan 22, 2023 (linux-next), leads to
> the following Smatch static checker warning:
>
> drivers/accel/habanalabs/common/memory
Hello Qiang,
On 2024-06-26 08:49, Dragan Simic wrote:
On 2024-06-26 03:11, Qiang Yu wrote:
On Wed, Jun 26, 2024 at 2:15 AM Dragan Simic
wrote:
Just checking, any further thoughts about this patch?
I'm OK with this as a temp workaround because it's simple and do no
harm
even it's not perfect
On Wed, 24 Jul 2024, Nikita Zhandarovich wrote:
> On the off chance that clock value ends up being too high (by means
> of skl_ddi_calculate_wrpll() having benn called with big enough
> value of crtc_state->port_clock * 1000), one possible consequence
> may be that the result will not be able to f
Hi Dave, Sima,
Two fixes for the merge window - turning off preemption on Gen8 since it
apparently just doesn't work reliably enough and a fix for potential NULL
pointer dereference when stolen memory probing failed.
Regards,
Tvrtko
drm-intel-next-fixes-2024-07-25:
- Do not consider preemptio
Add support for gamma LUT in VOP2 driver. The implementation is based on
the one found in VOP driver and modified to be compatible with VOP2. Blue
and red channels in gamma LUT register write were swapped with respect to
how gamma LUT values are written in VOP. Write of the current video port id
to
By mistake the incremental patch were sent here. The correct v2 patch was
sent in the form of a v3 patch [1]
[1]
https://lore.kernel.org/linux-rockchip/TkgKVivuaLFLILPY-n3iZo_8KF-daKdqdu-0_e0HP-5Ar_8DALDeNWog2suwWKjX7eomcbGET0KZe7DlzdhK2YM6CbLbeKeFZr-MJzJMtw0=@proton.me/T/#u
On Wednesday, July 2
Am 25.07.24 um 01:44 schrieb Matthew Brost:
Only start in drm_sched_job_begin on first job being added to the
pending list as if pending list non-empty the TDR has already been
started. It is problematic to restart the TDR as it will extend TDR
period for an already running job, potentially leadi
On Fri, 05 Jul 2024 17:28:00 +0800, Chen Ni wrote:
> Add check for the return value of spi_setup() and return the error
> if it fails in order to catch the error.
>
>
Applied, thanks!
[1/1] backlight: l4f00242t03: Add check for spi_setup
commit: cec01c3b62f11efabc8c92f91472575651c593a9
-
Am 24.07.24 um 20:43 schrieb vitaly.pros...@amd.com:
From: Vitaly Prosyak
The current implementation of drm_sched_start uses a hardcoded -ECANCELED to
dispose of a job when
the parent/hw fence is NULL. This results in drm_sched_job_done being called
with -ECANCELED for
each job with a NULL pa
Hi Jani,
I have asked someone with the actual hardware to attach their EDID blob
to the issue.
Kind regards,
Sefa
On Wed, 2024-07-24 at 10:22 +0300, Jani Nikula wrote:
> On Sat, 20 Jul 2024, Sefa Eyeoglu wrote:
> > See https://gitlab.freedesktop.org/drm/misc/kernel/-/issues/40
>
> Please attac
93 matches
Mail list logo
