On Wed, 19 Jun 2024 at 09:45, Ekansh Gupta wrote:
>
>
>
> On 6/12/2024 11:58 PM, Dmitry Baryshkov wrote:
> > On Wed, Jun 12, 2024 at 12:17:28PM +0530, Ekansh Gupta wrote:
> >> Move fastrpc.c from misc/ to misc/fastrpc/. New C files are planned
> >> to be added for PD notifications and other missin
On Wed, Jun 19, 2024 at 12:15:03PM +0530, Ekansh Gupta wrote:
>
>
> On 6/12/2024 11:58 PM, Dmitry Baryshkov wrote:
> > On Wed, Jun 12, 2024 at 12:17:28PM +0530, Ekansh Gupta wrote:
> >> Move fastrpc.c from misc/ to misc/fastrpc/. New C files are planned
> >> to be added for PD notifications and o
On Wed, Jun 19, 2024 at 09:03:49AM GMT, Tejas Vipin wrote:
> Use functions introduced in commit 966e397e4f60 ("drm/mipi-dsi: Introduce
> mipi_dsi_*_write_seq_multi()") and commit f79d6d28d8fe
> ("drm/mipi-dsi: wrap more functions for streamline handling") for the
> raydium rm692e5 panel.
>
> Signe
From: Oded Gabbay
Because I left habana, Ofir Bitton is now the habanalabs driver
maintainer.
The git repo also changed location to the Habana GitHub website.
Signed-off-by: Oded Gabbay
Acked-by: Daniel Vetter
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --
From: Tomer Tayar
The device heartbeat work is currently initialized at
device_heartbeat_schedule() which is called at the end of
hl_device_init().
However hl_device_init() can fail at a previous step, and in such a
case, a subsequent call to hl_device_fini() will lead to calling
cleanup_resource
From: Tomer Tayar
Add a dump of the EQ entries headers upon a EQ heartbeat failure.
Signed-off-by: Tomer Tayar
Reviewed-by: Ofir Bitton
---
drivers/accel/habanalabs/common/device.c | 2 ++
drivers/accel/habanalabs/common/habanalabs.h | 1 +
drivers/accel/habanalabs/common/irq.c|
From: Didi Freiman
It’s better to avoid long sleeps right from the beginning of the polling
since the data may be available much sooner than the sleep period.
Because polling host memory is inexpensive, this change gradually
increases the sleep time up to the user-requested period.
Signed-off-by
From: Tomer Tayar
The test packet which is sent to FW for the PQ heartbeat is used also as
the trigger in FW to send the EQ heartbeat event.
Add the time of the last sent packet to the debug info which is printed
upon a EQ heartbeat failure.
Signed-off-by: Tomer Tayar
Reviewed-by: Ofir Bitton
From: Ilia Levi
When device release triggers a hard reset, there is a printout of
the cause. Currently listed causes (that increment context refcount)
are active command submissions and exported DMA buffer objects. In
any other case, the printout emits "unknown reason". We identify and
print anot
From: Tomer Tayar
Don't print the "previous EQ index" value in case of a EQ heartbeat
failure, because it is incremented along with the EQ CI and therefore
redundant.
In addition, as the CPU-CP PI is zeroed when it reaches a value that is
twice the queue size, add a value of the CI with a simila
From: Farah Kassabri
In order to have better debuggability upon encountering FW issues,
We are adding additional info once CPU packet timeout expires.
Signed-off-by: Farah Kassabri
Reviewed-by: Ofir Bitton
---
drivers/accel/habanalabs/common/firmware_if.c | 14 +++---
1 file changed,
Some systems allow a maximum number of 128 MSI-X interrupts.
Hence we reduce the interrupt count to 128 instead of 512.
Signed-off-by: Ofir Bitton
Reviewed-by: Ofir Bitton
---
drivers/accel/habanalabs/gaudi2/gaudi2P.h| 8
drivers/accel/habanalabs/include/gaudi2/gaudi2.h | 4 ++-
On Tue, Jun 18, 2024 at 09:11:58PM GMT, Konrad Dybcio wrote:
>
>
> On 6/18/24 20:55, Dmitry Baryshkov wrote:
> > On Tue, Jun 18, 2024 at 08:50:52PM GMT, Konrad Dybcio wrote:
> > >
> > >
> > > On 6/18/24 19:50, Dmitry Baryshkov wrote:
> > > > On Tue, Jun 18, 2024 at 04:59:36PM GMT, Dzmitry Sanko
On Wed, 2024-06-19 at 11:15 +0800, kernel test robot wrote:
> Hi Paul,
>
> kernel test robot noticed the following build errors:
>
> [auto build test ERROR on jic23-iio/togreg]
> [also build test ERROR on vkoul-dmaengine/next linus/master v6.10-rc4 next-
> 20240618]
> [
https://bugzilla.kernel.org/show_bug.cgi?id=211807
TiaPadavano (jiloxe4...@elahan.com) changed:
What|Removed |Added
CC||jiloxe4...@elahan.co
On Wed, Jun 19, 2024 at 1:24 AM Nicolas Dufresne wrote:
>
> Le mardi 18 juin 2024 à 16:47 +0900, Tomasz Figa a écrit :
> > Hi TaoJiang,
> >
> > On Tue, Jun 18, 2024 at 4:30 PM TaoJiang wrote:
> > >
> > > From: Ming Qian
> > >
> > > When the memory type is VB2_MEMORY_DMABUF, the v4l2 device can't
On Tue, Jun 18, 2024 at 09:18:14AM +0200, Thomas Hellström wrote:
> Rework the TTM swapping to use the LRU walker helper.
> This helps fixing up the ttm_bo_swapout() interface
> to be consistent about not requiring any locking.
>
> For now mimic the current behaviour of using trylock
> only. We co
On 6/18/2024 17:36, Leo Li wrote:
On 2024-06-05 22:04, Mario Limonciello wrote:
When the `power_saving_policy` property is set to bit mask
"Require color accuracy" ABM should be disabled immediately and
any requests by sysfs to update will return an -EBUSY error.
When the `power_saving_policy
On Tue, Jun 18, 2024 at 09:18:12AM +0200, Thomas Hellström wrote:
Ugh, replying to correct version again...
> To address the problem with hitches moving when bulk move
> sublists are lru-bumped, register the list cursors with the
> ttm_lru_bulk_move structure when traversing its list, and
> when
Use functions introduced in commit 966e397e4f60 ("drm/mipi-dsi: Introduce
mipi_dsi_*_write_seq_multi()") and commit f79d6d28d8fe
("drm/mipi-dsi: wrap more functions for streamline handling") for the
raydium rm692e5 panel.
Signed-off-by: Tejas Vipin
---
Changes in v2:
- Change rm692e5_on to re
On Wed, 19 Jun 2024 at 01:56, Abhinav Kumar wrote:
> On 6/13/2024 4:20 PM, Abhinav Kumar wrote:
> > On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
> >> The dpu_crtc_atomic_check() already calls the function
> >> _dpu_crtc_check_and_setup_lm_bounds(). There is no need to call it
> >> again from dpu
Hi Paul,
kernel test robot noticed the following build errors:
[auto build test ERROR on jic23-iio/togreg]
[also build test ERROR on vkoul-dmaengine/next linus/master v6.10-rc4
next-20240618]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
On 6/18/2024 2:33 AM, Daniel Vetter wrote:
On Mon, Jun 17, 2024 at 10:52:27PM +0300, Dmitry Baryshkov wrote:
On Mon, Jun 17, 2024 at 11:28:35AM GMT, Abhinav Kumar wrote:
Hi
On 6/17/2024 9:54 AM, Brian Starkey wrote:
Hi,
On Mon, Jun 17, 2024 at 05:16:36PM +0200, Daniel Vetter wrote:
On Mo
On 5/22/2024 3:51 AM, Dmitry Baryshkov wrote:
We must be sure that the HDMI controller is powered on, while performing
the DDC transfer. Add corresponding runtime PM calls to
msm_hdmi_i2c_xfer().
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/hdmi/h
On 5/22/2024 3:50 AM, Dmitry Baryshkov wrote:
The pm_runtime_get_sync() function is a bad choise for runtime power
[nit: s/choise/choice/]
Reviewed-by: Jessica Zhang
management. Switch HDMI driver to pm_runtime_resume_and_get() and add
proper error handling, while we are at it.
Signed-o
Hi,
On Tue, Jun 18, 2024 at 3:00 PM Alex Deucher wrote:
>
> On Tue, Jun 18, 2024 at 5:40 PM Doug Anderson wrote:
> >
> > Hi,
> >
> >
> > On Mon, Jun 17, 2024 at 8:01 AM Alex Deucher wrote:
> > >
> > > On Wed, Jun 12, 2024 at 6:37 PM Douglas Anderson
> > > wrote:
> > > >
> > > > Based on grepp
On 5/22/2024 3:50 AM, Dmitry Baryshkov wrote:
The last platform using legacy clock names for HDMI block (APQ8064)
switched to new clock names in 5.16. It's time to stop caring about old
DT, drop hand-coded helpers and switch to clk_bulk_* API.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: J
Hi,
On Mon, Jun 17, 2024 at 7:22 AM Daniel Vetter wrote:
>
> > I'm really not convinced that hacking with device links in order to
> > get the shutdown notification in the right order is correct, though.
> > The idea is that after we're confident that all DRM modeset drivers
> > are calling shutd
Hi,
On Mon, Jun 17, 2024 at 7:17 AM Daniel Vetter wrote:
>
> > That all being said, I'm also totally OK with any of the following:
> >
> > 1. Dropping my patch and just accepting that we will have warnings
> > printed out for all DRM drivers that do things correctly and have no
> > warnings for b
https://lore.kernel.org/lkml/20240618234025.15036-1-d...@redhat.com/
Add the initial driver stub of Nova, a Rust-based GSP-only driver for
Nvidia GPUs. Nova, in the long term, is intended to serve as the
successor of Nouveau for GSP-firmware-based GPUs. [1]
As a stub driver Nova's focus is to make use of the most basic device /
driver infrastructure required to bui
Add the initial driver stub of Nova, a Rust-based GSP-only driver for
Nvidia GPUs. Nova, in the long term, is intended to serve as the
successor of Nouveau for GSP-firmware-based GPUs. [1]
As a stub driver Nova's focus is to make use of the most basic device /
driver infrastructure required to bui
From: Asahi Lina
The DRM GEM subsystem is the DRM memory management subsystem used by
most modern drivers. Add a Rust abstraction to allow Rust DRM driver
implementations to use it.
Signed-off-by: Asahi Lina
Co-developed-by: Danilo Krummrich
Signed-off-by: Danilo Krummrich
---
rust/bindings/
From: Asahi Lina
A DRM File is the DRM counterpart to a kernel file structure,
representing an open DRM file descriptor. Add a Rust abstraction to
allow drivers to implement their own File types that implement the
DriverFile trait.
Signed-off-by: Asahi Lina
Signed-off-by: Danilo Krummrich
---
Implement the DRM driver `Registration`.
The `Registration` structure is responsible to register and unregister a
DRM driver. It makes use of the `Devres` container in order to allow the
`Registration` to be owned by devres, such that it is automatically
dropped (and the DRM driver unregistered) o
Implement the abstraction for a `struct drm_device`.
A `drm::device::Device` creates a static const `struct drm_driver` filled
with the data from the `drm::drv::Driver` trait implementation of the
actual driver creating the `drm::device::Device`.
Co-developed-by: Asahi Lina
Signed-off-by: Asahi
From: Asahi Lina
Some traits exposed by the kernel crate may not be intended to be
implemented by downstream modules. Add a Sealed trait to allow avoiding
this using the sealed trait pattern.
Signed-off-by: Asahi Lina
Signed-off-by: Danilo Krummrich
---
rust/kernel/lib.rs | 5 +
1 file ch
Implement the DRM driver abstractions.
The `Driver` trait provides the interface to the actual driver to fill
in the driver specific data, such as the `DriverInfo`, driver features
and IOCTLs.
Co-developed-by: Asahi Lina
Signed-off-by: Asahi Lina
Signed-off-by: Danilo Krummrich
---
rust/bindi
From: Asahi Lina
DRM drivers need to be able to declare which driver-specific ioctls they
support. Add an abstraction implementing the required types and a helper
macro to generate the ioctl definition inside the DRM driver.
Note that this macro is not usable until further bits of the abstractio
This patch series implements some basic DRM Rust abstractions and a stub
implementation of the Nova GPU driver.
Nova is intended to be developed upstream, starting out with just a stub driver
to lift some initial required infrastructure upstream. A more detailed
explanation can be found in [1].
T
On 5/22/2024 3:50 AM, Dmitry Baryshkov wrote:
The only clock which has frequency being set through hpd_freqs is the
"core" aka MDSS_HDMI_CLK clock. It always has the specified frequency,
so we can drop corresponding clk_set_rate() call together with the
hpd_freq infrastructure.
Signed-off-by:
On 6/13/2024 4:16 PM, Abhinav Kumar wrote:
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
Lift mode_config limits set by the DPU driver to the actual FB limits as
handled by the dpu_plane.c. Move 2*max_lm_width check where it belongs,
to the drm_crtc_helper_funcs::mode_valid() callback.
Sig
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
dpu_formats.c defines DPU_MAX_IMG_WIDTH and _HEIGHT, while
dpu_hw_catalog.h defines just MAX_IMG_WIDTH and _HEIGHT. Merge these
constants to remove duplication.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm
On 6/13/2024 4:20 PM, Abhinav Kumar wrote:
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
The dpu_crtc_atomic_check() already calls the function
_dpu_crtc_check_and_setup_lm_bounds(). There is no need to call it
again from dpu_crtc_atomic_begin().
Signed-off-by: Dmitry Baryshkov
---
dri
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
Check that the plane pitch doesn't overflow the maximum pitch size
allowed by the hardware.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_p
On 6/14/2024 3:34 AM, Dmitry Baryshkov wrote:
On Thu, Jun 13, 2024 at 04:19:07PM GMT, Abhinav Kumar wrote:
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
Move a call to dpu_format_populate_plane_sizes() to the atomic_check
step, so that any issues with the FB layout can be reported as early
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
Split dpu_format_populate_layout() into addess-related and
pitch/format-related parts.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c| 8 +++-
drivers/gpu/drm/msm/disp/dpu1/
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
The dpu_plane_prepare_fb() already calls dpu_format_populate_layout().
Store the generated layout in the plane state and drop this call from
dpu_plane_sspp_update().
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/dr
On 6/13/2024 4:14 PM, Abhinav Kumar wrote:
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
The msm_kms_funcs::check_modified_format() callback is not used by the
driver. Drop it completely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 43
-
On 6/13/2024 4:13 PM, Abhinav Kumar wrote:
On 6/13/2024 3:36 PM, Dmitry Baryshkov wrote:
Make _dpu_crtc_setup_lm_bounds() check that CRTC width is not
overflowing LM requirements. Rename the function accordingly.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Dmitry
On 2024-06-05 22:04, Mario Limonciello wrote:
When the `power_saving_policy` property is set to bit mask
"Require color accuracy" ABM should be disabled immediately and
any requests by sysfs to update will return an -EBUSY error.
When the `power_saving_policy` property is set to bit mask
"Req
On Tue, Jun 18, 2024 at 09:18:13AM +0200, Thomas Hellström wrote:
Replying to correct version...
> Provide a generic LRU walker in TTM, in the spirit of drm_gem_lru_scan()
> but building on the restartable TTM LRU functionality.
>
> The LRU walker optionally supports locking objects as part of
>
On Tue, Jun 18, 2024 at 5:40 PM Doug Anderson wrote:
>
> Hi,
>
>
> On Mon, Jun 17, 2024 at 8:01 AM Alex Deucher wrote:
> >
> > On Wed, Jun 12, 2024 at 6:37 PM Douglas Anderson
> > wrote:
> > >
> > > Based on grepping through the source code this driver appears to be
> > > missing a call to drm_
Hi,
On Mon, Jun 17, 2024 at 8:01 AM Alex Deucher wrote:
>
> On Wed, Jun 12, 2024 at 6:37 PM Douglas Anderson
> wrote:
> >
> > Based on grepping through the source code this driver appears to be
> > missing a call to drm_atomic_helper_shutdown() at system shutdown
> > time. Among other things,
Applied. Thanks!
Alex
On Tue, Jun 18, 2024 at 10:17 AM Harry Wentland wrote:
>
>
>
> On 2024-06-14 15:54, Nathan Chancellor wrote:
> > Commit 77acc6b55ae4 ("riscv: add support for kernel-mode FPU") and
> > commit a28e4b672f04 ("drm/amd/display: use ARCH_HAS_KERNEL_FPU_SUPPORT")
> > enabled supp
On 6/18/2024 15:20, Leo Li wrote:
On 2024-05-22 18:08, Mario Limonciello wrote:
Verify that the property has disabled PSR
---
tests/amdgpu/amd_psr.c | 74 ++
1 file changed, 74 insertions(+)
diff --git a/tests/amdgpu/amd_psr.c b/tests/amdgpu/amd_psr.
On 6/18/2024 15:20, Leo Li wrote:
Thanks for the tests! FYI IGT patches should also cc
igt-...@lists.freedesktop.org
Some comments inline:
On 2024-05-22 18:08, Mario Limonciello wrote:
From: Mario Limonciello
When the "panel power saving" property is set to forbidden the
compositor has in
Em 18/06/2024 14:43, Dmitry Baryshkov escreveu:
On Tue, Jun 18, 2024 at 01:18:10PM GMT, André Almeida wrote:
Em 18/06/2024 07:07, Dmitry Baryshkov escreveu:
On Tue, 18 Jun 2024 at 12:38, Jani Nikula wrote:
On Tue, 18 Jun 2024, André Almeida wrote:
Drivers have different capabilities on wha
On 6/15/24 01:48, Joe Damato wrote:
> [You don't often get email from jdam...@fastly.com. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> On Thu, Jun 13, 2024 at 11:22:02AM +0300, Omer Shpigelman wrote:
>> This ethernet driver is initialized via auxiliary bus
On 6/18/24 10:08, Leon Romanovsky wrote:
> On Tue, Jun 18, 2024 at 05:50:15AM +, Omer Shpigelman wrote:
>> On 6/17/24 16:18, Leon Romanovsky wrote:
>>> [Some people who received this message don't often get email from
>>> l...@kernel.org. Learn why this is important at
>>> https://aka.ms/Lear
On 6/17/24 14:48, Leon Romanovsky wrote:
> [Some people who received this message don't often get email from
> l...@kernel.org. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> On Mon, Jun 17, 2024 at 08:08:26AM +, Omer Shpigelman wrote:
>> On 6/13/24 16:0
From: Ming Qian
When the memory type is VB2_MEMORY_DMABUF, the v4l2 device can't know
whether the dma buffer is coherent or synchronized.
The videobuf2-core will skip cache syncs as it think the DMA exporter
should take care of cache syncs
But in fact it's likely that the client doesn't
synchro
Hi TaoJiang,
On Tue, Jun 18, 2024 at 4:30 PM TaoJiang wrote:
From: Ming Qian
When the memory type is VB2_MEMORY_DMABUF, the v4l2 device can't know
whether the dma buffer is coherent or synchronized.
The videobuf2-core will skip cache syncs as it think the DMA exporter
should take care o
On 6/15/24 13:55, Zhu Yanjun wrote:
> [You don't often get email from yanjun@linux.dev. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> 在 2024/6/13 16:22, Omer Shpigelman 写道:
>> +
>> +/* This function should be called after ctrl_lock was taken */
>
> https:
On 6/15/24 03:16, Stephen Hemminger wrote:
> [You don't often get email from step...@networkplumber.org. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
>> +
>> +/* get the src IP as it is done in devinet_ioctl() */
>> +static int hbl_en_get_src_ip(struct hbl_au
On 6/17/24 18:02, Andrew Lunn wrote:
> [Some people who received this message don't often get email from
> and...@lunn.ch. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> On Mon, Jun 17, 2024 at 04:05:57PM +0200, Markus Elfring wrote:
>> …
>>> +++ b/drivers/ne
On 6/17/24 22:04, Leon Romanovsky wrote:
> [Some people who received this message don't often get email from
> l...@kernel.org. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> On Mon, Jun 17, 2024 at 05:43:49PM +, Omer Shpigelman wrote:
>> On 6/13/24 22:1
On 2024-05-22 18:08, Mario Limonciello wrote:
Verify that the property has disabled PSR
---
tests/amdgpu/amd_psr.c | 74 ++
1 file changed, 74 insertions(+)
diff --git a/tests/amdgpu/amd_psr.c b/tests/amdgpu/amd_psr.c
index 9da161a09..a9f4a6aa5 10064
Thanks for the tests! FYI IGT patches should also cc
igt-...@lists.freedesktop.org
Some comments inline:
On 2024-05-22 18:08, Mario Limonciello wrote:
From: Mario Limonciello
When the "panel power saving" property is set to forbidden the
compositor has indicated that userspace prefers to h
On Fri, Jun 14, 2024 at 03:53:04PM -0400, Rodrigo Vivi wrote:
> On Fri, Jun 14, 2024 at 09:55:57AM +0530, Mitul Golani wrote:
> > Describe newly added parameter target_rr_divider in struct
> > drm_dp_as_sdp.
> >
> > -v2:
> > Remove extra line from commit message.(Lucas)
> >
> > Fixes: a20c6d954d7
-Original Message-
From: Andi Shyti
Sent: Monday, June 17, 2024 11:43 AM
To: intel-gfx ; dri-devel
Cc: Andi Shyti ; Cavitt, Jonathan
; De Marchi, Lucas
Subject: [PATCH v2 0/2] Sparse errors on the i915_gem_stolen
>
> Hi Jonathan,
>
> Commit 05da7d9f717b ("drm/i915/gem: Downgrade sto
On 2024-06-18 12:33, Dragan Simic wrote:
Hello Qiang and Maxime,
On 2024-06-18 10:13, Maxime Ripard wrote:
On Tue, Jun 18, 2024 at 04:01:26PM GMT, Qiang Yu wrote:
On Tue, Jun 18, 2024 at 12:33 PM Qiang Yu wrote:
>
> I see the problem that initramfs need to build a module dependency chain,
> b
On 6/18/24 20:55, Dmitry Baryshkov wrote:
On Tue, Jun 18, 2024 at 08:50:52PM GMT, Konrad Dybcio wrote:
On 6/18/24 19:50, Dmitry Baryshkov wrote:
On Tue, Jun 18, 2024 at 04:59:36PM GMT, Dzmitry Sankouski wrote:
sdm845 has "General Purpose" clocks that can be muxed to
SoC pins.
Those clock
On 6/18/24 18:42, Rob Clark wrote:
From: Rob Clark
Move the CP_PROTECT settings into the hw catalog.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
[...]
+static inline void __build_asserts(void)
+{
+ BUILD_BUG_ON(a630_protect.count > a630_protect.count_max);
+
On Tue, Jun 18, 2024 at 08:50:52PM GMT, Konrad Dybcio wrote:
>
>
> On 6/18/24 19:50, Dmitry Baryshkov wrote:
> > On Tue, Jun 18, 2024 at 04:59:36PM GMT, Dzmitry Sankouski wrote:
> > > sdm845 has "General Purpose" clocks that can be muxed to
> > > SoC pins.
> > >
> > > Those clocks may be used as
On 6/18/24 19:50, Dmitry Baryshkov wrote:
On Tue, Jun 18, 2024 at 04:59:36PM GMT, Dzmitry Sankouski wrote:
sdm845 has "General Purpose" clocks that can be muxed to
SoC pins.
Those clocks may be used as e.g. PWM sources for external peripherals.
Add more frequencies to the table for those clo
On Tue, Jun 18, 2024 at 04:59:45PM GMT, Dzmitry Sankouski wrote:
> Add support for MIPI-DSI based S6E3HA8 AMOLED panel
> driver. This panel has 1440x2960 resolution, 5.8-inch physical
> size, and can be found in starqltechn device.
> Brightness regulation is not yet supported.
>
> Signed-off-by: D
On Tue, Jun 18, 2024 at 06:19:59PM GMT, Marc Gonzalez wrote:
> simple_bridge_probe() calls drm_bridge_add()
> Thus, drm_bridge_remove() must be called in the remove() callback.
>
> If we call devm_drm_bridge_add() instead, then drm_bridge_remove()
> will be called automatically at device release,
Hi Maxime
On Tue, 18 Jun 2024 at 10:28, Maxime Ripard wrote:
>
> Hi,
>
> On Fri, Feb 16, 2024 at 06:48:56PM GMT, Dave Stevenson wrote:
> > The VEC supports not producing colour bursts for monochrome output.
> > It also has an option for disabling the chroma input to remove
> > chroma from the sig
On Tue, Jun 18, 2024 at 04:59:36PM GMT, Dzmitry Sankouski wrote:
> sdm845 has "General Purpose" clocks that can be muxed to
> SoC pins.
>
> Those clocks may be used as e.g. PWM sources for external peripherals.
> Add more frequencies to the table for those clocks so it's possible
> for arbitrary p
On Tue, Jun 18, 2024 at 01:18:10PM GMT, André Almeida wrote:
> Em 18/06/2024 07:07, Dmitry Baryshkov escreveu:
> > On Tue, 18 Jun 2024 at 12:38, Jani Nikula
> > wrote:
> > >
> > > On Tue, 18 Jun 2024, André Almeida wrote:
> > > > Drivers have different capabilities on what plane types they can
On Tue, Jun 18, 2024 at 09:33:48AM GMT, Rob Clark wrote:
> On Tue, Jun 18, 2024 at 1:30 AM Dmitry Baryshkov
> wrote:
> >
> > On Mon, Jun 17, 2024 at 03:51:14PM GMT, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > Introduce a6xx_info where we can stash gen specific stuff without
> > > polluting
On Tue, Jun 18, 2024 at 01:48:48PM GMT, Marc Gonzalez wrote:
> On 18/06/2024 00:33, Dmitry Baryshkov wrote:
>
> > On Mon, Jun 17, 2024 at 06:03:02PM GMT, Marc Gonzalez wrote:
> >
> >> + if (sbridge->vcc) {
> >> + ret = regulator_enable(sbridge->vcc);
> >> + msleep(100);
> >
>
On Tue, Jun 18, 2024 at 01:37:15PM GMT, Marc Gonzalez wrote:
> On 18/06/2024 00:28, Dmitry Baryshkov wrote:
>
> > On Mon, Jun 17, 2024 at 06:03:01PM GMT, Marc Gonzalez wrote:
> >
> >> Once probe uses only devm functions, remove() becomes unnecessary.
> >
> > Breves vibrantesque sententiae
> >
>
ry', 'power-supplies' do not match any of the
regexes: 'pinctrl-[0-9]+'
from schema $id:
http://devicetree.org/schemas/power/supply/maxim,max77705-fg.yaml#
doc reference errors (make refcheckdocs):
See
https://patchwork.ozlabs.org/project/devicetree-bindings
c@60: failed to match any schema with compatible:
['samsung,s2dos05']
doc reference errors (make refcheckdocs):
See
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240618-starqltechn_integration_upstream-v3-9-e3f666201...@gmail.com
The base for the series is generally the lat
7705.example.dtb:
/example-0/i2c14/pmic@66/fuelgauge: failed to match any schema with compatible:
['maxim,max77705-fg']
Documentation/devicetree/bindings/mfd/maxim,max77705.example.dtb:
/example-0/i2c14/pmic@66/haptic: failed to match any schema with compatible:
['maxim,max77705-haptic&
From: Rob Clark
Move the CP_PROTECT settings into the hw catalog.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 248 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 257 +-
drivers/gpu/drm/msm/adren
From: Rob Clark
Introduce a6xx_info where we can stash gen specific stuff without
polluting the toplevel adreno_info struct.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 65 +--
drivers/g
From: Rob Clark
Move the hwcg tables into the hw catalog.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 619 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 617 -
drive
From: Rob Clark
Split each gen's gpu table into it's own file. Only code-motion, no
functional change.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
---
drivers/gpu/drm/msm/Makefile | 5 +
drivers/gpu/drm/msm/adreno/a2xx_catalog.c | 52 +
From: Rob Clark
Split into a separate table per generation, in preparation to move each
gen's device table to it's own file.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 67 +-
drivers/g
From: Rob Clark
Split the single flat gpulist table into per-gen tables that exist in
their own per-gen files, and start moving more info into the device
table. This at least gets all the big tables of register settings out
of the heart of the a6xx_gpu code. Probably more could be moved, to
rem
On Tue, Jun 04, 2024 at 07:35:04PM +0200, Konrad Dybcio wrote:
>
>
> On 5/14/24 20:38, Akhil P Oommen wrote:
> > On Wed, May 08, 2024 at 07:46:31PM +0200, Konrad Dybcio wrote:
> > > Memory barriers help ensure instruction ordering, NOT time and order
> > > of actual write arrival at other observe
On Tue, Jun 18, 2024 at 1:30 AM Dmitry Baryshkov
wrote:
>
> On Mon, Jun 17, 2024 at 03:51:14PM GMT, Rob Clark wrote:
> > From: Rob Clark
> >
> > Introduce a6xx_info where we can stash gen specific stuff without
> > polluting the toplevel adreno_info struct.
> >
> > Signed-off-by: Rob Clark
> > -
ruct platform_driver simple_bridge_driver = {
.probe = simple_bridge_probe,
- .remove_new = simple_bridge_remove,
.driver = {
.name = "simple-bridge",
.of_match_table = simple_bridge_match,
---
base-commit: 17b591a4a
Le mardi 18 juin 2024 à 16:47 +0900, Tomasz Figa a écrit :
> Hi TaoJiang,
>
> On Tue, Jun 18, 2024 at 4:30 PM TaoJiang wrote:
> >
> > From: Ming Qian
> >
> > When the memory type is VB2_MEMORY_DMABUF, the v4l2 device can't know
> > whether the dma buffer is coherent or synchronized.
> >
> > T
Em 18/06/2024 07:07, Dmitry Baryshkov escreveu:
On Tue, 18 Jun 2024 at 12:38, Jani Nikula wrote:
On Tue, 18 Jun 2024, André Almeida wrote:
Drivers have different capabilities on what plane types they can or
cannot perform async flips. Create a plane::async_flip field so each
driver can choos
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