Am 01.06.24 um 10:45 schrieb Zhaoxiong Lv:
Hi Zhaoxiong,
The bias IC of this kindisplay-kd101ne3 panel is placed
on the panel side, so when the panel is powered on,
there is no need to control AVDD and AVEE in the driver,
only 3.3v and reset are needed.
Signed-off-by: Zhaoxiong Lv
---
Chage
On Mon, May 27 2024 at 20:11:49 -03:00:00, Val Packett
wrote:
The RK3066 VOP sets a dma_stop bit when it's done scanning out a frame
and needs the driver to acknowledge that by clearing the bit.
So unless we clear it "between" frames, the RGB output only shows
noise
instead of the picture.
On Sat, Jun 1, 2024 at 11:33 PM wrote:
>
> s=20181004; d=freemail.hu;
>
> h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding;
> l=6462; bh=CnHSqkRX34kqCWN2/oPtvm9wm8HJCe8QhPwQypdpi3w=;
> b=JDlDB9yOQDBY7EDnRMrt8qYnWfH8J/LKYKb904
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA512
Adrián Larumbe (1):
meson: make build system happy by replacing deprecated feature
David Heidelberg (1):
include poll.h instead of sys/poll.h
David Rosca (1):
amdgpu: Make amdgpu_device_deinitialize thread-safe
Dylan Baker (2):
Hi Cristian,
kernel test robot noticed the following build errors:
[auto build test ERROR on 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0]
url:
https://github.com/intel-lab-lkp/linux/commits/Cristian-Ciocaltea/drm-bridge-dw-hdmi-Simplify-clock-handling/20240601-211531
base
On 01/06/24 00:01, Randy Dunlap wrote:
> Hi,
>
> On 5/31/24 10:12 AM, Devarsh Thakkar wrote:
>> Add documentation for rounding, scaling, absolute value and difference,
>> 32-bit division related macros and functions exported by math.h header
>> file.
>>
>
> I don't see any kernel-doc for division
ge/synopsys/dw-hdmi-qp.h | 831
> +
> drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 353 +++--
> drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c| 351 +++--
> include/drm/bridge/dw_hdmi.h | 8 +
> 8 files changed, 2290 insertions(+), 348 deletions(-)
> ---
> base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
> change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc
>
--
With best wishes
Dmitry
On Sat, Jun 01, 2024 at 04:45:25PM +0800, Zhaoxiong Lv wrote:
> Create a new dt-scheam for the kd101ne3-40ti.
> The bias IC of this kindisplay-kd101ne3 panel is placed
> on the panel side, so when the panel is powered on,
> there is no need to control AVDD and AVEE in the driver.
>
> Signed-off-by
On Sat, Jun 01, 2024 at 04:45:28PM +0800, Zhaoxiong Lv wrote:
> This Starry panel has the same timing as the Kingdisplay panel,
> so add starry configuration in the Kingdisplay driver.
Do these two panels share the same driver IC? Programming sequences do
not seem common, so it might be better to
On Sat, Jun 01, 2024 at 04:45:26PM +0800, Zhaoxiong Lv wrote:
> The bias IC of this kindisplay-kd101ne3 panel is placed
> on the panel side, so when the panel is powered on,
> there is no need to control AVDD and AVEE in the driver,
> only 3.3v and reset are needed.
>
> Signed-off-by: Zhaoxiong Lv
On 01/06/2024 10:45, Zhaoxiong Lv wrote:
> The Starry-er88577 is a 10.1" WXGA TFT-LCD panel, which fits
> in nicely with the existing panel-kingdisplay-kd101ne3 driver.
> Hence, we add a new compatible with panel specific config.
>
> Signed-off-by: Zhaoxiong Lv
> ---
>
> Chage since V2:
>
Squa
On 01/06/2024 10:45, Zhaoxiong Lv wrote:
> Create a new dt-scheam for the kd101ne3-40ti.
> The bias IC of this kindisplay-kd101ne3 panel is placed
> on the panel side, so when the panel is powered on,
> there is no need to control AVDD and AVEE in the driver.
> +
> + reg:
> +description: the
Hi Cristian,
kernel test robot noticed the following build errors:
[auto build test ERROR on 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0]
url:
https://github.com/intel-lab-lkp/linux/commits/Cristian-Ciocaltea/drm-bridge-dw-hdmi-Simplify-clock-handling/20240601-211531
base
The VFP, HBP, and HSA are divided between the available lanes if
there is more than one lane. For certain timings and lane
configurations, the HFP may not be evenly divisible. If the HFP
is rounded down, it ends up being too small which can cause some
monitors to not sync properly. In these instan
The P divider should be set based on the min and max values of
the fin pll which may vary between different platforms.
These ranges are defined per platform, but hard-coded values
were used instead which resulted in a smaller range available
on the i.MX8M[MNP] than what was possible.
As noted by F
Hi Cristian,
a few drive-by comments below.
Sam
> +
> +static const struct drm_connector_funcs dw_hdmi_qp_connector_funcs = {
> + .fill_modes = drm_helper_probe_single_connector_modes,
> + .detect = dw_hdmi_connector_detect,
> + .destroy = drm_connector_cleanup,
> + .for
In the process of adding support for shared IRQ pins, a scenario
was accidentally created where adv7511_irq_process returned
prematurely causing the EDID to fail randomly.
Since the interrupt handler is broken up into two main helper functions,
update both of them to treat the helper functions as
The RK3588 SoC family integrates the newer Synopsys DesignWare HDMI 2.1
Quad-Pixel (QP) TX controller IP and a HDMI/eDP TX Combo PHY based on a
Samsung IP block.
Add just the basic support for now, i.e. RGB output up to 4K@60Hz,
without audio, CEC or any of the HDMI 2.1 specific features.
Co-deve
Make use of devm_clk_get_optional_enabled() to replace devm_clk_get()
and clk_prepare_enable() for ref_clk and drop the now unnecessary calls
to clk_disable_unprepare().
Additionally, use devm_clk_get_optional() helper for grf_clk to replace
the open coding call to devm_clk_get() followed by the -
The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller supports
the following features, among others:
* Fixed Rate Link (FRL)
* 4K@120Hz and 8K@60Hz video modes
* Variable Refresh Rate (VRR) including Quick Media Switching (QMS), aka
Cinema VRR
* Fast Vactive (FVA), aka Quick Frame Trans
The mpll_cfg, cur_ctr and phy_config members in struct dw_hdmi_plat_data
are only used to configure the Synopsys PHYs supported internally by DW
HDMI transmitter driver (gpu/drm/bridge/synopsys/dw-hdmi.c), via
hdmi_phy_configure_dwc_hdmi_3d_tx(), which is further invoked from
dw_hdmi_phy_init(). T
Document the Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX controller
found on Rockchip RK3588 SoC family.
Since RK3588 uses different clocks than previous Rockchip SoCs and also
requires a couple of reset lines and some additional properties, provide
the required changes in the binding to accom
The regulators are only enabled at bind() and disabled at unbind(),
hence replace the boilerplate code by making use of
devm_regulator_get_enable() helper.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 34 +
1 file changed, 6 inse
Prefer drm_{err|info|dbg}() over deprecated DRM_DEV_{ERROR|INFO|DEBUG}()
logging macros.
Conversion done with the help of the following semantic patch, followed
by a few minor indentation adjustments:
@@
identifier T;
@@
(
-DRM_DEV_ERROR(T->dev,
+drm_err(T,
...)
|
-DRM_DEV_INFO(T->dev,
+drm_info
In preparation to add support for the HDMI 2.1 Quad-Pixel TX Controller
and minimize code duplication, factor out the hdmi_data_info setup from
dw_hdmi_setup() into a common dw_hdmi_prep_data() helper.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-common.h | 2 ++
In preparation to add support for the HDMI 2.1 Quad-Pixel TX Controller
and minimize code duplication, export dw_hdmi_connector_create()
function, while adding a new parameter to allow using a different
drm_connector_funcs structure.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/s
In preparation to add support for the HDMI 2.1 Quad-Pixel TX Controller
and minimize code duplication, factor out the AVI infoframe setup from
hdmi_config_AVI() into a common dw_hdmi_prep_avi_infoframe() helper.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-common
In preparation to add support for the HDMI 2.1 Quad-Pixel TX Controller
and minimize code duplication, export dw_hdmi_i2c_adapter() while adding
a new parameter to allow using a different i2c_algorithm.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-common.h | 2 ++
In preparation to add support for the HDMI 2.1 Quad-Pixel TX Controller
and minimize code duplication, factor out the vmode setup from
hdmi_av_composer() into a common dw_hdmi_prep_vmode() helper.
Signed-off-by: Cristian Ciocaltea
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-common.h | 2 ++
dri
In preparation to add support for the HDMI 2.1 Quad-Pixel TX Controller
and minimize code duplication as much as possible, export all reusable
functions and provide the related declarations and structs within a new
header file.
For consistency, ensure the newly exported symbols share the 'dw_'
pre
Make use of devm_clk_get_enabled() to replace devm_clk_get() and
clk_prepare_enable() for isfr and iahb clocks, and drop the now
unnecessary calls to clk_disable_unprepare().
Similarly, use devm_clk_get_optional_enabled() helper for cec clock,
which additionally allows to remove the -ENOENT test.
| 8 +
8 files changed, 2290 insertions(+), 348 deletions(-)
---
base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0
change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc
On Thu, May 30, 2024 at 08:16:12PM +, Mina Almasry wrote:
> Add documentation outlining the usage and details of devmem TCP.
>
> Signed-off-by: Mina Almasry
>
The doc LGTM, thanks!
Reviewed-by: Bagas Sanjaya
--
An old man doll... just what I always wanted! - Clara
signature.asc
Descri
On Fri, 31 May 2024 19:56:14 +0300
Andy Shevchenko wrote:
> The driver has no in kernel users and requires a board file
> to be instantiated. Remove basically a dead code.
>
> If ever needed, it can be reinstantiated and converted to one
> that uses firmware node interfaces.
>
> Signed-off-by:
This Starry panel has the same timing as the Kingdisplay panel,
so add starry configuration in the Kingdisplay driver.
Signed-off-by: Zhaoxiong Lv
---
Chage since V2:
- Add compatible for Starry er88577 in panel-kingdisplay-kd101ne3 drivers.
---
.../drm/panel/panel-kingdisplay-kd101ne3.c
The Starry-er88577 is a 10.1" WXGA TFT-LCD panel, which fits
in nicely with the existing panel-kingdisplay-kd101ne3 driver.
Hence, we add a new compatible with panel specific config.
Signed-off-by: Zhaoxiong Lv
---
Chage since V2:
- Add compatible for Starry er88577 in Kingdisplay kd101ne3 dt-
The bias IC of this kindisplay-kd101ne3 panel is placed
on the panel side, so when the panel is powered on,
there is no need to control AVDD and AVEE in the driver,
only 3.3v and reset are needed.
Signed-off-by: Zhaoxiong Lv
---
Chage since V2:
- 1. Use the new mipi_dsi_dcs_write_seq_multi() f
Create a new dt-scheam for the kd101ne3-40ti.
The bias IC of this kindisplay-kd101ne3 panel is placed
on the panel side, so when the panel is powered on,
there is no need to control AVDD and AVEE in the driver.
Signed-off-by: Zhaoxiong Lv
---
Chage since V2:
- Drop some properties that have al
Kingdisplay kd101ne3 and Starry er88577 both 10.1" WXGA TFT LCD panel,
And the two panels have the same timing, so add compatible for Kingdisplay
kd101ne3 and Starry er88577 in dt-bindings and drivers.
Changes in v2:
- PATCH 1/4: Delete some unnecessary information.
- PATCH 2/4: Use the new mipi_
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