c drm-misc-next
patch link:
https://lore.kernel.org/r/20240202120140.3517-4-tzimmermann%40suse.de
patch subject: [PATCH v2 3/8] firmware/sysfb: Set firmware-framebuffer parent
device
config: i386-buildonly-randconfig-003-20240203
(https://download.01.org/0day-ci/archive/20240204/20240204100
m/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20240202120140.3517-3-tzimmermann%40suse.de
patch subject: [PATCH v2 2/8] video: Provide screen_info_get_pci_dev() to find
screen_info's PCI device
config: i386-buildonly-randconfig-004-20240203
(https://download.01.org/0day-ci/a
tree: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
head: 3d94e7584486f7ac4a44fe215330ae6a1094e492
commit: 4db102dcb0396a4ccf89b1eac0f4eb3fd167a080 [1/1] Merge drm/drm-next into
drm-misc-next
config: arm64-randconfig-002-20240204
(https://download.01.org/0day-ci/archive/20240204/20
Hi Boris：
I saw this warning sometimes（Run on a armbain based bookworm），not sure is a
know issue or something else。
[15368.293031] systemd-journald[715]: Received client request to relinquish
/var/log/journal/1bc4a340506142af9bd31a6a3d2170ba access.
[37743.040737] [ cut here ]---
https://bugzilla.kernel.org/show_bug.cgi?id=213145
fichterfran...@gmail.com changed:
What|Removed |Added
CC||fichterfran...@gmail.com
--- C
-
2 files changed, 2 insertions(+), 2 deletions(-)
---
base-commit: 3d94e7584486f7ac4a44fe215330ae6a1094e492
change-id: 20240203-bus_cleanup-gpu-0f90574bce24
Best regards,
--
Ricardo B. Marliere
Now that the driver core can properly handle constant struct bus_type,
move the dp_aux_bus_type variable to be a constant structure as well,
placing it into read-only memory which can not be modified at runtime.
Cc: Greg Kroah-Hartman
Suggested-by: Greg Kroah-Hartman
Signed-off-by: Ricardo B. Ma
Now that the driver core can properly handle constant struct bus_type,
move the mipi_dsi_bus_type variable to be a constant structure as well,
placing it into read-only memory which can not be modified at runtime.
Cc: Greg Kroah-Hartman
Suggested-by: Greg Kroah-Hartman
Signed-off-by: Ricardo B.
c drm-misc-next
patch link:
https://lore.kernel.org/r/20240202120140.3517-4-tzimmermann%40suse.de
patch subject: [PATCH v2 3/8] firmware/sysfb: Set firmware-framebuffer parent
device
config: i386-buildonly-randconfig-002-20240203
(https://download.01.org/0day-ci/archive/20240204/20240204021
On Sat, Feb 03, 2024 at 03:25:02PM -0300, Ricardo B. Marliere wrote:
> This series is part of an effort to cleanup the users of the driver
> core, as can be seen in many recent patches authored by Greg across the
> tree (e.g. [1]). Specifically, this series is part of the task of
> splitting one of
Le 03/02/2024 à 17:52, Adam Ford a écrit :
From: Lucas Stach
This adds the driver for the Samsung HDMI PHY found on the
i.MX8MP SoC.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
Tested-by: Alexander Stein
---
...
+static int fsl_samsung_hdmi_phy_probe(struct platform_device *pde
The i.MX8M Plus has support for an HDMI transmitter. The
video is genereated by lcdif3, routed to the hdmi parallel
video interface, then fed to a DW HDMI bridge to support
up to 4K video output.
Signed-off-by: Adam Ford
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
di
From: Lucas Stach
This adds the DT nodes for all the peripherals that make up the
HDMI display pipeline.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
---
V2: I took this from Lucas' original submission with the following:
Removed extra clock from HDMI-TX since it is now part of t
From: Lucas Stach
Add a simple wrapper driver for the DWC HDMI bridge driver that
implements the few bits that are necessary to abstract the i.MX8MP
SoC integration.
Signed-off-by: Lucas Stach
Reviewed-by: Laurent Pinchart
Tested-by: Marek Vasut
Tested-by: Adam Ford #imx8mp-beacon
Tested-by:
From: Lucas Stach
The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
core with a little bit of SoC integration around it.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
---
V3: Change name and location to better idenfity as a bridge and
HDMI 2.0a transmitter
From: Lucas Stach
This IP block is found in the HDMI subsystem of the i.MX8MP SoC. It has a
full timing generator and can switch between different video sources. On
the i.MX8MP however the only supported source is the LCDIF. The block
just needs to be powered up and told about the polarity of the
From: Lucas Stach
Add binding for the i.MX8MP HDMI parallel video interface block.
Signed-off-by: Lucas Stach
Reviewed-by: Laurent Pinchart
Reviewed-by: Conor Dooley
Signed-off-by: Adam Ford
---
V8: Add interrupt-parent
V7: No Change
V6: Add s-o-b message for myself (Adam)
V5: I tried
From: Lucas Stach
This adds the PGC and HDMI blk-ctrl nodes providing power control for
HDMI subsystem peripherals.
Signed-off-by: Adam Ford
Signed-off-by: Lucas Stach
---
V2: Add missing power-domains hdcp and hrv
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 38 +++
1
From: Lucas Stach
The HDMI irqsteer is a secondary interrupt controller within the HDMI
subsystem that maps all HDMI peripheral IRQs into a single upstream
IRQ line.
Signed-off-by: Lucas Stach
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 13 +
1 file changed, 13 insertions(+)
d
According to i.MX8MP RM and HDMI ADD, the fdcc clock is part of
hdmi rx verification IP that should not enable for HDMI TX.
But actually if the clock is disabled before HDMI/LCDIF probe,
LCDIF will not get pixel clock from HDMI PHY and print the error
logs:
[CRTC:39:crtc-2] vblank wait timed out
W
Per guidance from the NXP downstream kernel, if the clock is
disabled before HDMI/LCDIF probe, LCDIF will not get pixel
clock from HDMI PHY and throw an error:
[CRTC:39:crtc-2] vblank wait timed out
WARNING: CPU: 2 PID: 9 at drivers/gpu/drm/drm_atomic_helper.c:
1634 drm_atomic_helper_w
From: Lucas Stach
Add a DT binding for the HDMI PHY found on the i.MX8MP SoC.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
Reviewed-by: Krzysztof Kozlowski
---
V3: Removed mintems at the request of Krzysztof and add his
reviewed-by
V2: I tried to help move this along, so I took
From: Lucas Stach
This adds the driver for the Samsung HDMI PHY found on the
i.MX8MP SoC.
Signed-off-by: Lucas Stach
Signed-off-by: Adam Ford
Tested-by: Alexander Stein
---
V4: Make lookup table hex values lower case.
V3: Re-order the Makefile to keep it alphabetical
Remove unused def
The i.MX8M Plus has an HDMI controller, but it depends on two
other systems, the Parallel Video Interface (PVI) and the
HDMI PHY from Samsung. The LCDIF controller generates the display
and routes it to the PVI which converts passes the parallel video
to the HDMI bridge. The HDMI system has a corr
On 02/02/2024 22:50, Jessica Zhang wrote:
The DSI host needs to be enabled for the panel to be initialized in
prepare(). Ensure this happens by setting prepare_prev_first.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/panel/panel-visionox-r66451.c | 1 +
1 file changed, 1 insertion(+)
di
m-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20240122082947.21645-3-dharma.b%40microchip.com
patch subject: [PATCH 2/3] drm/bridge: add lvds controller support for sam9x7
config: arm-randconfig-r112-20240203
(https://download.01.org/0day-ci/archive/20240203/20240203224
= 2,
- DP_TRAIN_PRE_EMPHASIS_MAX = DP_TRAIN_PRE_EMPHASIS_LVL_2,
-};
+#define DP_TRAIN_LEVEL_MAX 3
struct dp_link_test_video {
u32 test_video_pattern;
---
base-commit: 41d66f96d0f15a0a2ad6fa2208f6bac1a66cbd52
change-id: 20240203-dp-swing-3-b64ffce415d9
Best regards,
--
Dmitry Baryshkov
On 29.01.2024 11:23, Manikandan Muralidharan wrote:
> Add support for the following DPI mode if the encoder type
> is DSI as per the XLCDC IP datasheet:
> - 16BPPCFG1
> - 16BPPCFG2
> - 16BPPCFG3
> - 18BPPCFG1
> - 18BPPCFG2
> - 24BPP
>
> Signed-off-by: Manikandan Muralidharan
> [durai.manicka..
On 29.01.2024 11:23, Manikandan Muralidharan wrote:
> XLCDC in SAM9X7 has different sets of registers and additional
> configuration bits when compared to previous HLCDC IP. Read/write
> operation on the controller registers is now separated using the
> XLCDC status flag and with HLCDC and XLCDC
Hi, Manikandan,
On 29.01.2024 11:23, Manikandan Muralidharan wrote:
> Add is_xlcdc flag and LCD IP specific ops in driver data to differentiate
> XLCDC and HLCDC code within the atmel-hlcdc driver files.
I would first prepare the current code base for the addition of XLCDC by
first adding the str
On 29.01.2024 11:23, Manikandan Muralidharan wrote:
> Add the LCD controller layer definition and descriptor structure for
> sam9x75 for the following layers:
> - Base Layer
> - Overlay1 Layer
> - Overlay2 Layer
> - High End Overlay
>
> Signed-off-by: Manikandan Muralidharan
> ---
> drivers/g
ch subject: [PATCH v3 3/5] drm/amd: Fetch the EDID from _DDC if available
for eDP
config: i386-randconfig-004-20240203
(https://download.01.org/0day-ci/archive/20240203/202402032030.ibef5cme-...@intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
(https://downl
On Wed, Jan 31, 2024 at 10:00:22PM -0800, mhkelle...@gmail.com wrote:
> From: Michael Kelley
>
> A recent commit removing the use of screen_info introduced a logic
> error. The error causes hvfb_getmem() to always return -ENOMEM
> for Generation 2 VMs. As a result, the Hyper-V frame buffer
> devi
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