On 10/27/2023 2:18 PM, john.c.harri...@intel.com wrote:
From: John Harrison
Some platforms require holding RCS context switches until CCS is idle
(the reverse w/a of Wa_14014475959). Some platforms require both
versions.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/gen8_engine_cs
On 10/27/2023 2:18 PM, john.c.harri...@intel.com wrote:
From: John Harrison
Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a
super-set of Wa_16019325821, so requires turning that one as well as
setting the new flag for Wa_14019159160 itself.
Signed-off-by: John Harrison
On 10/27/2023 2:18 PM, john.c.harri...@intel.com wrote:
From: John Harrison
To prevent running out of bits, new w/a enable flags are being added
via a KLV system instead of a 32 bit flags word.
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
drivers
On Wed, Dec 13, 2023 at 10:49 PM Christoph Hellwig wrote:
>
> On Thu, Dec 14, 2023 at 06:20:27AM +, patchwork-bot+netdev...@kernel.org
> wrote:
> > Hello:
> >
> > This series was applied to netdev/net-next.git (main)
> > by Jakub Kicinski :
>
> Umm, this is still very broken in intraction wit
Hi Heiko:
On 12/13/23 22:46, Heiko Stuebner wrote:
On Mon, 11 Dec 2023 19:55:47 +0800, Andy Yan wrote:
From: Andy Yan
This patch sets aims at enable the VOP2 support on rk3588.
Main feature of VOP2 on rk3588:
Four video ports:
VP0 Max 4096x2160
VP1 Max 4096x2160
VP2 Max 4096x2160
VP3 Max 204
Hello:
This series was applied to netdev/net-next.git (main)
by Jakub Kicinski :
On Thu, 7 Dec 2023 16:52:31 -0800 you wrote:
> Major changes in v1:
> --
>
> 1. Implemented MVP queue API ndos to remove the userspace-visible
>driver reset.
>
> 2. Fixed issues in the napi_pp_put_
Hi Jani,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on tiwai-sound/for-next tiwai-sound/for-linus
drm-tip/drm-tip linus/master v6.7-rc5 next-20231213]
[If your patch is applied to the wrong git tree
By registering component related functions to the pointers,
we can easily manage them within a for-loop and simplify the
logic of clock control significantly.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adapt
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Signed-off-by: Hsiao Chien Sung
---
include/dt-bindings/reset/mt8188-resets.h | 75 +++
1 file changed, 75 insertions(+)
diff --git a/include/dt-bindin
Add MT8188 reset bit map for VDOSYS0 and VDOSYS1.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mt8188-mmsys.h | 84 +
drivers/soc/mediatek/mtk-mmsys.c| 7 ++-
2 files changed, 90 insertions(+), 1 deletion(-)
Different from OVL, OVL adaptor is a pseudo device so we didn't
define it in the device tree, consequently, pm_runtime_resume_and_get()
called by .atomic_enable() powers on no device. For this reason, we
implement a function to power on the RDMAs in OVL adaptor, and the
system will make sure the IO
Add MT8188 Padding to OVL adaptor to probe the driver.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 26 +++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/mediatek
- Add Padding components
- Add Mutex module definitions for Padding
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mtk-mutex.c | 16
include/linux/soc/mediatek/mtk-mmsys.h | 8
2 files changed, 24 insertions(+)
Add compatible name for MediaTek MT8188 MDP-RDMA.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../bindings/display/mediatek/mediatek,mdp-rdma.yaml| 6 +-
1 file changed, 5 insertions(+), 1 deletion(-
By registering component related functions to the pointers,
we can easily manage them within a for-loop and simplify the
logic of component start/stop process.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adap
Sort OVL adaptor components' names in alphabetical order.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/g
Add compatible name for MediaTek MT8188 MERGE.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
a/D
- Adjust indentation to align with other files
- Sort device table in alphabetical order
- Add sentinel to device table
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 15 ---
1 file c
Padding is a new hardware module on MediaTek MT8188,
add dt-bindings for it.
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../display/mediatek/mediatek,padding.yaml| 81 +++
1 file changed,
Padding is a new display module on MT8188, it provides ability
to add pixels to width and height of a layer with specified colors.
Due to hardware design, Mixer in VDOSYS1 requires width of a layer
to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
we need Padding to deal with odd width.
Do not reset Merge while using CMDQ because reset API doesn't
wait for frame done event as CMDQ does and could lead to
underrun when the layer is switching off.
Fixes: aaf94f7c3ae6 ("drm/mediatek: Add display merge async reset control")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Return the result of clk_prepare_enable() instead of
always returns 0.
Fixes: f8946e2b6bb2 ("drm/mediatek: Add display MDP RDMA support for MT8195")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 3 +--
Rename OVL_ADAPTOR_TYPE_RDMA to OVL_ADAPTOR_TYPE_MDP_RDMA
to align the naming rule of mtk_ovl_adaptor_comp_id.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 22 +--
1 file changed,
DPI input is in 1T2P mode on both MT8195 and MT8188.
Remove the redundant driver data to align the settings, or
the screen will glitch.
Fixes: 2847cd7e6403 ("drm/mediatek: Add mt8188 dpi compatibles and platform
data")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by:
Add component ID to component match structure so we can
configure them with a for-loop.
The main reason we do such code refactoring is that
there is a new hardware component called "Padding" since
MT8188, while MT8195 doesn't have this module, we can't
use the original logic to manage the componen
- The mmsys_dev_num in MT8188 VDOSYS0 was set to 1 since
VDOSYS1 was not available before. Increase it to support
VDOSYS1 in display driver.
- Add compatible name for MT8188 VDOSYS1
(shares the same driver data with MT8195 VDOSYS1)
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
- Reset ID must starts from 0 and be consecutive, but
the reset bits in our hardware design is not continuous,
some bits are left unused, we need a map to solve the problem
- Use old style 1-to-1 mapping if .rst_tb is not defined
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao C
Add compatible name for MediaTek MT8188 ETHDR.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../bindings/display/mediatek/mediatek,ethdr.yaml | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
Add compatible name for MediaTek MT8188 VDOSYS1.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Signed-off-by: Hsiao Chien Sung
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicet
- Add register definitions for MT8188
- Add VDOSYS1 routing table
- Update MUTEX definitions accordingly
- Set VSYNC length from 0x40 (default) to 1 since ETHDR is bypassed
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mt8188-mmsys.h | 126 +++
This series is based on mediatek-drm-next branch of
kernel/git/chunkuang.hu/linux.git
Changes in v12:
- Rebase on mediatek-drm-next branch of kernel/git/chunkuang.hu/linux.git
Changes in v11:
- Change "mtk-padding" to "mtk-disp-padding" for consistency
- Remove patch "drm/mediatek: Remove ineffec
> -Original Message-
> From: Rob Herring
> Sent: Thursday, December 14, 2023 4:12 AM
> To: Inki Dae ; Seung-Woo Kim
> ; Kyungmin Park
> ; Maarten Lankhorst
> ; Maxime Ripard
> ; Thomas Zimmermann ;
> David Airlie ; Daniel Vetter ;
Krzysztof
> Kozlowski ; Conor Dooley
> ; Alim Akhtar
>
Hi Keith:
在 2023-12-13 09:40:31，"Keith Zhao" 写道：
>
>
>On 2023/12/11 20:13, Andy Yan wrote:
>> Hi Keith：
>>
>> 在 2023-12-11 18:24:35，"Keith Zhao" 写道：
>>>hi Maxime:
>>>hi Andy:
>>>
>>>On 2023/12/8 17:14, Maxime Ripard wrote:
Hi,
On Fri, Dec 08, 2023 at 11:23:37AM +0800, Andy Yan
Hi Jani,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on tiwai-sound/for-next tiwai-sound/for-linus
drm-tip/drm-tip linus/master v6.7-rc5 next-20231213]
[If your patch is applied to the wrong git tree
On Thu, 7 Dec 2023 16:52:36 -0800 Mina Almasry wrote:
> +name: type
> +doc: rx or tx queue
> +type: u8
> +enum: queue-type
nit: the queue/napi GET was applied to net-next, would be good to stick
to the same types (s/u8/u32)
On Thu, 7 Dec 2023 16:52:34 -0800 Mina Almasry wrote:
> This API enables the net stack to reset the queues used for devmem.
Nice, thanks for moving this forward. FWIW when I started hacking on it
the API looked more like:
https://github.com/kuba-moo/linux/commit/7af8abfa4fdff248e21fc76aecc334004a
Quoting Douglas Anderson (2023-12-11 16:55:26)
> diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c
> b/drivers/gpu/drm/bridge/parade-ps8640.c
> index 8161b1a1a4b1..fb2ec4264549 100644
> --- a/drivers/gpu/drm/bridge/parade-ps8640.c
> +++ b/drivers/gpu/drm/bridge/parade-ps8640.c
> @@ -302,7 +302,7
./drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c:1418:2-3: Unneeded semicolon
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7743
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
Turns out we made a silly mistake when coming up with OR inheritance on
nouveau. On pre-DCB 4.1, iors are statically routed to output paths via the
DCB. On later generations iors are only routed to an output path if they're
actually being used. Unfortunately, it appears with NVIF_OUTP_INHERIT_V0 we
Nevermind - I don't think I'll need the logs, I stared at the code for long
enough and I think I realized what's happening.
I will have a patch for you to test in just a moment, just waiting for it to
compile so I can verify nothing else breaks
On Wed, 2023-12-13 at 18:48 -0500, Lyude Paul wrote:
Hi Jani,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on tiwai-sound/for-next tiwai-sound/for-linus
drm-tip/drm-tip linus/master v6.7-rc5 next-20231213]
[If your patch is applied to the wrong git tree, kindly drop
Hopefully you're still on at this point - if you are, could you try starting
the machine up with the following kernel module arguments passed to nouveau?
debug=disp=trace
Then see if you can find any lines that mention INHERIT? I have a feeling I'm
just going to have to add a workaround for the t
agh - thank you for repeatedly poking on this, I've been busy enough with GSP
work I totally missed this. Yes - I'm quite surprised that this is blowing up,
but considering that looks to be a GT218 I guess display state readback must
just work a bit differently there since that's really early on in
2023년 12월 14일 (목) 오전 7:43, Rob Herring 님이 작성:
> The correct property name is 'reg' not 'regs'.
>
Thanks,
Inki Dae
> Fixes: 68e89bb36d58 ("dt-bindings: display: samsung,exynos-mixer: convert
> to dtschema")
> Signed-off-by: Rob Herring
> ---
> .../bindings/display/samsung/samsung,exynos-mixer.
On Wed, 13 Dec 2023 13:30:16 -0800, Jessica Zhang wrote:
> This series drops the frame_count and enable parameters (as they're always
> set to the same value). It also sets input_sel=0x1 for INTF.
>
Applied, thanks!
[1/2] drm/msm/dpu: Set input_sel bit for INTF
https://gitlab.freedesktop
On Tue, 07 Nov 2023 02:43:33 +0200, Dmitry Baryshkov wrote:
> The funcion dp_display_get_next_bridge() can return -EPROBE_DEFER if the
> next bridge is not (yet) available. However returning -EPROBE_DEFER from
> msm_dp_modeset_init() is not ideal. This leads to -EPROBE return from
> component_bin
On Wed, 13 Dec 2023 at 20:58, Kuogee Hsieh wrote:
>
> At DSC V1.1 DCE (Display Compression Engine) contains a DSC encoder.
> However, at DSC V1.2 DCE consists of two DSC encoders, one has an odd
> index and another one has an even index. Each encoder can work
> independently. But only two DSC enco
The correct property name is 'reg' not 'regs'.
Fixes: 68e89bb36d58 ("dt-bindings: display: samsung,exynos-mixer: convert to
dtschema")
Signed-off-by: Rob Herring
---
.../bindings/display/samsung/samsung,exynos-mixer.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --g
Hi Dave, Sima,
Fixes for 6.7.
The following changes since commit b7b5a56acec819bb8dcd03c687e97a091b29d28f:
Merge tag 'exynos-drm-next-for-v6.7-rc5' of
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes
(2023-12-08 13:55:32 +1000)
are available in the Git reposit
On Wed, 13 Dec 2023 at 23:30, Jessica Zhang wrote:
>
> Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
> are always set to the same values.
>
> In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
> frame_count is always set to the same value.
>
> Fixes:
Le 13/12/2023 à 18:53, Rob Herring a écrit :
On Wed, Dec 13, 2023 at 03:03:41PM +0100, Dario Binacchi wrote:
The series adds drivers for the displays used by bsh-smm-s2/pro boards.
This required applying some patches to the samsung-dsim driver.
Changes in v6:
- Drop patches:
- [06/10] drm/pa
On 12/13/2023 1:30 PM, Jessica Zhang wrote:
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
are always set to the same values.
In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
frame_count is always set to the same value.
Fixes: 7b37523fb1d1 ("dr
On 12/13/2023 1:30 PM, Jessica Zhang wrote:
Set the input_sel bit for encoders as it was missed in the initial
implementation.
Reported-by: Rob Clark
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface")
Signed
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
are always set to the same values.
In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
frame_count is always set to the same value.
Fixes: 7b37523fb1d1 ("drm/msm/dpu: Move MISR methods to dpu_hw_util")
Rev
Set the input_sel bit for encoders as it was missed in the initial
implementation.
Reported-by: Rob Clark
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface")
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/
This series drops the frame_count and enable parameters (as they're always
set to the same value). It also sets input_sel=0x1 for INTF.
---
Changes in v4:
- Moved comment about input_sel to outside of dpu_hw_setup_misr()
- Link to v3:
https://lore.kernel.org/r/20231213-encoder-fixup
On 2023-12-07 13:02, Alex Deucher wrote:
Show buffers as shared if they are shared via dma-buf as well
(e.g., shared with v4l or some other subsystem).
You can add KFD to that list. With the in-progress CUDA11 VM changes and
improved interop between KFD and render nodes, sharing DMABufs betwee
On Tue, Dec 12, 2023 at 08:57:16AM -0800, Alan Previn wrote:
> If we are at the end of suspend or very early in resume
> its possible an async fence signal (via rcu_call) is triggered
> to free_engines which could lead us to the execution of
> the context destruction worker (after a prior worker fl
On 12/13/2023 1:20 PM, Dmitry Baryshkov wrote:
On Wed, 13 Dec 2023 at 22:51, Jessica Zhang wrote:
Set the input_sel bit for encoders as it was missed in the initial
implementation.
Reported-by: Rob Clark
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
Fixes: 91143873a05d ("drm/
Set the input_sel bit for encoders as it was missed in the initial
implementation.
Reported-by: Rob Clark
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface")
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/
This series drops the frame_count and enable parameters (as they're always
set to the same value). It also sets input_sel=0x1 for INTF.
---
Changes in v3:
- Changed input_sel to u8
- Link to v2:
https://lore.kernel.org/r/20231213-encoder-fixup-v2-0-b11a4ad35...@quicinc.com
Changes
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
are always set to the same values.
In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
frame_count is always set to the same value.
Fixes: 7b37523fb1d1 ("drm/msm/dpu: Move MISR methods to dpu_hw_util")
Rev
On Wed, 13 Dec 2023 at 22:51, Jessica Zhang wrote:
>
> Set the input_sel bit for encoders as it was missed in the initial
> implementation.
>
> Reported-by: Rob Clark
> Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
> Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for in
On 12/2/2023 4:32 PM, Dmitry Baryshkov wrote:
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/
On 12/2/2023 4:32 PM, Dmitry Baryshkov wrote:
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov
---
.../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h| 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/
On 12/2/2023 4:32 PM, Dmitry Baryshkov wrote:
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/
On Thu, Dec 7, 2023 at 1:03 PM Alex Deucher wrote:
>
> We had a request to add shared buffer stats to fdinfo for amdgpu and
> while implementing that, Christian mentioned that just looking at
> the GEM handle count doesn't take into account buffers shared with other
> subsystems like V4L or RDMA.
On 12/11/2023 10:23 PM, Dmitry Baryshkov wrote:
On Tue, 12 Dec 2023 at 02:30, Abhinav Kumar wrote:
On 12/2/2023 4:31 PM, Dmitry Baryshkov wrote:
I was not able to test it on my own, this is a call for testing for the
owners of these platforms. The git version of modetest now fully
suppor
On 12/13/2023 1:00 PM, Abhinav Kumar wrote:
On 12/13/2023 12:51 PM, Jessica Zhang wrote:
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as
they
are always set to the same values.
In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
frame_count is always
On 12/13/2023 12:51 PM, Jessica Zhang wrote:
Set the input_sel bit for encoders as it was missed in the initial
implementation.
Reported-by: Rob Clark
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface")
Signe
On 12/13/2023 12:51 PM, Jessica Zhang wrote:
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
are always set to the same values.
In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
frame_count is always set to the same value.
Fixes: 7b37523fb1d1 ("d
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
are always set to the same values.
In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
frame_count is always set to the same value.
Fixes: 7b37523fb1d1 ("drm/msm/dpu: Move MISR methods to dpu_hw_util")
Rev
Set the input_sel bit for encoders as it was missed in the initial
implementation.
Reported-by: Rob Clark
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface")
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/
This series drops the frame_count and enable parameters (as they're always
set to the same value). It also sets input_sel=0x1 for INTF.
---
Changes in v2:
- Switched patch order
- Changed input_sel parameter from bool to u8
- Link to v1:
https://lore.kernel.org/r/20231130-encoder-fixup-v1-0-585c5
Hi Heiko
Am 12.12.23 um 21:03 schrieb Heiko Stuebner:
Hi Alex,
Am Dienstag, 29. August 2023, 19:16:16 CET schrieb Alex Bee:
this series fixes some issues I found when testing my "new" RK3128 board
with the mainline kernel and adds some core functionality like SMP bringup,
usb and networking.
On 12/2/2023 11:54 AM, Dmitry Baryshkov wrote:
On 01/12/2023 23:29, Abhinav Kumar wrote:
On 11/30/2023 11:36 PM, Dmitry Baryshkov wrote:
On Fri, 1 Dec 2023 at 03:31, Jessica Zhang
wrote:
Set the input_sel bit for encoders as it was missed in the initial
implementation.
Reported-by: Rob
At DSC V1.1 DCE (Display Compression Engine) contains a DSC encoder.
However, at DSC V1.2 DCE consists of two DSC encoders, one has an odd
index and another one has an even index. Each encoder can work
independently. But only two DSC encoders from same DCE can be paired
to work together to support
The synaptics-r63353 (panel-bridge) can only be configured in command mode.
So, samsung-dsim (bridge) must not be in display mode during the
prepare()/unprepare() of the panel-bridge. Setting the
"pre_enable_prev_first" flag to true allows the prepare() of the
panel-bridge to be called between the
The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
platforms (i. e. not exynos).
Co-developed-by: Michael Trimarchi
Signed-off-by: Michael Trimarchi
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++-
1 file change
The series adds drivers for the displays used by bsh-smm-s2/pro boards.
This required applying some patches to the samsung-dsim driver and the
drm_bridge.c module.
Changes in v7:
- Drop [3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller
because applied.
Changes in v6:
- Dr
On 07/12/2023 06:18, Vignesh Raman wrote:
The patch series contains improvements, enabling new ci jobs which
enables testing for Mediatek MT8173, Qualcomm APQ 8016 and VirtIO GPU,
fixing issues with the ci jobs and updating the expectation files.
v2:
- Use fdtoverlay command to merge overl
On Mon, Dec 11, 2023 at 11:38:02PM -0800, Vivek Kasireddy wrote:
> +++ b/drivers/dma-buf/udmabuf.c
> @@ -42,7 +42,7 @@ static vm_fault_t udmabuf_vm_fault(struct vm_fault *vmf)
> if (pgoff >= ubuf->pagecount)
> return VM_FAULT_SIGBUS;
>
> - pfn = page_to_pfn(&ubuf->folios[p
On Mon, Dec 11, 2023 at 11:38:01PM -0800, Vivek Kasireddy wrote:
> @@ -42,7 +42,7 @@ static vm_fault_t udmabuf_vm_fault(struct vm_fault *vmf)
> if (pgoff >= ubuf->pagecount)
> return VM_FAULT_SIGBUS;
>
> - pfn = page_to_pfn(ubuf->pages[pgoff]);
> + pfn = page_to_pfn(&u
The ltk050h3148w variant expects the horizontal component lane byte clock
cycle(lbcc) to be calculated using lane_mbps (burst mode) instead of the
pixel clock.
Using the pixel clock rate by default for this calculation was introduced
in commit ac87d23694f4 ("drm/bridge: synopsys: dw-mipi-dsi: Use p
On Wed, 13 Dec 2023 15:03:44 +0100, Dario Binacchi wrote:
> From: Michael Trimarchi
>
> Add documentation for "synaptics,r63353" panel.
>
> Signed-off-by: Michael Trimarchi
> Signed-off-by: Dario Binacchi
> Reviewed-by: Krzysztof Kozlowski
>
> ---
>
> (no changes since v3)
>
> Changes in
On Wed, Dec 13, 2023 at 03:03:41PM +0100, Dario Binacchi wrote:
> The series adds drivers for the displays used by bsh-smm-s2/pro boards.
> This required applying some patches to the samsung-dsim driver.
>
> Changes in v6:
> - Drop patches:
> - [06/10] drm/panel: Add Synaptics R63353 panel drive
On Wed, 13 Dec 2023 15:50:45 +0100, Farouk Bouabid wrote:
> The ltk050h3148w variant expects the horizontal component lane byte clock
> cycle(lbcc) to be calculated using lane_mbps (burst mode) instead of the
> pixel clock.
> Using the pixel clock rate by default for this calculation was introduced
On 12/13/2023 6:50 AM, Farouk Bouabid wrote:
The ltk050h3148w variant expects the horizontal component lane byte clock
cycle(lbcc) to be calculated using lane_mbps (burst mode) instead of the
pixel clock.
Using the pixel clock rate by default for this calculation was introduced
in commit ac87d
On Wed, Dec 13, 2023 at 04:36:34PM +0100, Christoph Hellwig wrote:
> On Wed, Dec 13, 2023 at 08:31:55AM -0400, Jason Gunthorpe wrote:
> > > That is, populate a scatterlist with ubuf->pagecount number of entries,
> > > where each segment if of size PAGE_SIZE, in order to be consistent and
> > > supp
Hi Laurent and Maxime,
> -Original Message-
> From: Laurent Pinchart
> Sent: Wednesday, December 13, 2023 3:51 PM
> Subject: Re: [PATCH v15 3/5] drm: renesas: Add RZ/G2L DU Support
>
> On Wed, Dec 13, 2023 at 04:47:09PM +0100, Maxime Ripard wrote:
> > On Tue, Nov 28, 2023 at 10:51:27AM +
rwise you wouldn't have done that series in the first place.
BTW, I just noticed that my assertion "Most users \"know\" that
[clk_rate_exclusive_get() returns zero unconditionally]" is wrong. As of
next-20231213 there are 3 callers ignoring the return value of
clk_rate_exclus
Hi,
On Wed, Dec 13, 2023 at 7:34 AM Maxime Ripard wrote:
>
> > > > Repeating my comments from v1 here too, since I expect this patch to
> > > > sit on the lists for a little while:
> > > >
> > > >
> > > > This is OK w/ me, but it will need time on the mailing lists before
> > > > landing in case
On Wed, Dec 13, 2023 at 4:50 PM Laurent Pinchart
wrote:
> On Wed, Dec 13, 2023 at 04:47:09PM +0100, Maxime Ripard wrote:
> > On Tue, Nov 28, 2023 at 10:51:27AM +, Biju Das wrote:
> > > The LCD controller is composed of Frame Compression Processor (FCPVD),
> > > Video Signal Processor (VSPD), a
Introduce the Maintainers of the new drm/xe driver for upcoming
Intel GPUs.
Since it has a shared display with drm/i915, let's also create a
dedicated block to group display related files. But without any
substantial change to the i915 side. The display patches will
continue to flow through i915 f
On 2023-12-13 16:39, Felix Kuehling wrote:
> On 2023-12-13 9:20, Christian König wrote:
>> Am 12.12.23 um 00:32 schrieb Felix Kuehling:
>>> On 2023-12-11 04:50, Christian König wrote:
Am 08.12.23 um 20:53 schrieb Alex Deucher:
> [SNIP]
>> You also need a functionality which resets all
On Wed, Dec 13, 2023 at 12:54:14PM +0100, Maxime Ripard wrote:
> On Wed, Dec 13, 2023 at 12:08:29PM +0100, Uwe Kleine-König wrote:
> > On Wed, Dec 13, 2023 at 09:36:49AM +0100, Maxime Ripard wrote:
> > > On Wed, Dec 13, 2023 at 08:43:00AM +0100, Uwe Kleine-König wrote:
> > > > On Wed, Dec 13, 2023
On Wed, Dec 13, 2023 at 04:47:09PM +0100, Maxime Ripard wrote:
> On Tue, Nov 28, 2023 at 10:51:27AM +, Biju Das wrote:
> > The LCD controller is composed of Frame Compression Processor (FCPVD),
> > Video Signal Processor (VSPD), and Display Unit (DU).
> >
> > It has DPI/DSI interfaces and supp
On Wed, Dec 13, 2023 at 04:47:09PM +0100, Maxime Ripard wrote:
> On Tue, Nov 28, 2023 at 10:51:27AM +, Biju Das wrote:
> > +int rzg2l_du_vsp_init(struct rzg2l_du_vsp *vsp, struct device_node *np,
> > + unsigned int crtcs)
> > +{
> > + struct rzg2l_du_device *rcdu = vsp->dev;
>
On Tue, Nov 28, 2023 at 10:51:27AM +, Biju Das wrote:
> The LCD controller is composed of Frame Compression Processor (FCPVD),
> Video Signal Processor (VSPD), and Display Unit (DU).
>
> It has DPI/DSI interfaces and supports a maximum resolution of 1080p
> along with 2 RPFs to support the ble
Am 13.12.23 um 16:39 schrieb Felix Kuehling:
On 2023-12-13 9:20, Christian König wrote:
Am 12.12.23 um 00:32 schrieb Felix Kuehling:
On 2023-12-11 04:50, Christian König wrote:
Am 08.12.23 um 20:53 schrieb Alex Deucher:
[SNIP]
You also need a functionality which resets all cleared blocks to
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