Hi Ray,
Am 27.09.23 um 22:25 schrieb Ray Strode:
Hi,
On Wed, Sep 27, 2023 at 4:05 AM Christian König
wrote:
I'm not an expert for that stuff, but as far as I know the whole purpose
of the blocking functionality is to make sure that the CPU overhead
caused by the commit is accounted to the rig
Hi, Manikandan,
On 27.09.2023 12:47, Manikandan Muralidharan wrote:
> +void atmel_hlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane,
> + struct atmel_hlcdc_plane_state *state);
> +void atmel_xlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane,
> +
Hi Joakim,
Thanks very much for the reviewing.
On Wed, 2023-09-27 at 16:37 +0200, Joakim Bech wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On Mon, Sep 11, 2023 at 10:30:35AM +0800, Yong Wu wrote:
> > Add
On 9/27/2023 2:20 AM, Tvrtko Ursulin wrote:
On 27/09/2023 05:14, Balasubrawmanian, Vivaik wrote:
Due to a bug in GuC firmware, Mesa can't enable by default the usage
of compute engines in DG2 and newer.
A new GuC firmware fixed the issue but until now there was no way
for Mesa to know if KM
From: Martin Krastev
Implement drm_connector_helper_funcs.mode_valid and .get_modes,
replacing custom drm_connector_funcs.fill_modes code with
drm_helper_probe_single_connector_modes; for STDU, LDU & SOU
display units.
Signed-off-by: Martin Krastev
Reviewed-by: Zack Rusin
Signed-off-by: Zack R
From: Zack Rusin
Surfaces can be backed (i.e. stored in) memory objects (mob's) which
are created and managed by the userspace as GEM buffers. Surfaces
grab only a ttm reference which means that the gem object can
be deleted underneath us, especially in cases where prime buffer
export is used.
M
On Thu, 2023-09-28 at 11:12 +1000, Dave Airlie wrote:
> On Thu, 28 Sept 2023 at 07:55, Faith Ekstrand
> wrote:
> >
> > On Wed, 2023-09-27 at 03:22 +0200, Danilo Krummrich wrote:
> > > Report the maximum number of IBs that can be pushed with a single
> > > DRM_IOCTL_NOUVEAU_EXEC through DRM_IOCTL_
On Wed, 2023-09-27 at 10:47 +0100, Conor Dooley wrote:
> On Wed, Sep 27, 2023 at 07:19:28AM +, Moudy Ho (何宗原) wrote:
> > On Fri, 2023-09-22 at 16:51 +0100, Conor Dooley wrote:
> > > On Fri, Sep 22, 2023 at 04:49:14PM +0100, Conor Dooley wrote:
> > > > On Fri, Sep 22, 2023 at 03:21:12PM +0800, M
Reminder. Please review the reply comment.
Thanks and Regards,
Ramya SR
-Original Message-
From: Ramya SR
Sent: Tuesday, September 26, 2023 4:12 PM
To: Alex Deucher ; imre.d...@intel.com
Cc: Lyude Paul ; Jani Nikula ; Jeff
Layton ; linux-ker...@vger.kernel.org;
dri-devel@lists.freedesk
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/accel/ivpu/ivpu_fw.c
between commit:
645d694559ca ("accel/ivpu: Use cached buffers for FW loading")
from the drm-misc-fixes tree and commit:
53d98420f5f9 ("accel/ivpu: Move ivpu_fw_load() to ivpu_fw_init()")
fr
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn35/dcn35_fpu.c:261
dcn35_update_bw_bounding_box_fpu() warn: inconsistent indenting
Signed-off-by: Yang Li
---
.../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 144 +-
1 file changed, 72 insertions(+), 72 deletions(-)
diff --git a/d
On Thu, 28 Sept 2023 at 07:55, Faith Ekstrand
wrote:
>
> On Wed, 2023-09-27 at 03:22 +0200, Danilo Krummrich wrote:
> > Report the maximum number of IBs that can be pushed with a single
> > DRM_IOCTL_NOUVEAU_EXEC through DRM_IOCTL_NOUVEAU_GETPARAM.
> >
> > While the maximum number of IBs per ring
On 27/09/23 19:47, Maira Canal wrote:
> Hi Arthur,
>
> On 9/20/23 03:11, Arthur Grillo wrote:
>> The kunit_action_platform_driver_unregister is added with
>> &fake_platform_driver as ctx, but the kunit_release_action is called
>> pdev as ctx. Fix that by replacing it with &fake_platform_driver.
On Mon, Sep 25, 2023 at 09:40:46AM +0100, Tvrtko Ursulin wrote:
On 22/09/2023 23:25, john.c.harri...@intel.com wrote:
From: Umesh Nerlige Ramappa
Current engine busyness interface exposed by GuC has a few issues:
- The busyness of active engine is calculated using 2 values provided by
GuC
Hi Arthur,
On 9/20/23 03:11, Arthur Grillo wrote:
The kunit_action_platform_driver_unregister is added with
&fake_platform_driver as ctx, but the kunit_release_action is called
pdev as ctx. Fix that by replacing it with &fake_platform_driver.
Fixes: 4f2b0b583baa ("drm/tests: helpers: Switch to
On Wed, Sep 27, 2023 at 11:03:56PM +0200, Nirmoy Das wrote:
> During resume, the steer semaphore on GT1 was observed to be held. The
> hardware team has confirmed the safety of clearing the steer semaphore
> during driver load/resume, as no lock acquisitions can occur in this
> process by other age
On Wed, Sep 27, 2023 at 05:09:23PM +0300, Jani Nikula wrote:
> On Wed, 27 Sep 2023, Laurent Pinchart wrote:
> > On Thu, Sep 14, 2023 at 04:14:50PM +0300, Jani Nikula wrote:
> >> Make drm_bridge_get_edid() the one place to call the hook.
> >>
> >> Cc: Andrzej Hajda
> >> Cc: Neil Armstrong
> >> Cc
Hi Sergi,
Thanks for your comments.
On 27/09/2023 05:58, Sergi Blanch Torne wrote:
Hi Helen,
On Mon, 2023-09-25 at 16:55 -0300, Helen Koike wrote:
Hello,
This script is being very handy for me, so I suppose it could be
handy
to others, since I'm publishing it in the xfails folder.
Let m
On Wed, Sep 27, 2023 at 11:03:54PM +0200, Nirmoy Das wrote:
> Implement intel_gt_mcr_lock_reset() to provide a mechanism
> for resetting the steer semaphore when absolutely necessary.
>
> Signed-off-by: Nirmoy Das
> ---
> drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 29 ++
>
On Thu, 28 Sept 2023 at 01:01, Stephen Boyd wrote:
>
> Quoting Kuogee Hsieh (2023-09-25 09:07:18)
> >
> > On 9/22/2023 6:35 PM, Abhinav Kumar wrote:
> > >
> > > Doing link training when we get hpd instead of atomic_enable() is a
> > > design choice we have been following for a while because for th
Quoting Kuogee Hsieh (2023-09-25 09:07:18)
>
> On 9/22/2023 6:35 PM, Abhinav Kumar wrote:
> >
> > Doing link training when we get hpd instead of atomic_enable() is a
> > design choice we have been following for a while because for the case
> > when link training fails in atomic_enable() and setting
On Wed, 27 Sept 2023 at 23:54, Kuogee Hsieh wrote:
>
> After incorporated pm_runtime framework into eDP/DP driver, the
incorporating
> original dp_pm_suspend() to handle power off both DP phy and
> controller during suspend and dp_pm_resume() to handle power on
> both DP phy and controller duri
On Wed, 27 Sept 2023 at 23:54, Kuogee Hsieh wrote:
>
> Currently eDP population is done at msm_dp_modeset_init() which happen
> at binding time. Move eDP population to be done at display probe time
> so that probe deferral cases can be handled effectively.
> wait_for_hpd_asserted callback is added
On Wed, 2023-09-27 at 03:22 +0200, Danilo Krummrich wrote:
> Report the maximum number of IBs that can be pushed with a single
> DRM_IOCTL_NOUVEAU_EXEC through DRM_IOCTL_NOUVEAU_GETPARAM.
>
> While the maximum number of IBs per ring might vary between chipsets,
> the kernel will make sure that use
On Wed, 27 Sept 2023 at 23:54, Kuogee Hsieh wrote:
>
> Currently DP driver is executed independent of PM runtime framework.
> This lead to msm edp panel can not be detected by edp_panel driver at
> generic_edp_panel_probe() due to aux dpcd read failed at msm edp driver.
eDP, AUX, DPCD. leads. not
Quoting Abhinav Kumar (2023-09-22 18:35:27)
> On 9/22/2023 2:54 PM, Stephen Boyd wrote:
> > Quoting Dmitry Baryshkov (2023-09-19 02:50:12)
> >>
> >> This should be hpd_notify, who starts link training, not some event.
> >
> > I think this driver should train the link during atomic_enable(), not
> >
The drm-stats fdinfo tags made available to user space are drm-engine,
drm-cycles, drm-max-freq and drm-curfreq, one per job slot.
This deviates from standard practice in other DRM drivers, where a single
set of key:value pairs is provided for the whole render engine. However,
Panfrost has separat
Some BO's might be mapped onto physical memory chunkwise and on demand,
like Panfrost's tiler heap. In this case, even though the
drm_gem_shmem_object page array might already be allocated, only a very
small fraction of the BO is currently backed by system memory, but
drm_show_memory_stats will the
BO's RSS is updated every time new pages are allocated on demand and mapped
for the object at GPU page fault's IRQ handler, but only for heap buffers.
The reason this is unnecessary for non-heap buffers is that they are mapped
onto the GPU's VA space and backed by physical memory in their entirety
This patch series adds fdinfo support to the Panfrost DRM driver. It will
display a series of key:value pairs under /proc/pid/fdinfo/fd for render
processes that open the Panfrost DRM file.
The pairs contain basic drm gpu engine and memory region information that
can either be cat by a privileged
These GPU registers will be used when programming the cycle counter, which
we need for providing accurate fdinfo drm-cycles values to user space.
Signed-off-by: Adrián Larumbe
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panfrost/panfrost_regs.h | 5 +
1 file
A new DRM GEM object function is added so that drm_show_memory_stats can
provide more accurate memory usage numbers.
Ideally, in panfrost_gem_status, the BO's purgeable flag would be checked
after locking the driver's shrinker mutex, but drm_show_memory_stats takes
over the drm file's object handl
On Wed, 27 Sept 2023 at 23:54, Kuogee Hsieh wrote:
>
> Move parser->parse() and dp_power_client_init() from dp_display_bind()
> to dp_display_probe() in preparation of adding pm_runtime framework
> at next patch.
>
> Changes in v4:
> -- split this patch out of "incorporate pm_runtime framework int
On Wed, 27 Sept 2023 at 23:54, Kuogee Hsieh wrote:
>
> Move parser->parse() and dp_power_client_init() from dp_display_bind()
> to dp_display_probe() in preparation of adding pm_runtime framework
> at next patch.
This describes what the patch does, not why it is done. Could you
please rewrite it
On Wed, 27 Sept 2023 at 23:54, Kuogee Hsieh wrote:
>
> The is_connected flag is set to true after DP mainlink successfully
> finishes link training to enter into ST_MAINLINK_READY state.
... rather than being set after the DP dongle is connected.
> Rename
> the is_connected flag with link_ready
On Wed, 27 Sept 2023 at 23:54, Kuogee Hsieh wrote:
>
> Incorporate pm runtime framework into DP driver and clean up eDP
> by moving of_dp_aux_populate_bus() to probe().
Dear Kuogee. Let me quote my response to v1 of your series:
Please use sensible prefix for cover letters too. It helps people
u
On MTL GEN12_RING_FAULT_REG is not replicated so don't
do mcr based operation for this register.
v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt)
improve comment.
v4: improve the comment further(Andi)
Signed-off-by: Nirmoy Das
R
During resume, the steer semaphore on GT1 was observed to be held. The
hardware team has confirmed the safety of clearing the steer semaphore
during driver load/resume, as no lock acquisitions can occur in this
process by other agents.
v2: reset on resume not in intel_gt_init().
v3: do the reset o
Move early resume functions of gt to a proper file.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 6 ++
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 1 +
drivers/gpu/drm/i915/i915_driver.c| 6 ++
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/driver
Implement intel_gt_mcr_lock_reset() to provide a mechanism
for resetting the steer semaphore when absolutely necessary.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 29 ++
drivers/gpu/drm/i915/gt/intel_gt_mcr.h | 1 +
2 files changed, 30 inserti
On Wed, 27 Sept 2023 at 23:54, Kuogee Hsieh wrote:
>
> Currently the dp_display_irq_handler() is executed at msm_dp_modeset_init()
dp_display_request_irq()
> which ties irq registration to the DPU device's life cycle, while depending on
> resources that are released as the DP device is torn down
After incorporated pm_runtime framework into eDP/DP driver, the
original dp_pm_suspend() to handle power off both DP phy and
controller during suspend and dp_pm_resume() to handle power on
both DP phy and controller during resume are not necessary since
those function are replaced by dp_pm_runtime_
Currently eDP population is done at msm_dp_modeset_init() which happen
at binding time. Move eDP population to be done at display probe time
so that probe deferral cases can be handled effectively.
wait_for_hpd_asserted callback is added during drm_dp_aux_init()
to ensure eDP's HPD is up before pro
Currently the dp_display_irq_handler() is executed at msm_dp_modeset_init()
which ties irq registration to the DPU device's life cycle, while depending on
resources that are released as the DP device is torn down. Move register DP
driver irq handler at dp_display_probe() to have dp_display_irq_hand
EV_HPD_INIT_SETUP flag is used to trigger the initialization of external
DP host controller. Since external DP host controller initialization had
been incorporated into pm_runtime_resume(), this flag became obsolete.
msm_dp_irq_postinstall() which triggers EV_HPD_INIT_SETUP event is
obsoleted accor
Move parser->parse() and dp_power_client_init() from dp_display_bind()
to dp_display_probe() in preparation of adding pm_runtime framework
at next patch.
Changes in v4:
-- split this patch out of "incorporate pm_runtime framework into DP driver"
patch
Signed-off-by: Kuogee Hsieh
---
drivers/gp
Currently DP driver is executed independent of PM runtime framework.
This lead to msm edp panel can not be detected by edp_panel driver at
generic_edp_panel_probe() due to aux dpcd read failed at msm edp driver.
Incorporating pm runtime framework into DP driver so that both power and
clocks to enab
Currently DP driver use drm_helper_hpd_irq_event(), bypassing drm bridge
framework, to report HPD status changes to user space frame work.
Replace it with drm_bridge_hpd_notify() since DP driver is part of drm
bridge.
Signed-off-by: Kuogee Hsieh
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm
The is_connected flag is set to true after DP mainlink successfully
finishes link training to enter into ST_MAINLINK_READY state. Rename
the is_connected flag with link_ready flag to match the state of DP
driver's state machine.
Changes in v4:
-- reworded commit etxt
Signed-off-by: Kuogee Hsieh
Incorporate pm runtime framework into DP driver and clean up eDP
by moving of_dp_aux_populate_bus() to probe().
Kuogee Hsieh (8):
drm/msm/dp: tie dp_display_irq_handler() with dp driver
drm/msm/dp: rename is_connected with link_ready
drm/msm/dp: use drm_bridge_hpd_notify() to report HPD stat
On 9/22/2023 10:12 AM, Helen Koike wrote:
Add job that runs igt on top of vkms.
Signed-off-by: Helen Koike
Tested-by: Jessica Zhang
Acked-by: Jessica Zhang
---
See pipeline:
https://gitlab.freedesktop.org/helen.fornazier/linux/-/pipelines/990494
v2:
- do not mv modules to /lib/modu
On 9/22/2023 10:12 AM, Helen Koike wrote:
When building containers, some rust packages were installed without
locking the dependencies version, which got updated and started giving
errors like:
error: failed to compile `bindgen-cli v0.62.0`, intermediate artifacts can be
found at `/tmp/cargo
On Sun, Sep 3, 2023 at 8:05 PM Inki Dae wrote:
>
> 2023년 8월 29일 (화) 오전 7:38, Adam Ford 님이 작성:
> >
> > On Mon, Aug 28, 2023 at 10:59 AM Michael Tretter
> > wrote:
> > >
> > > From: Marco Felsch
> > >
> > > Since the MIPI configuration can be changed on demand it is very useful
> > > to print more
rcar_du_group_get() never returns a negative
error code (always returns 0), so change the comment
about returned value, turn function into void (return
code of rcar_du_group_get has been redundant for a
long time, so perhaps it's just not required) and
remove redundant error path handling in rcar_d
As &msgq->lock is acquired under both irq context from
gp102_sec2_intr() and softirq context from gm20b_pmu_recv(),
thus irq should be disabled while acquiring that lock, otherwise
there would be potential deadlock.
gm20b_pmu_recv()
--> nvkm_falcon_msgq_recv()
--> nvkm_falcon_msgq_open()
--> spin_
Hi,
On Wed, Sep 27, 2023 at 4:05 AM Christian König
wrote:
> I'm not an expert for that stuff, but as far as I know the whole purpose
> of the blocking functionality is to make sure that the CPU overhead
> caused by the commit is accounted to the right process.
I'm not an expert either, but that'
On 9/21/2023 3:41 AM, Tvrtko Ursulin wrote:
On 20/09/2023 22:56, Vinay Belgaumkar wrote:
Provide a bit to disable waitboost while waiting on a gem object.
Waitboost results in increased power consumption by requesting RP0
while waiting for the request to complete. Add a bit in the gem_wait()
On Wed, Sep 27, 2023 at 8:18 AM Benjamin Gaignard
wrote:
>
>
> Le 27/09/2023 à 15:46, Joakim Bech a écrit :
> > On Mon, Sep 25, 2023 at 12:49:50PM +, Yong Wu (吴勇) wrote:
> >> On Tue, 2023-09-12 at 11:32 +0200, AngeloGioacchino Del Regno wrote:
> >>> Il 12/09/23 08:17, Yong Wu (吴勇) ha scritto:
On Wed, Sep 27, 2023 at 6:46 AM Joakim Bech wrote:
>
> On Mon, Sep 25, 2023 at 12:49:50PM +, Yong Wu (吴勇) wrote:
> > On Tue, 2023-09-12 at 11:32 +0200, AngeloGioacchino Del Regno wrote:
> > > Il 12/09/23 08:17, Yong Wu (吴勇) ha scritto:
> > > > On Mon, 2023-09-11 at 11:29 +0200, AngeloGioacchin
On 2023-09-25 15:49, Melissa Wen wrote:
> From: Joshua Ashton
>
> Create drm_color_ctm_3x4 to support 3x4-dimension plane CTM matrix and
> convert DRM CTM to DC CSC float matrix.
>
> v3:
> - rename ctm2 to ctm_3x4 (Harry)
>
> Signed-off-by: Joshua Ashton
Reviewed-by: Harry Wentland
Harry
On 2023-09-25 15:49, Melissa Wen wrote:
> Map the plane CTM driver-specific property to DC plane, instead of DC
> stream. The remaining steps to program DPP block are already implemented
> on DC shared-code.
>
> v3:
> - fix comment about plane and CRTC CTMs priorities (Harry)
>
> Signed-off-by
On 2023-09-25 15:49, Melissa Wen wrote:
> From: Joshua Ashton
>
> Need to funnel the color caps through to these functions so it can check
> that the hardware is capable.
>
> v2:
> - remove redundant color caps assignment on plane degamma map (Harry)
> - pass color caps to degamma params
>
> v3
On 2023-09-25 15:49, Melissa Wen wrote:
> Map DC shaper LUT to DM plane color management. Shaper LUT can be used
> to delinearize and/or normalize the color space for computational
> efficiency and achiving specific visual styles. If a plane degamma is
> apply to linearize the color space, a cus
On 2023-09-25 15:49, Melissa Wen wrote:
> Add 3D LUT property for plane color transformations using a 3D lookup
> table. 3D LUT allows for highly accurate and complex color
> transformations and is suitable to adjust the balance between color
> channels. It's also more complex to manage and requ
On 27/09/2023 19:27, Felix Kuehling wrote:
[+Mukul]
On 2023-09-27 12:16, Arvind Yadav wrote:
This patch is to adjust the absolute doorbell offset
against the doorbell id considering the doorbell
size of 32/64 bit.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
Signed-o
On 2023-09-27 10:07, Harry Wentland wrote:
>
>
> On 2023-09-27 01:23, Christian König wrote:
>> Am 26.09.23 um 15:09 schrieb Harry Wentland:
>>>
>>> On 2023-09-26 01:56, Cong Liu wrote:
This patch fixes a null pointer dereference in the error message that is
printed when the Display
drm_panic will need the low-level drm_fb__line functions.
Signed-off-by: Jocelyn Falempe
---
drivers/gpu/drm/drm_format_helper.c | 3 ++-
include/drm/drm_format_helper.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_format_helper.c
b/drivers/g
Add support for the drm_panic module, which displays a user-friendly
message to the screen when a kernel panic occurs.
Signed-off-by: Jocelyn Falempe
---
drivers/gpu/drm/tiny/simpledrm.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/tiny/simpledrm.c b/dri
This module displays a user friendly message when a kernel panic
occurs. It currently doesn't contain any debug information,
but that can be added later.
v2
* Use get_scanout_buffer() instead of the drm client API.
(Thomas Zimmermann)
* Add the panic reason to the panic message (Nerdopolis)
*
This introduces a new drm panic handler, which displays a message when a panic
occurs.
So when fbcon is disabled, you can still see a kernel panic.
This is one of the missing feature, when disabling VT/fbcon in the kernel:
https://www.reddit.com/r/linux/comments/10eccv9/config_vtn_in_2023/
Fbcon
[+Mukul]
On 2023-09-27 12:16, Arvind Yadav wrote:
This patch is to adjust the absolute doorbell offset
against the doorbell id considering the doorbell
size of 32/64 bit.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/a
On 9/22/23 13:45, Boris Brezillon wrote:
On Wed, 20 Sep 2023 16:42:40 +0200
Danilo Krummrich wrote:
+ /**
+* @DRM_GPUVM_RESV_PROTECTED: GPUVM is protected externally by the
+* GPUVM's &dma_resv lock
I think we need to be more specific, and list the fields/operations
tha
On 9/22/23 13:58, Boris Brezillon wrote:
On Wed, 20 Sep 2023 16:42:39 +0200
Danilo Krummrich wrote:
+/**
+ * enum drm_gpuvm_flags - flags for struct drm_gpuvm
+ */
+enum drm_gpuvm_flags {
+ /**
+* @DRM_GPUVM_USERBITS: user defined bits
+*/
+ DRM_GPUVM_USERBITS = (1
Thanks for taking the time to review this Tvrtko, replies inline below.
On Wed, 2023-09-27 at 10:02 +0100, Tvrtko Ursulin wrote:
> On 26/09/2023 20:05, Alan Previn wrote:
> > When suspending, add a timeout when calling
> > intel_gt_pm_wait_for_idle else if we have a lost
> > G2H event that holds a
On 27-Sep-23 8:52 PM, Imre Deak wrote:
On Fri, Sep 22, 2023 at 03:45:45PM +0300, Imre Deak wrote:
Hi Mitul, Ankit, Swati, Vandita,
On Wed, Sep 13, 2023 at 11:35:58AM +0530, Mitul Golani wrote:
his patch series adds support for DSC fractional compressed bpp
for MTL+. The series starts with some
Adding felix.kuehl...@amd.com for review.
Thanks
~Arvind
On 9/27/2023 9:46 PM, Arvind Yadav wrote:
This patch is to adjust the absolute doorbell offset
against the doorbell id considering the doorbell
size of 32/64 bit.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
Si
Adding felix.kuehl...@amd.com for review.
Thanks
~Arvind
On 9/27/2023 9:46 PM, Arvind Yadav wrote:
On older chips, the absolute doorbell offset within
the doorbell page is based on the queue ID.
KFD is using queue ID and doorbell size to get an
absolute doorbell offset in userspace.
This patch
This patch is to adjust the absolute doorbell offset
against the doorbell id considering the doorbell
size of 32/64 bit.
Cc: Christian Koenig
Cc: Alex Deucher
Signed-off-by: Shashank Sharma
Signed-off-by: Arvind Yadav
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 11 ++-
On older chips, the absolute doorbell offset within
the doorbell page is based on the queue ID.
KFD is using queue ID and doorbell size to get an
absolute doorbell offset in userspace.
This patch is to adjust the absolute doorbell offset
against the doorbell id considering the doorbell
size of 32
On 9/25/23 17:59, Arnd Bergmann wrote:
From: Arnd Bergmann
After a recent change, two variables are only used in an #ifdef:
drivers/gpu/drm/nouveau/dispnv50/disp.c: In function 'nv50_sor_atomic_disable':
drivers/gpu/drm/nouveau/dispnv50/disp.c:1569:13: error: unused variable 'ret'
[-Werror=un
On 09/08/2023 17:53, Boris Brezillon wrote:
> Hello,
>
> This is the second version of the kernel driver meant to support new Mali
> GPUs which are delegating the scheduling to a firmware.
[...]
> I tried to Cc anyone that was involved in any development of the code
> I picked from panfrost, so
Add dynamic select available connector flow in mtk_drm_crtc_create()
and mtk_drm_crtc_atomic_enable().
In mtk_drm_crtc_create(), if there is a connector routes array in drm
driver data, all components definded in the connector routes array will
be checked and their encoder_index will be set.
In m
To support dynamic connector selection function, each ddp_comp need to
get their encoder_index to identify which connector should be selected.
Add encoder_index interface for mtk_ddp_comp_funcs to get the encoder
identifier by drm_encoder_index().
Then drm driver will call mtk_ddp_comp_encoder_ind
Add DDP_COMPONENT_DSI0 as a main display output selection on
MT8188 VDOSYS0.
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
Reviewed-by: Matthias Brugger
Reviewed-by: Fei Shao
Tested-by: Fei Shao
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --g
Add implementation of mtk_dsi_encoder_index to mtk_ddp_comp_func
to make mtk_dsi support dynamic connector selection.
Signed-off-by: Jason-JH.Lin
Reviewed-by: CK Hu
Reviewed-by: Fei Shao
Tested-by: Fei Shao
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_dr
Add missing mmsys_dev_num to mt8188 vdosys0 driver data.
Fixes: 54b48080278a ("drm/mediatek: Add mediatek-drm of vdosys0 support for
mt8188")
Signed-off-by: Jason-JH.Lin
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Fei Shao
Tested-by: Fei Shao
---
drivers/gpu/drm
Add implementation of mtk_dpi_encoder_index to mtk_ddp_comp_func
to make mtk_dpi support dynamic connector selection.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_dpi.c | 9 +
drivers/gpu/drm/mediatek/mtk_drm_ddp
Add mtk_drm_crtc_path enum for each display path.
Instead of using array index of all_drm_priv in mtk_drm_kms_init(),
mtk_drm_crtc_path enum can make code more readable.
Signed-off-by: Jason-JH.Lin
Reviewed-by: Fei Shao
Reviewed-by: CK Hu
Tested-by: Fei Shao
---
drivers/gpu/drm/mediatek/mtk_
To support DSI and eDP as main display connector without modifying
mtk-drm driver, we add connector dynamic selection capability.
Change in v10:
1. rebase to Linux 6.6-rc3.
2. separate the common part of adding encoder_index interface for ddp_comp
to a single patch.
3. separate the DP_INTF0 sup
According to mtk_drm_kms_init(), the all_drm_private array in each
drm private data stores all drm private data in display path order.
In mtk_drm_get_all_drm_priv(), each element in all_drm_priv should have one
display path private data, such as:
all_drm_priv[CRTC_MAIN] should only have main_path
Move DDP_COMPONENT_DP_INTF0 from mt8188_mtk_ddp_main array to a
connector routes array called mt8188_mtk_ddp_main_routes to support
dynamic selection capability for mt8188.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 7 ++-
1 file changed, 6 insertions(+), 1 dele
On Wed, Sep 27, 2023 at 05:18:39PM +0200, Andi Shyti wrote:
> From: Nirmoy Das
>
> Commit f1530f912ed8 ("drm/i915/gt: Apply workaround 22016122933
> correctly") adds the workaround only in non media GT's, which is
This is backwards; the workaround is applied only to the media GT and
not to the p
On Mon, 25 Sep 2023 15:49:29 -0700, Douglas Anderson wrote:
> As per the discussion on the lists [1], changes to this driver
> generally flow through drm-misc. Add a tag in MAINTAINERS to document
> this
>
> [1]
> https://lore.kernel.org/r/20230925054710.r3guqn5jzdl4g...@fsr-ub1664-121.ea.freesca
On 9/23/2023 11:45 AM, Dmitry Baryshkov wrote:
On Sat, 23 Sept 2023 at 02:03, Kuogee Hsieh wrote:
On 9/15/2023 5:29 PM, Dmitry Baryshkov wrote:
On Sat, 16 Sept 2023 at 00:38, Kuogee Hsieh wrote:
Currently the dp_display_irq_handler() is executed at msm_dp_modeset_init()
which ties irq reg
On Fri, Sep 22, 2023 at 03:45:45PM +0300, Imre Deak wrote:
Hi Mitul, Ankit, Swati, Vandita,
> On Wed, Sep 13, 2023 at 11:35:58AM +0530, Mitul Golani wrote:
> > his patch series adds support for DSC fractional compressed bpp
> > for MTL+. The series starts with some fixes, followed by patches that
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