Multiple displays may be connected to the same bus and share a D/C GPIO,
so the display driver needs exclusive access to the bus to ensure that
it can control the D/C GPIO safely.
Signed-off-by: Otto Pflüger
Reviewed-by: Noralf Trønnes
---
drivers/gpu/drm/drm_mipi_dbi.c | 17 +
Displays that are connected to the same SPI bus may share the D/C GPIO.
Use GPIOD_FLAGS_BIT_NONEXCLUSIVE to allow access to the same GPIO for
multiple panel-mipi-dbi instances. Exclusive access to the GPIO during
transfers is ensured by the locking in drm_mipi_dbi.c.
Signed-off-by: Otto Pflüger
-
When multiple displays are connected to the same SPI bus, the data/command
switch is sometimes considered part of the bus and is shared among the
displays.
This series adds the GPIO_FLAGS_BIT_NONEXCLUSIVE flag for this GPIO and
SPI bus locking to the panel-mipi-dbi/drm_mipi_dbi drivers to support
On Sun, 23 Jul 2023 03:01:42 +0300
Dmitry Osipenko wrote:
> Panfrost IRQ handler may stuck for a long time, for example this happens
> when there is a bad HDMI connection and HDMI handler takes a long time to
> finish processing, holding Panfrost. Make Panfrost's job timeout handler
> to sync IRQ
From: ruanjinjie
Use the devm_platform_ioremap_resource() helper instead of calling
platform_get_resource() and devm_ioremap_resource() separately.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/tegra/hdmi.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm
ERROR: "foo * bar" should be "foo *bar"
Signed-off-by: Ran Sun
---
drivers/gpu/drm/drm_legacy.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_legacy.h b/drivers/gpu/drm/drm_legacy.h
index 70c9dba114a6..f098a48cbdf4 100644
--- a/drivers/gpu/drm/drm
On 21. 07. 23, 15:53, Andy Shevchenko wrote:
abs_diff() belongs to math.h. Move it there.
This will allow others to use it.
Signed-off-by: Andy Shevchenko
Reviewed-by: Jiri Slaby # tty/serial
--
--
js
suse labs
Hi Tomi,
Am Freitag, 21. Juli 2023, 17:01:39 CEST schrieb Tomi Valkeinen:
> DRM bridges are not visible to the userspace and it may not be
> immediately clear if the chain is somehow constructed incorrectly. I
> have had two separate instances of a bridge driver failing to do a
> drm_bridge_attach
Hi,
Am Freitag, 21. Juli 2023, 16:56:17 CEST schrieb Dan Carpenter:
> This is calling request_threaded_irq() but the thread parameter is NULL
> so it's actually not a threaded irq. Which is a bit misleading. Call
> request_irq() instead.
>
> Signed-off-by: Dan Carpenter
> ---
> drivers/gpu/dr
Hi all,
On Wed, 12 Jul 2023 09:17:14 +1000 Stephen Rothwell
wrote:
>
> On Thu, 30 Mar 2023 07:28:26 -0700 Rob Clark wrote:
> >
> > On Wed, Mar 29, 2023 at 8:28 PM Stephen Rothwell
> > wrote:
> > >
> > > After merging the drm tree, today's linux-next build (htmldocs) produced
> > > this warn
Fixes the following checkpatch errors:
ERROR: do not use assignment in if condition
Signed-off-by: Ran Sun
---
drivers/gpu/drm/radeon/radeon_legacy_tv.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c
b/drivers/gpu/drm/radeon
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/radeon/rv770_smc.c | 36 ++
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/radeon/rv770_smc.c
b/drivers/gpu/drm/radeon/rv770_smc.c
in
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/radeon/clearstate_si.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/clearstate_si.h
b/drivers/gpu/drm/radeon/clearstate_si.h
index 356219c6c7f2..7
ERROR: else should follow close brace '}'
ERROR: space required after that ',' (ctx:VxV)
Signed-off-by: Ran Sun
---
drivers/gpu/drm/radeon/radeon_connectors.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c
b/drivers/gpu/drm/
ERROR: that open brace { should be on the previous line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/radeon/ni_dpm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c
b/drivers/gpu/drm/radeon/ni_dpm.c
index a101ba00ea30..1cf4de4cda23 100644
---
ERROR: space required after that ';' (ctx:BxV)
Signed-off-by: Ran Sun
---
drivers/gpu/drm/radeon/radeon_vce.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_vce.c
b/drivers/gpu/drm/radeon/radeon_vce.c
index ca4a36464340..d1871af967d4 1006
ERROR: open brace '{' following struct go on the same line
Signed-off-by: Ran Sun
---
drivers/gpu/drm/radeon/sislands_smc.h | 51 +--
1 file changed, 17 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/radeon/sislands_smc.h
b/drivers/gpu/drm/radeon/sislands_
[AMD Official Use Only - General]
Gentle ping on this series.
Hi Rafael and Andrew,
Can you help to check this latest series and share your thoughts if any?
BR,
Evan
> -Original Message-
> From: Quan, Evan
> Sent: Wednesday, July 19, 2023 5:00 PM
> To: raf...@kernel.org; l...@kernel.or
Add a check to avoid null pointer dereference as below:
[ 90.002283] general protection fault, probably for non-canonical
address 0xdc00: [#1] PREEMPT SMP KASAN NOPTI
[ 90.002292] KASAN: null-ptr-deref in range
[0x-0x0007]
[ 90.002346] ? exc_gene
Sumitra Sharma wrote:
> The GFP_DMA32 uses the DMA32 zone to satisfy the allocation
> requests. Therefore, pages allocated with GFP_DMA32 cannot
> come from Highmem.
>
> Avoid using calls to kmap() / kunmap() as the kmap() is being
> deprecated [1].
>
> Avoid using calls to kmap_local_page() / ku
From: shanzhulig
[ Upstream commit 2e54154b9f27262efd0cb4f903cc7d5ad1fe9628 ]
fence Decrements the reference count before exiting.
Avoid Race Vulnerabilities for fence use-after-free.
v2 (chk): actually fix the use after free and not just move it.
Signed-off-by: shanzhulig
Signed-off-by: Chri
From: shanzhulig
[ Upstream commit 2e54154b9f27262efd0cb4f903cc7d5ad1fe9628 ]
fence Decrements the reference count before exiting.
Avoid Race Vulnerabilities for fence use-after-free.
v2 (chk): actually fix the use after free and not just move it.
Signed-off-by: shanzhulig
Signed-off-by: Chri
From: shanzhulig
[ Upstream commit 2e54154b9f27262efd0cb4f903cc7d5ad1fe9628 ]
fence Decrements the reference count before exiting.
Avoid Race Vulnerabilities for fence use-after-free.
v2 (chk): actually fix the use after free and not just move it.
Signed-off-by: shanzhulig
Signed-off-by: Chri
From: shanzhulig
[ Upstream commit 2e54154b9f27262efd0cb4f903cc7d5ad1fe9628 ]
fence Decrements the reference count before exiting.
Avoid Race Vulnerabilities for fence use-after-free.
v2 (chk): actually fix the use after free and not just move it.
Signed-off-by: shanzhulig
Signed-off-by: Chri
From: shanzhulig
[ Upstream commit 2e54154b9f27262efd0cb4f903cc7d5ad1fe9628 ]
fence Decrements the reference count before exiting.
Avoid Race Vulnerabilities for fence use-after-free.
v2 (chk): actually fix the use after free and not just move it.
Signed-off-by: shanzhulig
Signed-off-by: Chri
From: shanzhulig
[ Upstream commit 2e54154b9f27262efd0cb4f903cc7d5ad1fe9628 ]
fence Decrements the reference count before exiting.
Avoid Race Vulnerabilities for fence use-after-free.
v2 (chk): actually fix the use after free and not just move it.
Signed-off-by: shanzhulig
Signed-off-by: Chri
From: shanzhulig
[ Upstream commit 2e54154b9f27262efd0cb4f903cc7d5ad1fe9628 ]
fence Decrements the reference count before exiting.
Avoid Race Vulnerabilities for fence use-after-free.
v2 (chk): actually fix the use after free and not just move it.
Signed-off-by: shanzhulig
Signed-off-by: Chri
From: hackyzh002
[ Upstream commit f828b681d0cd566f86351c0b913e6cb6ed8c7b9c ]
The type of size is unsigned, if size is 0x4000, there will be an
integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later
Reviewed-by: Christian K
From: hackyzh002
[ Upstream commit f828b681d0cd566f86351c0b913e6cb6ed8c7b9c ]
The type of size is unsigned, if size is 0x4000, there will be an
integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later
Reviewed-by: Christian K
From: hackyzh002
[ Upstream commit f828b681d0cd566f86351c0b913e6cb6ed8c7b9c ]
The type of size is unsigned, if size is 0x4000, there will be an
integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later
Reviewed-by: Christian K
From: Lang Yu
[ Upstream commit 187916e6ed9d0c3b3abc27429f7a5f8c936bd1f0 ]
When using cpu to update page tables, vm update fences are unused.
Install stub fence into these fence pointers instead of NULL
to avoid NULL dereference when calling dma_fence_wait() on them.
Suggested-by: Christian Kön
From: hackyzh002
[ Upstream commit f828b681d0cd566f86351c0b913e6cb6ed8c7b9c ]
The type of size is unsigned, if size is 0x4000, there will be an
integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later
Reviewed-by: Christian K
From: Lang Yu
[ Upstream commit 187916e6ed9d0c3b3abc27429f7a5f8c936bd1f0 ]
When using cpu to update page tables, vm update fences are unused.
Install stub fence into these fence pointers instead of NULL
to avoid NULL dereference when calling dma_fence_wait() on them.
Suggested-by: Christian Kön
From: hackyzh002
[ Upstream commit f828b681d0cd566f86351c0b913e6cb6ed8c7b9c ]
The type of size is unsigned, if size is 0x4000, there will be an
integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later
Reviewed-by: Christian K
From: Daniel Miess
[ Upstream commit 17fbdbda9cc87ff5a013898de506212d25323ed7 ]
[Why and How]
Add back debug bits enabling RCO for dcn314 as underflow
associated with this change has been resolved
Acked-by: Stylon Wang
Signed-off-by: Daniel Miess
Reviewed-by: Jun Lei
Tested-by: Daniel Wheele
From: Nicholas Kazlauskas
[ Upstream commit 30f90f3c1c2c63c2fa44f61233737d27b72637c2 ]
[Why]
Hardware implements root clock gating by utilizing the DPP DTO registers
with a special case of DTO enabled, phase = 0, modulo = 1. This
conflicts with our policy to always update the DPPDTO for cases wh
From: Michel Dänzer
[ Upstream commit 8e1b45c578b799510f9a01a9745a737e74f43cb1 ]
This reverts commit 474f01015ffdb74e01c2eb3584a2822c64e7b2be.
Caused a regression:
Samsung Odyssey Neo G9, running at 5120x1440@240/VRR, connected to Navi
21 via DisplayPort, blanks and the GPU hangs while startin
From: Alvin Lee
[ Upstream commit 7e60ab4eb3e4ba2adac46d737fdbbc5732bebd58 ]
[Description]
- Previously we wanted to apply extra 60us of prefetch for min DCFCLK
(200Mhz), but DCFCLK can be calculated to be 201Mhz which underflows
also without the extra prefetch
- Instead, apply the the extra
From: Lang Yu
[ Upstream commit 187916e6ed9d0c3b3abc27429f7a5f8c936bd1f0 ]
When using cpu to update page tables, vm update fences are unused.
Install stub fence into these fence pointers instead of NULL
to avoid NULL dereference when calling dma_fence_wait() on them.
Suggested-by: Christian Kön
From: Wolfram Sang
[ Upstream commit 2da4b728f994a1f9189a8066b0be90b615768764 ]
R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds. These become a maintenance
burden now, so our development group decided to remove upstream support
for th
From: Raphael Gallais-Pou
[ Upstream commit 898a9e3f56db9860ab091d4bf41b6caa99aafc3d ]
In ltdc_crtc_set_crc_source(), struct drm_crtc was dereferenced in a
container_of() before the pointer check. This could cause a kernel panic.
Fix this smatch warning:
drivers/gpu/drm/stm/ltdc.c:1124 ltdc_crt
From: hackyzh002
[ Upstream commit 87c2213e85bd81e4a9a4d0880c256568794ae388 ]
The type of size is unsigned int, if size is 0x4000, there will
be an integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later.
Reviewed-by: Christ
From: Jack Xiao
[ Upstream commit 31d7c3a4fc3d312a0646990767647925d5bde540 ]
The fences associated with mes queue have to be freed
up during amdgpu_ring_fini.
Signed-off-by: Jack Xiao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/
From: hackyzh002
[ Upstream commit f828b681d0cd566f86351c0b913e6cb6ed8c7b9c ]
The type of size is unsigned, if size is 0x4000, there will be an
integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later
Reviewed-by: Christian K
From: Longlong Yao
[ Upstream commit 01382501509871d0799bab6bd412c228486af5bf ]
The following call trace is observed when removing the amdgpu driver, which
is caused by that BOs allocated for psp are not freed until removing.
[61811.450562] RIP: 0010:amddrm_buddy_fini.cold+0x29/0x47 [amddrm_bud
From: Wesley Chalmers
[ Upstream commit e101bf95ea87ccc03ac2f48dfc0757c6364ff3c7 ]
[WHY]
Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a
pipe commit can cause underflow.
[HOW]
Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets
optimized_required.
This
From: Daniel Miess
[ Upstream commit 17fbdbda9cc87ff5a013898de506212d25323ed7 ]
[Why and How]
Add back debug bits enabling RCO for dcn314 as underflow
associated with this change has been resolved
Acked-by: Stylon Wang
Signed-off-by: Daniel Miess
Reviewed-by: Jun Lei
Tested-by: Daniel Wheele
From: Nicholas Kazlauskas
[ Upstream commit 30f90f3c1c2c63c2fa44f61233737d27b72637c2 ]
[Why]
Hardware implements root clock gating by utilizing the DPP DTO registers
with a special case of DTO enabled, phase = 0, modulo = 1. This
conflicts with our policy to always update the DPPDTO for cases wh
From: Lang Yu
[ Upstream commit 5daff15cd013422bc6d1efcfe82b586800025384 ]
Root PD BO should be reserved before unmap and remove
a bo_va from VM otherwise lockdep will complain.
v2: check fpriv->csa_va is not NULL instead of amdgpu_mcbp (christian)
[14616.936827] WARNING: CPU: 6 PID: 1711 at
From: Lijo Lazar
[ Upstream commit 1718e973e3d23b653cd77994073a9deda3875689 ]
Populate metrics data table for SMU v13.0.6. Add PCIe link speed/width
information also.
Signed-off-by: Lijo Lazar
Reviewed-by: Le Ma
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
.../drm/amd/pm/swsm
From: Michel Dänzer
[ Upstream commit 360930985ec9f394c82ba0b235403b4a366d1560 ]
This reverts commit e101bf95ea87ccc03ac2f48dfc0757c6364ff3c7.
Caused a regression:
Samsung Odyssey Neo G9, running at 5120x1440@240/VRR, connected to Navi
21 via DisplayPort, blanks and the GPU hangs while startin
From: Alvin Lee
[ Upstream commit 7e60ab4eb3e4ba2adac46d737fdbbc5732bebd58 ]
[Description]
- Previously we wanted to apply extra 60us of prefetch for min DCFCLK
(200Mhz), but DCFCLK can be calculated to be 201Mhz which underflows
also without the extra prefetch
- Instead, apply the the extra
From: Saaem Rizvi
[ Upstream commit 3e8d74cb128fb1a4d56270ffbecea6056c55739a ]
[WHY]
Currently, there is an intermittent issue where a screen can either go
blank or be corrupted.
[HOW]
To resolve the issue we trigger the ramping logic for DIO FIFO so that
it goes back up to the correct speed.
From: Daniel Miess
[ Upstream commit 3a31e8b89b7240d9a17ace8a1ed050bdcb560f9e ]
[Why]
Calls to dcn20_adjust_freesync_v_startup are no longer
needed as of dcn3+ and can cause underflow in some cases
[How]
Move calls to dcn20_adjust_freesync_v_startup up into
validate_bandwidth for dcn2.x
Review
From: Lang Yu
[ Upstream commit 187916e6ed9d0c3b3abc27429f7a5f8c936bd1f0 ]
When using cpu to update page tables, vm update fences are unused.
Install stub fence into these fence pointers instead of NULL
to avoid NULL dereference when calling dma_fence_wait() on them.
Suggested-by: Christian Kön
From: Moti Haimovski
[ Upstream commit 314a7ffd7c196b27eedd50cb7553029e17789b55 ]
This commit fixes a memory leak caused when clearing the user_mappings
info when a new context is opened immediately after user_mapping is
captured and a hard reset is performed.
Signed-off-by: Moti Haimovski
Rev
From: Ofir Bitton
[ Upstream commit d8b9cea584661b30305cf341bf9f675dc0a25471 ]
Currently upon a heartbeat failure, we don't know if the failure
is due to firmware hang or due to a bad PCI link. Hence, we
are reading a PCI config space register with a known value (vendor ID)
so we will know which
From: Wolfram Sang
[ Upstream commit 2da4b728f994a1f9189a8066b0be90b615768764 ]
R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds. These become a maintenance
burden now, so our development group decided to remove upstream support
for th
From: Raphael Gallais-Pou
[ Upstream commit 898a9e3f56db9860ab091d4bf41b6caa99aafc3d ]
In ltdc_crtc_set_crc_source(), struct drm_crtc was dereferenced in a
container_of() before the pointer check. This could cause a kernel panic.
Fix this smatch warning:
drivers/gpu/drm/stm/ltdc.c:1124 ltdc_crt
From: Aurabindo Pillai
[ Upstream commit f38129bb081758176dd78304faaee95007fb8838 ]
This reverts commit 80c6d6804f31451848a3956a70c2bcb1f07cfcb0.
The orignal commit was intended as a workaround to prevent underflow and
flickering when using one normal monitor and the other high refresh rate
moni
From: Jack Xiao
[ Upstream commit 31d7c3a4fc3d312a0646990767647925d5bde540 ]
The fences associated with mes queue have to be freed
up during amdgpu_ring_fini.
Signed-off-by: Jack Xiao
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/
From: hackyzh002
[ Upstream commit 87c2213e85bd81e4a9a4d0880c256568794ae388 ]
The type of size is unsigned int, if size is 0x4000, there will
be an integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later.
Reviewed-by: Christ
From: hackyzh002
[ Upstream commit f828b681d0cd566f86351c0b913e6cb6ed8c7b9c ]
The type of size is unsigned, if size is 0x4000, there will be an
integer overflow, size will be zero after size *= sizeof(uint32_t),
will cause uninitialized memory to be referenced later
Reviewed-by: Christian K
From: Longlong Yao
[ Upstream commit 01382501509871d0799bab6bd412c228486af5bf ]
The following call trace is observed when removing the amdgpu driver, which
is caused by that BOs allocated for psp are not freed until removing.
[61811.450562] RIP: 0010:amddrm_buddy_fini.cold+0x29/0x47 [amddrm_bud
From: Danilo Krummrich
[ Upstream commit 96c7c2f4d5bd94b15fe63448c087f01607b56f4a ]
It already happend a few times that patches slipped through which
implemented access to an entity through a job that was already removed
from the entities queue. Since jobs and entities might have different
lifec
From: Alvin Lee
[ Upstream commit 128c1ca0303fe764a4cde5f761e72810d9e40b6e ]
[Why&How]
- Implement interface to program DTBCLK DTO’s
according to reference DTBCLK returned by PMFW
- This is required because DTO programming
requires exact DTBCLK reference freq or it could
result in underflo
From: Wesley Chalmers
[ Upstream commit e101bf95ea87ccc03ac2f48dfc0757c6364ff3c7 ]
[WHY]
Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a
pipe commit can cause underflow.
[HOW]
Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets
optimized_required.
This
On Sun, 23 Jul 2023 at 01:12, Faith Ekstrand wrote:
>
> On Wed, Jul 19, 2023 at 7:15 PM Danilo Krummrich wrote:
>>
>> This commit provides the implementation for the new uapi motivated by the
>> Vulkan API. It allows user mode drivers (UMDs) to:
>>
>> 1) Initialize a GPU virtual address (VA) spac
On 7/18/23 21:33, Doug Anderson wrote:
Hi,
On Tue, Jul 18, 2023 at 10:37 AM Marek Vasut wrote:
On 7/18/23 18:15, Doug Anderson wrote:
Hi,
Hi,
On Tue, Jul 18, 2023 at 8:36 AM Marek Vasut wrote:
On 7/18/23 16:17, Doug Anderson wrote:
Hi,
Hi,
On Sun, Jul 9, 2023 at 6:52 AM Marek Vas
Hi Melissa,
On 7/23/23 18:00, Melissa Wen wrote:
On 07/23, Maíra Canal wrote:
Following the DRM assumption, VKMS currently assumes that the alpha is
pre-multiplied. Moreover, it doesn't support the alpha property.
So, first, implement the alpha property to VKMS and then, the blend
mode propert
On 07/23, Maíra Canal wrote:
> Following the DRM assumption, VKMS currently assumes that the alpha is
> pre-multiplied. Moreover, it doesn't support the alpha property.
>
> So, first, implement the alpha property to VKMS and then, the blend
> mode property. In order to support all possible support
On 7/20/23 12:26, Otto Pflüger wrote:
> Multiple displays may be connected to the same bus and share a D/C GPIO,
> so the display driver needs exclusive access to the bus to ensure that
> it can control the D/C GPIO safely.
>
> Signed-off-by: Otto Pflüger
> ---
> drivers/gpu/drm/drm_mipi_dbi.
Hi Arnaud & Molly,
overall the driver looks very good!
On Wed, Jul 19, 2023 at 5:20 PM Arnaud Ferraris
wrote:
> From: Molly Sophia
>
> Novatek NT35596s is a generic DSI IC that drives command and video mode
> panels. Add the driver for it. Currently add support for the LCD panel
> from JDI con
Add the DT nodes that describe the MDSS hardware on SM6125, containing
one MDP (display controller) together with a single DSI and DSI PHY. No
DisplayPort support is added for now.
Reviewed-by: Konrad Dybcio
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marijn Suijten
---
arch/arm64/boot/dts/q
Enable and configure the dispcc node on SM6125 for consumption by MDSS
later on.
Signed-off-by: Marijn Suijten
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi
b/arch/arm64/boot/dts/q
Enable MDSS and DSI, and configure the Samsung SOFEF01-M ams597ut01
6.0" 1080x2520 panel.
Reviewed-by: Konrad Dybcio
Signed-off-by: Marijn Suijten
---
.../dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 59 ++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/d
We have a working RPM XO clock; no other driver except rpmcc should be
parenting directly to the fixed-factor xo_board clock nor should it be
reachable by that global name. Remove the name to that effect, so that
every clock relation is explicitly defined in DTS.
Reviewed-by: Konrad Dybcio
Signe
SM6125 features only a single PHY (despite a secondary PHY PLL source
being available to the disp_cc_mdss_pclk0_clk_src clock), and downstream
sources for this "trinket" SoC do not define the typical "vcca"
regulator to be available nor used. This, including the register offset
is identical to QCM
Document availability of the 14nm DSI PHY on SM6125. Note that this
compatible uses the SoC-suffix variant, intead of postfixing an
arbitrary number without the sm/sdm portion. The PHY is not powered by
a vcca regulator like on most SoCs, but by the MX power domain that is
provided via the power-
SM6125 has an UBWC 3.0 decoder but only an UBWC 1.0 encoder.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marijn Suijten
---
drivers/gpu/drm/msm/msm_mdss.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index dd22d0bd1
Add definitions for the display hardware used on the Qualcomm SM6125
platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marijn Suijten
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 236 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 7 +
drivers/gpu/
Document general compatibility of the DSI controller on SM6125.
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Marijn Suijten
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documen
SM6125 is identical to SM6375 including the throttle clock that is also
provided to the MDP node downstream. Note that any SoC other than
SM6375 (currently SC7180 and SM6350) has an unconstrained maximum number
of clocks and could either pass or leave out this "throttle" clock.
Signed-off-by: Mar
Document the SM6125 MDSS.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Marijn Suijten
---
.../bindings/display/msm/qcom,sm6125-mdss.yaml | 213 +
1 file changed, 213 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml
b/Do
The "gcc_disp_gpll0_div_clk_src" clock is consumed by the driver, will
be passed from DT, and should be required by the bindings.
Fixes: 8397c9c0c26b ("dt-bindings: clock: add QCOM SM6125 display clock
bindings")
Reviewed-by: Rob Herring
Signed-off-by: Marijn Suijten
---
Documentation/devicetr
This node has always resided in the wrong spot, making it somewhat
harder to contribute new node entries while maintaining proper sorting
around it. Move the node up to sit after hsusb_phy1 where it maintains
proper numerical sorting on the (first of its many) reg address
property.
Fixes: cff4bba
On SM6125 the dispcc block is gated behind VDDCX: allow this domain to
be configured.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Marijn Suijten
---
.../devicetree/bindings/clock/qcom,dispcc-sm6125.yaml| 16
1 file changed, 16 insertions(+)
diff --git a/Documentation/devi
APPS IOMMU is the only node in sm6125.dtsi that doesn't have its
address padded to 8 hexadecimals; fix this by prepending a 0.
Fixes: 8ddb4bc3d3b5 ("arm64: dts: qcom: sm6125: Configure APPS SMMU")
Signed-off-by: Marijn Suijten
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 +-
1 file changed, 1 in
Both SM6350 and SM6375 support only a single DSI link, and don't have a
corresponding dsi1 node in DTS. Their examples should not suggest an
output interface port on the display-controller node to this inexistant
DSI host, with a dsi1_in label reference that doesn't exist in the
example either.
F
Bring up the SM6125 DPU now that all preliminary series (such as INTF
TE) have been merged (for me to test the hardware properly), and most
other conflicting work (barring ongoing catalog *improvements*) has made
its way in as well or is still being discussed.
The second part of the series complem
The regulator setup was likely copied from other SoCs by mistake. Just
like SM6125 the DSI PHY on this platform is not getting power from a
regulator but from the MX power domain.
Fixes: 572e9fd6d14a ("drm/msm/dsi: Add phy configuration for QCM2290")
Reviewed-by: Konrad Dybcio
Reviewed-by: Abhin
Following the DRM assumption, VKMS currently assumes that the alpha is
pre-multiplied. Moreover, it doesn't support the alpha property.
So, first, implement the alpha property to VKMS and then, the blend
mode property. In order to support all possible supported modes,
change the pre_mul_blend_chan
Hi Maxime,
On 7/20/23 08:15, Maxime Ripard wrote:
Hi,
Since v6.5-rc1, kunit gained a devm/drmm-like mechanism that makes tests
resources much easier to cleanup.
This series converts the existing tests to use those new actions where
relevant.
> Let me know what you think,
With the problems po
This is a note to let you know that I've just added the patch titled
dma-buf/dma-resv: Stop leaking on krealloc() failure
to the 6.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
dm
This is a note to let you know that I've just added the patch titled
dma-buf/dma-resv: Stop leaking on krealloc() failure
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
dm
On 7/20/23 12:26, Otto Pflüger wrote:
> Displays that are connected to the same SPI bus may share the D/C GPIO.
> Use GPIOD_FLAGS_BIT_NONEXCLUSIVE to allow access to the same GPIO for
> multiple panel-mipi-dbi instances. Exclusive access to the GPIO during
> transfers is ensured by the locking i
On 7/20/23 12:26, Otto Pflüger wrote:
> Multiple displays may be connected to the same bus and share a D/C GPIO,
> so the display driver needs exclusive access to the bus to ensure that
> it can control the D/C GPIO safely.
>
> Signed-off-by: Otto Pflüger
> ---
Reviewed-by: Noralf Trønnes
On 21/07/2023 14:25, Viktar Simanenka wrote:
> On Fri, Jul 21, 2023 at 11:42 AM Krzysztof Kozlowski
> wrote:
>>
>> On 20/07/2023 14:40, Viktar Simanenka wrote:
>>> +allOf:
>>> + - $ref: panel/panel-common.yaml#
>>
>> This is not a panel, is it?
>
> I can't clearly tell the difference between LCD
1 - 100 of 101 matches
Mail list logo