As this function can be replaced with drm_dev_unregister() + drm_dev_put(),
it is already marked as deprecated, so remove it. No functional change.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/drm_drv.c | 28
drivers/gpu/drm/drm_pci.c | 3 ++-
Hi,
On 2023/6/22 01:53, Lucas Stach wrote:
Am Donnerstag, dem 22.06.2023 um 01:31 +0800 schrieb Sui Jingfeng:
Hi,
On 2023/6/22 00:07, Lucas Stach wrote:
And as the HW guarantees it on your platform, your platform
implementation makes this function effectively a no-op. Skipping the
call to thi
Hi,
On 2023/6/22 01:45, Lucas Stach wrote:
Am Donnerstag, dem 22.06.2023 um 01:21 +0800 schrieb Sui Jingfeng:
Hi,
On 2023/6/21 23:58, Lucas Stach wrote:
Am Mittwoch, dem 21.06.2023 um 23:30 +0800 schrieb Sui Jingfeng:
Hi,
On 2023/6/21 18:00, Lucas Stach wrote:
dma_sync_sgta
On 2023/6/24 19:08, Qi Zheng wrote:
Hi Dave,
On 2023/6/24 06:19, Dave Chinner wrote:
On Fri, Jun 23, 2023 at 09:10:57PM +0800, Qi Zheng wrote:
On 2023/6/23 14:29, Dave Chinner wrote:
On Thu, Jun 22, 2023 at 05:12:02PM +0200, Vlastimil Babka wrote:
On 6/22/23 10:53, Qi Zheng wrote:
Yes, I
On 6/24/2023 8:03 AM, Dmitry Baryshkov wrote:
On 24/06/2023 17:17, Abhinav Kumar wrote:
On 6/24/2023 5:07 AM, Dmitry Baryshkov wrote:
On 24/06/2023 03:09, Abhinav Kumar wrote:
On 6/22/2023 5:13 PM, Dmitry Baryshkov wrote:
On 23/06/2023 02:48, Ryan McCann wrote:
Currently, the device co
Hi Arthur,
Thanks for working on this feature for the VKMS!
On 6/21/23 16:41, Arthur Grillo wrote:
Support a 1D gamma LUT with interpolation for each color channel on the
VKMS driver. Add a check for the LUT length by creating
vkms_atomic_check().
Tested with:
igt@kms_color@gamma
igt@kms_color
Swap tests parameters names so they actually reflect what is being tested.
v1: https://lore.kernel.org/all/20230623152518.8603-1-gcar...@disroot.org/
v2: Simplified commit message.
Signed-off-by: Carlos Eduardo Gallo Filho
Reviewed-by: André Almeida
Reviewed-by: Maíra Canal
---
drivers/gpu/dr
Hi edagarmarjara,
First, you need to include a commit message to the patch. Check [1] to
see a basic guide to submit patches.
On 6/19/23 20:22, edagarmarjara wrote:
---
drivers/gpu/drm/tests/drm_rect_test.c | 30 +++
1 file changed, 30 insertions(+)
diff --git a/dr
Hi Carlos,
Great catch!
On 6/23/23 12:25, Carlos Eduardo Gallo Filho wrote:
The "YVU420 DRM_MODE_FB_MODIFIERS set without modifier" test
hadn't DRM_MODE_FB_MODIFIERS set, so that it was in fact testing
another case, while the "YVU420 Normal sizes" test in turn was with
DRM_MODE_FB_MODIFIERS set
On Fri, Jun 23, 2023 at 02:56:46PM -0700, Matt Roper wrote:
On Fri, Jun 23, 2023 at 02:05:20PM -0700, Lucas De Marchi wrote:
On Fri, Jun 23, 2023 at 12:48:13PM -0700, Kenneth Graunke wrote:
> On Friday, June 23, 2023 8:49:05 AM PDT Lucas De Marchi wrote:
> > On Thu, Jun 22, 2023 at 04:37:21PM -0
On 15/06/2023 04:38, Sandor Yu wrote:
Allow HDMI PHYs to be configured through the generic
functions through a custom structure added to the generic union.
The parameters added here are based on HDMI PHY
implementation practices. The current set of parameters
should cover the potential users.
The comment on the parameter being 0 to avoid the read back doesn't
apply as this is not a call to wa_mcr_add(), but rather to
wa_mcr_clr_set(). So, this register is actually checked and it's
according to the Bspec that the register is RW, not RO.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/d
Now that non-masked registers are already read before programming the
context reads, the additional read became redudant, so remove it.
Signed-off-by: Lucas De Marchi
Reviewed-by: Kenneth Graunke
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
1 file changed, 1 insertion(+), 4 deleti
v2 of https://patchwork.freedesktop.org/series/119766/
Main change from v1 is the preparatory patch to handle GEN12_FF_MODE2.
This is a register that can't be read back since it's affected by
another workaround.
Also add some other cleanups/fixes nearby. Tested on DG2 with intel_reg
reading 0xb15
Most of the context workarounds tweak masked registers, but not all. For
masked registers, when writing the value it's sufficient to just write
the wa->set_bits since that will take care of both the clr and set bits
as well as not overwriting other bits.
However there are some workarounds, the reg
Move helper function to get all the forcewakes required by the wa list
to the top, so it can be re-used by other functions.
Signed-off-by: Lucas De Marchi
Reviewed-by: Kenneth Graunke
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 32 ++---
1 file changed, 16 insertions(+), 1
Contrary to GEN12_FF_MODE2, platforms using XEHP_FF_MODE2 are not
affected by Wa_1608008084, hence read back can be enabled.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i
Right now context workarounds don't do a rmw and instead only write to
the register. Since 2 separate programmings to the same register are
coalesced into a single write, this is not problematic for
GEN12_FF_MODE2 since both TDS and GS timer are going to be written
together and the other remaining
Hi,
On 2023/6/22 01:45, Lucas Stach wrote:
Again,
this is user-space things!
this is user-space things!
this is user-space things!
I have explained several times.
made the decision for the user-space program is wrong.
This mode of communication isn't helpful. Please stop it.
As I tried t
Hi,
On 2023/6/21 18:16, Lucas Stach wrote:
Am Mittwoch, dem 21.06.2023 um 17:20 +0800 schrieb Sui Jingfeng:
Hi,
On 2023/6/21 17:07, Lucas Stach wrote:
Am Dienstag, dem 20.06.2023 um 17:47 +0800 schrieb Sui Jingfeng:
From: Sui Jingfeng
Because getting IRQ from a device is platform-dependent
On 24/06/2023 17:17, Abhinav Kumar wrote:
On 6/24/2023 5:07 AM, Dmitry Baryshkov wrote:
On 24/06/2023 03:09, Abhinav Kumar wrote:
On 6/22/2023 5:13 PM, Dmitry Baryshkov wrote:
On 23/06/2023 02:48, Ryan McCann wrote:
Currently, the device core dump mechanism does not dump registers
of sub
On Sat, Jun 24, 2023, at 15:26, Guenter Roeck wrote:
> On 6/24/23 02:27, Arnd Bergmann wrote:
>> On Sat, Jun 24, 2023, at 03:55, Guenter Roeck wrote:
>>>
>>> On Mon, Apr 17, 2023 at 02:56:49PM +0200, Thomas Zimmermann wrote:
Other architectures implment fb_is_primary_device() in a source
On 6/24/2023 5:07 AM, Dmitry Baryshkov wrote:
On 24/06/2023 03:09, Abhinav Kumar wrote:
On 6/22/2023 5:13 PM, Dmitry Baryshkov wrote:
On 23/06/2023 02:48, Ryan McCann wrote:
Currently, the device core dump mechanism does not dump registers of
sub
blocks within the DSPP, SSPP, DSC, and PI
On 24/06/2023 03:41, Marijn Suijten wrote:
Enable and configure the dispcc node on SM6125 for consumption by MDSS
later on.
Signed-off-by: Marijn Suijten
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/
On 24/06/2023 04:49, Konrad Dybcio wrote:
On 24.06.2023 02:41, Marijn Suijten wrote:
SM6125 features only a single PHY (despite a secondary PHY PLL source
being available to the disp_cc_mdss_pclk0_clk_src clock), and downstream
sources for this "trinket" SoC do not define the typical "vcca"
regu
On 24/06/2023 03:41, Marijn Suijten wrote:
Document availability of the 14nm DSI PHY on SM6125.
Signed-off-by: Marijn Suijten
---
Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/
On 6/24/23 02:27, Arnd Bergmann wrote:
On Sat, Jun 24, 2023, at 03:55, Guenter Roeck wrote:
On Mon, Apr 17, 2023 at 02:56:49PM +0200, Thomas Zimmermann wrote:
Other architectures implment fb_is_primary_device() in a source
file. Do the same on sparc. No functional changes, but allows to
remove
On 23/06/2023 02:48, Ryan McCann wrote:
Currently, the device core dump mechanism does not dump registers of sub
blocks within the DSPP, SSPP, DSC, and PINGPONG blocks. Add wrapper
function to dump hardware blocks that contain sub blocks.
Signed-off-by: Ryan McCann
---
drivers/gpu/drm/msm/dis
On 24/06/2023 04:23, Jessica Zhang wrote:
On 6/23/2023 5:09 PM, Abhinav Kumar wrote:
On 6/22/2023 5:13 PM, Dmitry Baryshkov wrote:
On 23/06/2023 02:48, Ryan McCann wrote:
Currently, the device core dump mechanism does not dump registers of
sub
blocks within the DSPP, SSPP, DSC, and PINGPO
On 24/06/2023 03:09, Abhinav Kumar wrote:
On 6/22/2023 5:13 PM, Dmitry Baryshkov wrote:
On 23/06/2023 02:48, Ryan McCann wrote:
Currently, the device core dump mechanism does not dump registers of sub
blocks within the DSPP, SSPP, DSC, and PINGPONG blocks. Add wrapper
function to dump hardwar
Hi Chuck,
On 2023/6/24 05:49, Chuck Lever wrote:
On Thu, Jun 22, 2023 at 04:53:21PM +0800, Qi Zheng wrote:
In preparation for implementing lockless slab shrink,
we need to dynamically allocate the nfsd-client shrinker,
so that it can be freed asynchronously using kfree_rcu().
Then it doesn't ne
Hi Dave,
On 2023/6/24 06:19, Dave Chinner wrote:
On Fri, Jun 23, 2023 at 09:10:57PM +0800, Qi Zheng wrote:
On 2023/6/23 14:29, Dave Chinner wrote:
On Thu, Jun 22, 2023 at 05:12:02PM +0200, Vlastimil Babka wrote:
On 6/22/23 10:53, Qi Zheng wrote:
Yes, I suggested the IDR route because radix t
Hi,
On 2023/6/22 17:21, Geert Uytterhoeven wrote:
Now that drm_device is embedded in shmob_drm_device, we can use
a container_of()-based helper to get the shmob_drm_device pointer from
the drm_device, instead of using the deprecated drm_device.dev_private
field.
While at it, restore reverse Xma
Hi,
I'm fine with this patch but I I don't see the benefit.
This reply is more about my personal question.
On 2023/6/22 17:21, Geert Uytterhoeven wrote:
Replace the call to the legacy drm_handle_vblank() function with a call
to the new drm_crtc_handle_vblank() helper.
Signed-off-by: Geert U
On 24/06/2023 02:41, Marijn Suijten wrote:
> Document availability of the 14nm DSI PHY on SM6125.
>
> Signed-off-by: Marijn Suijten
> ---
> Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/
On 24/06/2023 02:41, Marijn Suijten wrote:
> Document the SM6125 MDSS.
>
> Signed-off-by: Marijn Suijten
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
On Sat, Jun 24, 2023, at 03:55, Guenter Roeck wrote:
>
> On Mon, Apr 17, 2023 at 02:56:49PM +0200, Thomas Zimmermann wrote:
>> Other architectures implment fb_is_primary_device() in a source
>> file. Do the same on sparc. No functional changes, but allows to
>> remove several include statement from
On 24/06/2023 02:41, Marijn Suijten wrote:
> SM6125 is identical to SM6375 except that while downstream also defines
> a throttle clock, its presence results in timeouts whereas SM6375
> requires it to not observe any timeouts.
Then it should not be allowed, so you need either "else:" block or
ano
On 24/06/2023 02:41, Marijn Suijten wrote:
> Document general compatibility of the DSI controller on SM6125.
>
> Signed-off-by: Marijn Suijten
> ---
> Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Krzysztof Kozlows
On 24/06/2023 02:41, Marijn Suijten wrote:
> On SM6125 the dispcc block is gated behind VDDCX: allow this domain to
> be configured.
>
> Signed-off-by: Marijn Suijten
> ---
> Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml | 5 +
> 1 file changed, 5 insertions(+)
Acked-by:
On 24/06/2023 03:45, Konrad Dybcio wrote:
> On 24.06.2023 02:41, Marijn Suijten wrote:
>> The "gcc_disp_gpll0_div_clk_src" clock is consumed by the driver, will
>> be passed from DT, and should be required by the bindings.
>>
>> Fixes: 8397c9c0c26b ("dt-bindings: clock: add QCOM SM6125 display cloc
On 24/06/2023 02:41, Marijn Suijten wrote:
> The downsteam driver for dispcc only ever gets and puts this clock
> without ever using it in the clocktree; this unnecessary workaround was
> never ported to mainline, hence the driver doesn't consume this clock
> and shouldn't be required by the bindin
From: Sui Jingfeng
Because the 'else' is not generally useful after the 'return'.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
b/drivers/gpu/drm/etnaviv/et
Hi Vlastimil,
On 2023/6/22 22:47, Vlastimil Babka wrote:
On 6/22/23 10:53, Qi Zheng wrote:
To prepare for the dynamic allocation of shrinker instances
embedded in other structures, add a private_data field to
struct shrinker, so that we can use shrinker::private_data
to record and get the origi
Hi Sergey,
On 2023/6/23 13:25, Sergey Senozhatsky wrote:
On (23/06/22 16:53), Qi Zheng wrote:
+/*
+ * Remove one
+ */
+void unregister_shrinker(struct shrinker *shrinker)
+{
+ struct dentry *debugfs_entry;
+ int debugfs_id;
+
+ if (!(shrinker->flags & SHRINKER_REGISTERED))
+
From: Sui Jingfeng
This make the code in etnaviv_pdev_probe() less twisted, drop the reference
to device node after finished. Also kill a double blank line.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 32 ++-
1 file changed, 22 insertions(+),
Hi Steven,
The email you replied to was the failed version (due to the error
below), so I copied your reply and replied to you on this successful
version.
(4.7.1 Error: too many recipients from 49.7.199.173)
On 2023/6/23 18:01, Steven Price wrote:
> On 22/06/2023 09:39, Qi Zheng wrote:
>> From:
From: Sui Jingfeng
Also rename the virtual master device as etnaviv_platform_device,
for better reflection that it is a platform device, not a DRM device.
Another benefit is that we no longer need to call of_node_put() for three
different cases, Instead, we only need to call it once.
Signed-off-
From: Sui Jingfeng
Because it is not used by the etnaviv_gem_new_impl() function,
no functional change.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
b/driv
From: Sui Jingfeng
No functional change.
Sui Jingfeng (8):
drm/etnaviv: Using the size_t variable to store the number of pages
drm/etnaviv: Using the unsigned int type to count the number of pages
drm/etnaviv: Drop the second argument of the etnaviv_gem_new_impl()
drm/etnaviv: Remove sur
Hi Dave,
On 2023/6/23 14:12, Dave Chinner wrote:
On Thu, Jun 22, 2023 at 04:53:08PM +0800, Qi Zheng wrote:
Introduce some helpers for dynamically allocating shrinker instance,
and their uses are as follows:
1. shrinker_alloc_and_init()
Used to allocate and initialize a shrinker instance, the
On 2023/6/23 14:29, Dave Chinner wrote:
On Thu, Jun 22, 2023 at 05:12:02PM +0200, Vlastimil Babka wrote:
On 6/22/23 10:53, Qi Zheng wrote:
@@ -1067,33 +1068,27 @@ static unsigned long shrink_slab(gfp_t gfp_mask, int
nid,
if (!mem_cgroup_disabled() && !mem_cgroup_is_root(memcg))
From: Sui Jingfeng
No functional change.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
index 00223a874909..cef97bb9c99f 100
Please remove Bob Lee from this email group.
He is deceased
On Thu, Jun 22, 2023, 1:56 AM Qi Zheng wrote:
> In preparation for implementing lockless slab shrink,
> we need to dynamically allocate the drm-panfrost shrinker,
> so that it can be freed asynchronously using kfree_rcu().
> Then it do
Hi Vlastimil,
On 2023/6/22 22:53, Vlastimil Babka wrote:
On 6/22/23 10:53, Qi Zheng wrote:
The mm/vmscan.c file is too large, so separate the shrinker-related
code from it into a separate file. No functional changes.
Signed-off-by: Qi Zheng
Maybe do this move as patch 01 so the further chan
From: Sui Jingfeng
Single tab should be enough.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
index cef97bb9c99f
From: Sui Jingfeng
Instead of the 'int' type in the etnaviv_gem_prime_get_sg_table(),
because the drm_prime_pages_to_sg() function takes an unsigned int type
as its third argument.
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c | 2 +-
1 file changed, 1 insertion(+
From: Sui Jingfeng
Because the etnaviv_gem_new_private() function receives the size_t argument
for the number of pages. And the number of pages should be unsigned.
Note that Most 32-bit architectures use "unsigned int" size_t,
and all 64-bit architectures use "unsigned long" size_t.
So, let's ke
On 6/23/23 06:07, Lukas Bulwahn wrote:
Commit d4313a68ec91 ("fbdev/media: Use GPIO descriptors for VIA GPIO")
moves via-gpio.h from include/linux to drivers/video/fbdev/via, but misses
to adjust the file entry for the VIA UNICHROME(PRO)/CHROME9 FRAMEBUFFER
DRIVER section.
Hence, ./scripts/get_ma
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