On Wed, Jun 7, 2023 at 12:01 PM Dario Binacchi
wrote:
>
> Add support to Rocktech RK043FN48H display on stm32f746-disco board.
>
> Signed-off-by: Dario Binacchi
> ---
>
> (no changes since v1)
>
> arch/arm/boot/dts/stm32f746-disco.dts | 51 +++
> 1 file changed, 51 insert
On Tue, Jun 06, 2023 at 11:37:53PM +0100, Conor Dooley wrote:
> On Wed, Jun 07, 2023 at 12:22:33AM +0200, Heiko Stübner wrote:
> > Am Dienstag, 6. Juni 2023, 20:41:17 CEST schrieb Shengyu Qu:
> > > > On Fri, Jun 02, 2023 at 03:40:35PM +0800, Keith Zhao wrote:
> > > >> Add bindings for JH7110 displa
On Wed, Jun 7, 2023 at 12:01 PM Dario Binacchi
wrote:
>
> Add compatible to panel-simple for Rocktech Displays Limited
> RK043FN48H 4.3" 480x272 LCD-TFT panel.
>
> Signed-off-by: Dario Binacchi
> Acked-by: Conor Dooley
>
> ---
Reviewed-by: Jagan Teki
On Wed, Jun 7, 2023 at 12:01 PM Dario Binacchi
wrote:
>
> Add support for Rocktech RK043FN48H 4.3" (480x272) LCD-TFT panel.
>
> Signed-off-by: Dario Binacchi
> Reported-by: kernel test robot
> Closes:
> https://lore.kernel.org/oe-kbuild-all/202306020343.jntwem0p-...@intel.com/
>
> ---
Reviewed
https://cgit.freedesktop.org/amd/drm-amd/
This one has a long time with no update.
On 2023/6/7 14:31, Sui Jingfeng wrote:
Hi,
On 2023/6/7 03:15, Alex Deucher wrote:
Applied. Thanks!
Where is the official branch of drm/amdgpu, I can't find it on the
internet.
Sorry for asking this sill
Add support for Rocktech RK043FN48H 4.3" (480x272) LCD-TFT panel.
Signed-off-by: Dario Binacchi
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202306020343.jntwem0p-...@intel.com/
---
Changes in v2:
- Fix build warning reported by kernel test robot.
- Add 'Report
Boards that use the STM32F{4,7} series have limited amounts of RAM. The
added parameter allows users to size, within certain limits, the memory
footprint required by the framebuffer.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/gpu/drm/stm/drv.c | 8 +++-
1 file changed
Add compatible to panel-simple for Rocktech Displays Limited
RK043FN48H 4.3" 480x272 LCD-TFT panel.
Signed-off-by: Dario Binacchi
Acked-by: Conor Dooley
---
Changes in v2:
- Add 'Acked-by' tag of Conor Dooley.
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file cha
Add support to Rocktech RK043FN48H display on stm32f746-disco board.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
arch/arm/boot/dts/stm32f746-disco.dts | 51 +++
1 file changed, 51 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746-disco.dts
b/arch/arm/
Add pin configurations for using LTDC (LCD-tft Display Controller) on
stm32f746-disco board.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 35 ++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f7-
Add LTDC (Lcd-tft Display Controller) support.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
arch/arm/boot/dts/stm32f746.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index dc868e6da40e..9c4ba0
The series adds support for the display on the stm32f746-disco board,
along with a generic patch that adds the "bpp" parameter to the stm-drm
module. The intention is to allow users to size, within certain limits,
the memory footprint required by the framebuffer.
Changes in v2:
- Add 'Acked-by' ta
Hi,
On 2023/6/7 03:15, Alex Deucher wrote:
Applied. Thanks!
Where is the official branch of drm/amdgpu, I can't find it on the internet.
Sorry for asking this silly question.
Alex
On Tue, Jun 6, 2023 at 9:33 AM Sui Jingfeng wrote:
This patch replace the leading spaces with tab, make the
On 06.06.2023 22:27, Nirmoy Das wrote:
Ensure correct handling of closed VMAs on multi-gt platforms to prevent
Use-After-Free. Currently, when GT0 goes idle, closed VMAs that are
exclusively added to GT0's closed_vma link (gt->closed_vma) and
subsequently freed by i915_vma_parked(), which assu
Hi,
On 2023/6/7 03:49, Bjorn Helgaas wrote:
Match the subject line style:
$ git log --oneline drivers/pci/vgaarb.c
f321c35feaee PCI/VGA: Replace full MIT license text with SPDX identifier
d5109fe4d1ec PCI/VGA: Use unsigned format string to print lock counts
4e6c91847a7f PCI/VGA: Log
The single map_noncoherent member of struct drm_gem_dma_object may not
sufficient for describing the backing memory of the GEM buffer object.
Especially on dma-coherent systems, the backing memory is both cached
coherent for multi-core CPUs and dma-coherent for peripheral device.
Say architectures
> -Original Message-
> From: Andi Shyti
> Sent: Wednesday, June 7, 2023 1:11 PM
> To: Zhang, Carl
> Cc: Andi Shyti ; Joonas Lahtinen
> ; Tvrtko Ursulin
> ; Yang, Fei ; Chris
> Wilson ; Roper, Matthew D
> ; Justen, Jordan L ;
> Gu, Lihao ; Intel GFX ;
> DRI Devel
> Subject: Re: [PATCH
Hi Carl,
On Wed, Jun 07, 2023 at 03:40:20AM +, Zhang, Carl wrote:
> Media driver reverted previous patches, and file a new PR
> https://github.com/intel/media-driver/pull/1680
> will hold this PR until the uapi changes appear in drm_next.
That's great, thanks a lot for the quick actions here
Hello Jiasheng,
Thank you for the patch.
On Wed, Jun 07, 2023 at 10:05:29AM +0800, Jiasheng Jiang wrote:
> Add check for dma_set_mask() and return the error if it fails.
>
> Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort
> Subsystem")
> Signed-off-by: Jiasheng Jia
Hi Danilo,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 33a86170888b7e4aa0cea94ebb9c67180139cea9]
url:
https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-execution-context-for-GEM-buffers-v4/20230607-063442
base: 33a86170888b7e4aa0cea
On Tue, 6 Jun 2023 21:22:45 -0700 Justin Chen wrote:
> >> Through filters that can be programmed by the Host cpu or co-processor.
> >
> > How are the filter programmed by the host (in terms of user API)?
>
> You are stumbling upon my next objective here. This patch set does not
> support thi
Hi Dave and Daniel,
Just two fixups to Exynos vidi and g2d drivers.
Please kindly let me know if there is any problem.
Thanks,
Inki Dae
The following changes since commit 9561de3a55bed6bdd44a12820ba81ec416e705a7:
Linux 6.4-rc5 (2023-06-04 14:04:27 -0400)
are available in the Git repos
On Tue, Jun 06, 2023 at 11:47:50PM +0530, Siddh Raman Pant wrote:
> On Tue, 06 Jun 2023 23:19:28 +0530, Laurent Pinchart wrote:
> > The idea would be to include the drm_print_deprecated.h header in
> > drivers that still use the deprecated macros.
>
> Yeah, what I meant was in a "first pass" kind
On 6/6/2023 8:45 PM, Jakub Kicinski wrote:
On Tue, 6 Jun 2023 19:33:13 -0700 Justin Chen wrote:
Not netdevs per se, but packets can be redirected to an offload
co-processor.
How is the redirecting configured?
Through filters that can be programmed by the Host cpu or co-processor.
How are
Reviewed-by: Qiang Yu
Applied to drm-misc-fixes.
On Wed, Jun 7, 2023 at 9:18 AM Vasily Khoruzhick wrote:
>
> On Tue, Jun 6, 2023 at 7:33 AM Erico Nunes wrote:
> >
> > The drm sched entity must be flushed before finishing, to account for
> > jobs potentially still in flight at that time.
> > Li
Hi Jani,
On Wed, Jun 07, 2023 at 12:39:44AM +0300, Jani Nikula wrote:
> On Tue, 06 Jun 2023, Laurent Pinchart wrote:
> > On Tue, Jun 06, 2023 at 04:15:22PM +0530, Siddh Raman Pant wrote:
> >> drm_print.h says DRM_DEBUG_KMS is deprecated in favor of
> >> drm_dbg_kms().
> >> ---
> >> drivers/gpu/dr
On Tue, 6 Jun 2023 19:33:13 -0700 Justin Chen wrote:
> >> Not netdevs per se, but packets can be redirected to an offload
> >> co-processor.
> >
> > How is the redirecting configured?
>
> Through filters that can be programmed by the Host cpu or co-processor.
How are the filter programmed by t
Media driver reverted previous patches, and file a new PR
https://github.com/intel/media-driver/pull/1680
will hold this PR until the uapi changes appear in drm_next.
besides this, ask a dumb question.
How we retrieve the pat_index from a shared resource though dma_buf fd?
maybe we need to know
Hi all,
After merging the amdgpu tree, today's linux-next build (htmldocs)
produced this warning:
drivers/gpu/drm/amd/display/dc/dc.h:900: warning: Function parameter or member
'enable_legacy_fast_update' not described in 'dc_debug_options'
Introduced by commit
4164998e0a9c ("drm/amd/display
On 6/6/2023 6:54 PM, Jakub Kicinski wrote:
On Tue, 6 Jun 2023 18:35:51 -0700 Justin Chen wrote:
Also - can you describe how you can have multiple netdevs for
the same MAC?
Not netdevs per se, but packets can be redirected to an offload
co-processor.
How is the redirecting configured?
Th
Add check for dma_set_mask() and return the error if it fails.
Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPort
Subsystem")
Signed-off-by: Jiasheng Jiang
---
drivers/gpu/drm/xlnx/zynqmp_dpsub.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/d
On Tue, 6 Jun 2023 18:35:51 -0700 Justin Chen wrote:
> > Also - can you describe how you can have multiple netdevs for
> > the same MAC?
>
> Not netdevs per se, but packets can be redirected to an offload
> co-processor.
How is the redirecting configured?
Could you split this patch into basic
On 6/6/2023 5:16 PM, Jakub Kicinski wrote:
On Tue, 6 Jun 2023 15:58:21 -0700 Justin Chen wrote:
On 6/2/23 11:58 PM, Jakub Kicinski wrote:
On Thu, 1 Jun 2023 15:12:28 -0700 Justin Chen wrote:
+ /* general stats */
+ STAT_NETDEV(rx_packets),
+ STAT_NETDEV(tx_packets),
+
Smatch error:buffer overflow 'ti_sn_bridge_refclk_lut' 5 <= 5.
Fixes: cea86c5bb442 ("drm/bridge: ti-sn65dsi86: Implement the pwm_chip")
Signed-off-by: Su Hui
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn
On Tue, Jun 6, 2023 at 7:33 AM Erico Nunes wrote:
>
> The drm sched entity must be flushed before finishing, to account for
> jobs potentially still in flight at that time.
> Lima did not do this flush until now, so switch the destroy call to the
> drm_sched_entity_destroy() wrapper which will tak
Hi,
On 2023/6/6 23:28, Doug Anderson wrote:
Hi,
On Tue, Jun 6, 2023 at 12:56 AM Su Hui wrote:
Smatch error:buffer overflow 'ti_sn_bridge_refclk_lut' 5 <= 5.
Fixes: cea86c5bb442 ("drm/bridge: ti-sn65dsi86: Implement the pwm_chip")
Signed-off-by: Su Hui
---
drivers/gpu/drm/bridge/ti-sn65dsi
On 6/6/2023 4:21 PM, Dmitry Baryshkov wrote:
On 07/06/2023 02:14, Abhinav Kumar wrote:
On 6/6/2023 3:59 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:57, Abhinav Kumar wrote:
On 6/6/2023 3:50 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM, D
On Tue, 6 Jun 2023 15:58:21 -0700 Justin Chen wrote:
> On 6/2/23 11:58 PM, Jakub Kicinski wrote:
> > On Thu, 1 Jun 2023 15:12:28 -0700 Justin Chen wrote:
> >> + /* general stats */
> >> + STAT_NETDEV(rx_packets),
> >> + STAT_NETDEV(tx_packets),
> >> + STAT_NETDEV(rx_bytes),
> >> + STAT_NETD
On 6/5/2023 1:54 PM, john.c.harri...@intel.com wrote:
From: John Harrison
If GuC hits an internal error (and survives long enough to report it
to the KMD), it is basically toast and will stop until a GT reset and
subsequent GuC reload is performed. Previously, the KMD just printed
an error m
Hi Danilo,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 33a86170888b7e4aa0cea94ebb9c67180139cea9]
url:
https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-execution-context-for-GEM-buffers-v4/20230607-063442
base: 33a86170888b7e4aa0cea
On 07/06/2023 02:14, Abhinav Kumar wrote:
On 6/6/2023 3:59 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:57, Abhinav Kumar wrote:
On 6/6/2023 3:50 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhi
On 6/6/2023 3:59 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:57, Abhinav Kumar wrote:
On 6/6/2023 3:50 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM, D
On 07/06/2023 01:57, Abhinav Kumar wrote:
On 6/6/2023 3:50 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhi
On 6/2/23 11:58 PM, Jakub Kicinski wrote:
On Thu, 1 Jun 2023 15:12:28 -0700 Justin Chen wrote:
+ /* general stats */
+ STAT_NETDEV(rx_packets),
+ STAT_NETDEV(tx_packets),
+ STAT_NETDEV(rx_bytes),
+ STAT_NETDEV(tx_bytes),
+ STAT_NETDEV(rx_errors),
+ ST
On 6/6/2023 3:50 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM,
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:16, Abhinav Kumar
wrote:
On 3/20/20
On Wed, Jun 07, 2023 at 12:22:33AM +0200, Heiko Stübner wrote:
> Am Dienstag, 6. Juni 2023, 20:41:17 CEST schrieb Shengyu Qu:
> > > On Fri, Jun 02, 2023 at 03:40:35PM +0800, Keith Zhao wrote:
> > >> Add bindings for JH7110 display subsystem which
> > >> has a display controller verisilicon dc8200
>
Provide the driver indirection iterating over all DRM GPU VA spaces to
enable the common 'gpuvas' debugfs file for dumping DRM GPU VA spaces.
Signed-off-by: Danilo Krummrich
---
drivers/gpu/drm/nouveau/nouveau_debugfs.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a
This commit provides the implementation for the new uapi motivated by the
Vulkan API. It allows user mode drivers (UMDs) to:
1) Initialize a GPU virtual address (VA) space via the new
DRM_IOCTL_NOUVEAU_VM_INIT ioctl for UMDs to specify the portion of VA
space managed by the kernel and usersp
The new VM_BIND UAPI uses the DRM GPU VA manager to manage the VA space.
Hence, we a need a way to manipulate the MMUs page tables without going
through the internal range allocator implemented by nvkm/vmm.
This patch adds a raw interface for nvkm/vmm to pass the resposibility
for managing the add
The new VM_BIND UAPI implementation introduced in subsequent commits
will allow asynchronous jobs processing push buffers and emitting fences.
If a job times out, we need a way to recover from this situation. For
now, simply kill the channel to unblock all hung up jobs and signal
userspace that th
The new VM_BIND UAPI implementation introduced in subsequent commits
will allow asynchronous jobs processing push buffers and emitting
fences.
If a fence context is killed, e.g. due to a channel fault, jobs which
are already queued for execution might still emit new fences. In such a
case a job wo
The new (VM_BIND) UAPI exports DMA fences through DRM syncobjs. Hence,
in order to emit fences within DMA fence signalling critical sections
(e.g. as typically done in the DRM GPU schedulers run_job() callback) we
need to separate fence allocation and fence emitting.
Signed-off-by: Danilo Krummric
Move the usercopy helpers to a common driver header file to make it
usable for the new API added in subsequent commits.
Signed-off-by: Danilo Krummrich
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 26 ++
drivers/gpu/drm/nouveau/nouveau_gem.c | 26 --
Initialize the GEM's DRM GPU VA manager interface in preparation for the
(u)vmm implementation, provided by subsequent commits, to make use of it.
Signed-off-by: Danilo Krummrich
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/nouve
Provide a getter function for the client's current vmm context. Since
we'll add a new (u)vmm context for UMD bindings in subsequent commits,
this will keep the code clean.
Signed-off-by: Danilo Krummrich
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_chan.c |
Add infrastructure to keep track of GPU virtual address (VA) mappings
with a decicated VA space manager implementation.
New UAPIs, motivated by Vulkan sparse memory bindings graphics drivers
start implementing, allow userspace applications to request multiple and
arbitrary GPU VA mappings of buffe
This commit provides the interfaces for the new UAPI motivated by the
Vulkan API. It allows user mode drivers (UMDs) to:
1) Initialize a GPU virtual address (VA) space via the new
DRM_IOCTL_NOUVEAU_VM_INIT ioctl. UMDs can provide a kernel reserved
VA area.
2) Bind and unbind GPU VA space ma
This commit adds a function to dump a DRM GPU VA space and a macro for
drivers to register the struct drm_info_list 'gpuvas' entry.
Most likely, most drivers might maintain one DRM GPU VA space per struct
drm_file, but there might also be drivers not having a fixed relation
between DRM GPU VA spac
Split up the MA_STATE() macro such that components using the maple tree
can easily inherit from struct ma_state and build custom tree walk
macros to hide their internals from users.
Example:
struct sample_iterator {
struct ma_state mas;
struct sample_mgr *mgr;
};
\#define SAMPLE_
From: Christian König
This adds the infrastructure for an execution context for GEM buffers
which is similar to the existing TTMs execbuf util and intended to replace
it in the long term.
The basic functionality is that we abstracts the necessary loop to lock
many different GEM buffers with auto
Furthermore, with the DRM GPUVA manager it provides a new DRM core feature to
keep track of GPU virtual address (VA) mappings in a more generic way.
The DRM GPUVA manager is indented to help drivers implement userspace-manageable
GPU VA spaces in reference to the Vulkan API. In order to achieve th
Am Dienstag, 6. Juni 2023, 20:41:17 CEST schrieb Shengyu Qu:
> Hi Conor,
>
> > Hey Keith,
> >
> > On Fri, Jun 02, 2023 at 03:40:35PM +0800, Keith Zhao wrote:
> >> Add bindings for JH7110 display subsystem which
> >> has a display controller verisilicon dc8200
> >> and an HDMI interface.
> >>
> >>
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:16, Abhinav Kumar
wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
As we are goi
Hi Dmitry
On 6/6/2023 1:21 PM, Dmitry Baryshkov wrote:
On 06/06/2023 23:11, Kuogee Hsieh wrote:
From: Abhinav Kumar
Some platforms have DSC blocks which have not been declared in the
catalog.
Complete DSC 1.1 support for all platforms by adding the missing
blocks to
MSM8998.
'Some platfo
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:16, Abhinav Kumar
wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
As we are going to add virtual planes, add the list of
On Tue, 06 Jun 2023, Laurent Pinchart wrote:
> Hi Siddh,
>
> Thank you for the patch.
>
> On Tue, Jun 06, 2023 at 04:15:22PM +0530, Siddh Raman Pant wrote:
>> drm_print.h says DRM_DEBUG_KMS is deprecated in favor of
>> drm_dbg_kms().
>> ---
>> drivers/gpu/drm/drm_client_modeset.c | 112 ++
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:16, Abhinav Kumar
wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
As we are going to add virtual planes, add the list of supported
formats
to the hw catalog entry. It wi
Cybernet T10C cannot be dimmed without the backlight strobing. Create a
new quirk to lock the minimum brightness to the highest supported value.
This aligns the device with its behavior on Windows, which will not
lower the brightness below maximum.
Signed-off-by: Allen Ballway
---
.../gpu/drm/i
On 6/6/2023 2:08 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:01, Dmitry Baryshkov wrote:
On 06/06/2023 22:28, Abhinav Kumar wrote:
On 6/6/2023 12:09 PM, Dmitry Baryshkov wrote:
On 06/06/2023 20:51, Abhinav Kumar wrote:
On 6/6/2023 4:14 AM, Dmitry Baryshkov wrote:
On Tue, 6 Jun 2023 at
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:16, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
As we are going to add virtual planes, add the list of supported formats
to the hw catalog entry. It will be used to setup universal planes, with
On 07/06/2023 00:01, Dmitry Baryshkov wrote:
On 06/06/2023 22:28, Abhinav Kumar wrote:
On 6/6/2023 12:09 PM, Dmitry Baryshkov wrote:
On 06/06/2023 20:51, Abhinav Kumar wrote:
On 6/6/2023 4:14 AM, Dmitry Baryshkov wrote:
On Tue, 6 Jun 2023 at 05:35, Abhinav Kumar
wrote:
On 6/5/2023 6:
On 06/06/2023 22:28, Abhinav Kumar wrote:
On 6/6/2023 12:09 PM, Dmitry Baryshkov wrote:
On 06/06/2023 20:51, Abhinav Kumar wrote:
On 6/6/2023 4:14 AM, Dmitry Baryshkov wrote:
On Tue, 6 Jun 2023 at 05:35, Abhinav Kumar
wrote:
On 6/5/2023 6:03 PM, Dmitry Baryshkov wrote:
On 06/06/2023
Hi Nirmoy,
On Tue, Jun 06, 2023 at 10:27:55PM +0200, Nirmoy Das wrote:
> Ensure correct handling of closed VMAs on multi-gt platforms to prevent
> Use-After-Free. Currently, when GT0 goes idle, closed VMAs that are
> exclusively added to GT0's closed_vma link (gt->closed_vma) and
> subsequently fr
Thanks Harry. Looks good.
Reviewed-by: Joshua Ashton
- Joshie 🐸✨
On 6/6/23 21:25, Harry Wentland wrote:
This patchset is based on Joshua's previous patchset [1], as well
as my previous patchset [2].
It is
- enabling support for the colorspace property in amdgpu, as well as
- allowing drivers
On 6/6/2023 1:29 PM, Dmitry Baryshkov wrote:
On 06/06/2023 23:25, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Remove historical fields intfs_swapped and topology fields from struct
dpu_encoder_virt and also remove even more historical docs.
Signed-off-by: Dmitry Bar
On 06/06/2023 23:25, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Remove historical fields intfs_swapped and topology fields from struct
dpu_encoder_virt and also remove even more historical docs.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_e
Ensure correct handling of closed VMAs on multi-gt platforms to prevent
Use-After-Free. Currently, when GT0 goes idle, closed VMAs that are
exclusively added to GT0's closed_vma link (gt->closed_vma) and
subsequently freed by i915_vma_parked(), which assumes the entire GPU is
idle. However, on plat
On 5/24/2023 6:40 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:04, Abhinav Kumar wrote:
On 5/24/2023 3:46 PM, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
In preparation to virtualized planes support, move pstate->pipe
initialization from dpu_plane_reset
From: Joshua Ashton
Replace the messy two if-else chains here that were
on the same value with a switch on the enum.
Signed-off-by: Joshua Ashton
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Joshua Ashton
Cc: Simon Ser
Cc: Melissa Wen
In order to IGT test colorspace we'll want to print
the currently enabled colorspace on a stream. We add
a new debugfs to do so, using the same scheme as
current bpc reporting.
This might also come in handy when debugging display
issues.
v4:
- Fix function doc comment
- Fix sRGB debug print
Sign
From: Joshua Ashton
Given that we always pass dm_state into here now, this won't ever
trigger anymore.
This is needed for we will always fail mode validation with invalid
clocks or link bandwidth errors.
Signed-off-by: Joshua Ashton
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebast
Look at connector->colorimetry to determine output colorspace.
We don't want to impact current SDR behavior, so
DRM_MODE_COLORIMETRY_DEFAULT preserves current behavior.
Also add support to explicitly set BT601 and BT709.
v4:
- Roll support for BT709 and BT601 into this patch
- Add default case t
Drivers might not support all colorspaces defined in
dp_colorspaces and hdmi_colorspaces. This results in
undefined behavior when userspace is setting an
unsupported colorspace.
Allow drivers to pass the list of supported colorspaces
when creating the colorspace property.
v2:
- Use 0 to indicate
We need to signal mode_changed to make sure we update the output
colorspace.
v2: No need to call drm_hdmi_avi_infoframe_colorimetry as DC does its
own infoframe packing.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Josh
v3: Fix kerneldocs (kernel test robot)
v4: Avoid returning NULL from drm_get_colorspace_name
Signed-off-by: Harry Wentland
Reviewed-by: Sebastian Wick
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua Ashton
Cc: Jani Nikula
Cc:
We want compositors to be able to set the output
colorspace on DP and HDMI outputs, based on the
caps reported from the receiver via EDID.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Joshua Ashton
Cc: Simon Ser
Cc: Ville Syrjälä
Cc: Meli
We need the connector_state for colorspace and scaling information
and can get it from connector->state.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Joshua Ashton
Cc: Simon Ser
Cc: Melissa Wen
Cc: dri-devel@lists.freedesktop.org
Cc: amd-
We an use bitfields to track the support ones for HDMI
and DP. This allows us to print colorspaces in a consistent
manner without needing to know whether we're dealing with
DP or HDMI.
v4:
- Rename _MAX to _COUNT and leave comment to indicate
it's not a valid value
- Fix misplaced function doc
From: Joshua Ashton
To match the other enums, and add more information about these values.
v2:
- Specify where an enum entry comes from
- Clarify DEFAULT and NO_DATA behavior
- BT.2020 CYCC is "constant luminance"
- correct type for BT.601
v4:
- drop DP/HDMI clarifications that might create
Signed-off-by: Harry Wentland
Reviewed-by: Sebastian Wick
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua Ashton
Cc: Jani Nikula
Cc: Simon Ser
Cc: Ville Syrjälä
Cc: Melissa Wen
Cc: dri-devel@lists.freedesktop.org
Cc: amd-...@
This allows us to use strongly typed arguments.
v2:
- Bring NO_DATA back
- Provide explicit enum values
v3:
- Drop unnecessary '&' from kerneldoc (emersion)
v4:
- Fix Normal Colorimetry comment
Signed-off-by: Harry Wentland
Reviewed-by: Simon Ser
Reviewed-by: Sebastian Wick
Cc: Pekka Paal
This patchset is based on Joshua's previous patchset [1], as well
as my previous patchset [2].
It is
- enabling support for the colorspace property in amdgpu, as well as
- allowing drivers to specify the supported set of colorspaces, and
Colorspace, Infoframes, and YCbCr matrix
--
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Remove historical fields intfs_swapped and topology fields from struct
dpu_encoder_virt and also remove even more historical docs.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 --
1 file changed,
On 2023-06-06 11:33:03, Dan Carpenter wrote:
> The "vsync_hz" variable is unsigned int so it can't be less
> than zero. The dpu_kms_get_clk_rate() function used to return a u64
> but I previously changed it to return an unsigned long and zero on
> error so it matches clk_get_rate().
>
> Change th
On 06/06/2023 23:11, Kuogee Hsieh wrote:
From: Abhinav Kumar
Some platforms have DSC blocks which have not been declared in the catalog.
Complete DSC 1.1 support for all platforms by adding the missing blocks to
MSM8998.
'Some platforms' doesn't make sense if we are talking about a single
po
On 2023-06-06 13:11:12, Kuogee Hsieh wrote:
> From: Abhinav Kumar
>
> Some platforms have DSC blocks which have not been declared in the catalog.
Nit: just one platform now, but please don't send a v18 for that :)
> Complete DSC 1.1 support for all platforms by adding the missing blocks to
> MS
On 6/6/2023 1:33 AM, Dan Carpenter wrote:
The "vsync_hz" variable is unsigned int so it can't be less
than zero. The dpu_kms_get_clk_rate() function used to return a u64
but I previously changed it to return an unsigned long and zero on
error so it matches clk_get_rate().
Change the "vsync_h
Hi Nirmoy,
> > MTL is a
> > weird multi-gt platform and, indeed, you can't shut down GT0
> > without affecting GT1.
> >
> > For now it's OK, though, as to test it.
>
> Looking forward to that. I did test it extensively and ChromeOS team as
> well.
great job, Nirmoy! I haven't been able to rep
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