No functional modification involved.
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c:2377
link_set_dpms_on() warn: inconsistent indenting.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5376
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/displa
No functional modification involved.
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:614 amdgpu_gfx_enable_kcq() warn:
inconsistent indenting.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5377
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
Hi Linus,
Quiet enough week, though the misc fixes tree didn't get to me when I
was sending this, so maybe it'll be a bit bigger next week, just one
i915 fix and some scattered amdgpu fixes.
Dave.
drm-fixes-2023-06-02:
drm fixes for v6.4-rc5
amdgpu:
- Fix mclk and fclk output ordering on some A
On Fri, Jun 2, 2023 at 1:45 AM Krzysztof Kozlowski
wrote:
>
> On 31/05/2023 11:32, Liu Ying wrote:
> > NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
> > configures parallel display format by using the "PARALLEL_DISP_FORMAT"
> > field. Add device tree bindings for the display
An inadvertent 'dim push -d' can delete remote branches. Disallow such
remote branch deletions.
Signed-off-by: Ashutosh Dixit
---
dim | 6 ++
1 file changed, 6 insertions(+)
diff --git a/dim b/dim
index 126568e..e5899e6 100755
--- a/dim
+++ b/dim
@@ -1029,6 +1029,12 @@ function dim_push_bra
Hi Abhinav,
June 1, 2023 at 3:20 PM, "Abhinav Kumar" wrote:
> >
> > [drm:drm_mode_config_helper_resume] *ERROR* Failed to resume (-107)
> >
>
> We are not able to recreate this on sc7280 chromebooks , will need to check
> on sc7180. This does not seem directly related to any of the hotplug c
https://bugzilla.kernel.org/show_bug.cgi?id=90091
--- Comment #5 from Marc Collin (marc.col...@protonmail.com) ---
i don't have this computer anymore
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are watching the assignee of the bug.
Andi~ :)
> -Original Message-
> From: Andi Shyti
> Sent: Thursday, June 1, 2023 5:29 PM
> To: 대인기/Tizen Platform Lab(SR)/삼성전자
> Cc: 'lm0963' ; sw0312@samsung.com;
> kyungmin.p...@samsung.com; airl...@gmail.com; dan...@ffwll.ch;
> krzysztof.kozlow...@linaro.org; alim.akh...@samsung.co
Hi Nathan,
On Tue, May 30, 2023 at 11:24:37AM -0700, Nathan Chancellor wrote:
> Hi all,
>
> This series fixes a few clang kernel Control Flow Integrity (kCFI)
> violations that appear after commit 9275277d5324 ("drm/i915: use
> pat_index instead of cache_level"). They were found between run time
Hi Arnd,
On Thu, Jun 01, 2023 at 10:00:27PM +, Teres Alexis, Alan Previn wrote:
> On Thu, 2023-06-01 at 23:36 +0200, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > While 'unsigned long' needs the %ld format string, size_t needs the %z
> > modifier:
>
> alan:snip
>
>
> > +++ b/driver
On Wed, 2023-05-31 at 16:54 -0700, Ceraolo Spurio, Daniele wrote:
> The full authentication via the GSC requires an heci packet submission
> to the GSC FW via the GSC CS. The GSC has new PXP command for this
> (literally called NEW_HUC_AUTH).
> The intel_huc_auth function is also updated to handle
This is motivated by OOB access in amdgpu_vm_update_range when
offset_in_bo+map_size overflows.
v2: keep the validations in amdgpu_vm_bo_map
v3: add the validations to amdgpu_vm_bo_map/amdgpu_vm_bo_replace_map
rather than to amdgpu_gem_va_ioctl
Fixes: 9f7eb5367d00 ("drm/amdgpu: actually use t
On 02/06/2023 01:08, Kuogee Hsieh wrote:
At current implementation, DSI DSC struct is populated at display setup
during system bootup. This mechanism works fine with embedded display.
But will run into problem with plugin/unplug oriented external display,
such as DP, due to DSC struct will become
Add maintainers entry for ASP 2.0 Ethernet driver.
Reviewed-by: Simon Horman
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
v3
- Change from gmail to broadcom emails
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
inde
From: Florian Fainelli
74165 is a 16nm process SoC with a 10/100 integrated Ethernet PHY,
utilize the recently defined 16nm EPHY macro to configure that PHY.
Reviewed-by: Simon Horman
Reviewed-by: Andrew Lunn
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
drivers/net/phy/bcm
Add mdio compat string for ASP 2.0 ethernet driver.
Reviewed-by: Simon Horman
Reviewed-by: Andrew Lunn
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
drivers/net/mdio/mdio-bcm-unimac.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/mdio/mdio-bcm-unimac.c
b/
Add support for the Broadcom ASP 2.0 Ethernet controller which is first
introduced with 72165. This controller features two distinct Ethernet
ports that can be independently operated.
This patch supports:
- Wake-on-LAN using magic packets
- basic ethtool operations (link, counters, message level)
From: Florian Fainelli
Add a binding document for the Broadcom ASP 2.0 Ethernet
controller.
Reviewed-by: Conor Dooley
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
v6
- Moved compatible to the top
- Changed quotes to be consistent
- Elaborated on brcm,
The ASP 2.0 Ethernet controller uses a brcm unimac.
Reviewed-by: Simon Horman
Acked-by: Conor Dooley
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/d
Add support for the Broadcom ASP 2.0 Ethernet controller which is first
introduced with 72165.
Florian Fainelli (2):
dt-bindings: net: Brcm ASP 2.0 Ethernet controller
net: phy: bcm7xxx: Add EPHY entry for 74165
Justin Chen (4):
dt-bindings: net: brcm,unimac-mdio: Add asp-v2.0
net: bcmasp
On 02/06/2023 01:08, Kuogee Hsieh wrote:
move retrieving DSC from setup_display to atomic_check() and delete struct
drm_dsc_config
from struct msm_display_info.
This is obvious from the patches themselves. You should be describing
_why_ the changes are necessary, not what is changed.
What
Since struct drm_dsc_config is retrieved at atomic_check() instead of at
display setup time during bootup. Saving struct drm_dsc_config at
struct msm_display_info is not necessary and become redundant.
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 --
drivers/gp
move retrieving DSC from setup_display to atomic_check() and delete struct
drm_dsc_config
from struct msm_display_info.
Kuogee Hsieh (2):
drm/msm/dpu: retrieve DSI DSC struct at atomic_check()
drm/msm/dpu: remove struct drm_dsc_config from struct msm_display_info
drivers/gpu/drm/msm/disp/dp
At current implementation, DSI DSC struct is populated at display setup
during system bootup. This mechanism works fine with embedded display.
But will run into problem with plugin/unplug oriented external display,
such as DP, due to DSC struct will become stale once external display
unplugged. New
The pull request you sent on Thu, 1 Jun 2023 21:28:24 +0200:
> http://git.kernel.org/pub/scm/linux/kernel/git/deller/linux-fbdev.git
> tags/fbdev-for-6.4-rc5
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/9e87b63ed37e202c77aa17d4112da6ae0c7c097c
Thank you!
--
Deet-
On Thu, 2023-06-01 at 23:36 +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> While 'unsigned long' needs the %ld format string, size_t needs the %z
> modifier:
alan:snip
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> @@ -143,7 +143,7 @@ gsccs_send_message(struct intel_pxp *pxp,
>
Hi,
In the past there has been writing about Wayland's model using implicit
synchronization of GPU renderbuffers and KMS commits [1] [2].
It would sometimes be nice to do that waiting explicitly in a compositor before
enqueueing a KMS pageflip that references a buffer who may go on rendering fo
According to Alex, most APUs from that time seem to have the same issue
(vbios says 48Mhz, actual is 100Mhz). I only have a CHIP_STONEY so I
limit the fixup to CHIP_STONEY
---
drivers/gpu/drm/amd/amdgpu/vi.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/g
From: Arnd Bergmann
While 'unsigned long' needs the %ld format string, size_t needs the %z
modifier:
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c: In function 'gsccs_send_message':
include/drm/drm_print.h:456:39: error: format '%ld' expects argument of type
'long int', but argument 4 has type 'si
On 5/31/2023 16:54, Daniele Ceraolo Spurio wrote:
In the previous patch we extracted the offset of the legacy-style HuC
binary located within the GSC-enabled blob, so now we can use that to
load the HuC via DMA if the fuse is set that way.
Note that we now need to differentiate between "GSC-enabl
On 5/31/2023 16:54, Daniele Ceraolo Spurio wrote:
Before we add the second step of the MTL HuC auth (via GSC), we need to
have the ability to differentiate between them. To do so, the huc
authentication check is duplicated for GuC and GSC auth, with
GSC-enabled binaries being considered fully aut
On 5/31/2023 16:54, Daniele Ceraolo Spurio wrote:
In the previous patch we extracted the offset of the legacy-style HuC
binary located within the GSC-enabled blob, so now we can use that to
load the HuC via DMA if the fuse is set that way.
Note that we now need to differentiate between "GSC-enabl
On 5/31/2023 16:54, Daniele Ceraolo Spurio wrote:
The new binaries that support the 2-step authentication contain the
legacy-style binary, which we can use for loading the HuC via DMA. To
find out where this is located in the image, we need to parse the
manifest of the GSC-enabled HuC binary. The
On 5/23/23 18:15, Melissa Wen wrote:
> Wire up DC 3D LUT to DM CRTC color management (post-blending). On AMD
> display HW, we have to set a shaper LUT to delinearize or normalize the
> color space before applying a 3D LUT (since we have a reduced number of
> LUT entries). Therefore, we map DC sh
On 2023-05-30 22:08, Yang Li wrote:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device.c:1036 kgd2kfd_interrupt()
warn: inconsistent indenting
Signed-off-by: Yang Li
Reviewed-by: Felix Kuehling
I'm applying the patch to amd-staging-drm-next. Thanks!
---
drivers/gpu/drm/amd/amdkfd/kfd_dev
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
There is no need to assign a result to temp varable just to return it
after a goto. Drop the temporary variable and goto and return the result
directly.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar #
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
There is no need to assign a result to temp varable just to return it
two lines below. Drop the temporary variable.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
There is little sense to get intf index just to call dpu_rm_get_intf()
on it. Move dpu_rm_get_intf() call to dpu_encoder_get_intf() function.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
The function dpu_encoder_get_wb() returns controller_id if the
corresponding WB is present in the catalog. We can inline this function
and rely on dpu_rm_get_wb() returning NULL for indices for which the
WB is not present on the device.
Reviewed-b
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
Remove intf_idx and wb_idx fields from struct dpu_encoder_phys and
struct dpu_enc_phys_init_params. Set the hw_intf and hw_wb directly and
use them to get the instance index.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Teste
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
Move common DPU physical encoder initialization code to the new function
dpu_encoder_phys_init().
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
On 5/23/23 18:14, Melissa Wen wrote:
> From: Joshua Ashton
>
> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80
> nits for SD
Hi Dario,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-intel/for-linux-next-fixes]
[also build test WARNING on drm-tip/drm-tip linus/master v6.4-rc4 next-20230601]
[cannot apply to atorgue-stm32/stm32-next drm-misc/drm-misc-next
drm-intel/for-linux
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
There is no reason to split the dpu_encoder interface into separate
_init() and _setup() phases. Merge them into a single function.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
Hi Linus,
please pull some fbdev fixes & cleanups for kernel 6.4-rc5.
Most noteably is a fix for a null-ptr-deref in fbcon's soft_cursor function
which was found by syzbot.
Thanks!
Helge
--
The following changes since commit 44c026a73be8038f03dbdeef028b642880cf1511:
Linux 6.4-rc3
On 5/23/23 18:14, Melissa Wen wrote:
> Create and attach driver-private properties for plane color management.
> First add plane degamma LUT properties that means user-blob and its
> size. We will add more plane color properties in the next commits. In
> addition, we keep these driver-private pl
Hi Leonard
On 5/24/2023 5:58 AM, Leonard Lausen wrote:
[ 275.025497] [drm:dpu_encoder_phys_vid_wait_for_commit_done:488]
[dpu error]vblank timeout
[ 275.025514] [drm:dpu_kms_wait_for_commit_done:510] [dpu error]wait
for commit done returned -110
[ 275.064141] [drm:dpu_encoder_frame_done_timeo
On 5/23/23 18:14, Melissa Wen wrote:
> Hook up driver-specific atomic operations for managing AMD color
> properties and create AMD driver-specific color management properties
> and attach them according to HW capabilities defined by `struct
> dc_color_caps`. Add enumerated transfer function pro
On Tue, May 30, 2023 at 08:35:14AM -0700, Bjorn Andersson wrote:
>
> On Mon, May 29, 2023 at 02:16:14PM +0530, Manivannan Sadhasivam wrote:
> > On Mon, May 29, 2023 at 09:38:59AM +0200, Konrad Dybcio wrote:
> > > On 28.05.2023 19:07, Manivannan Sadhasivam wrote:
> > > > On Tue, May 23, 2023 at 09:
On Mon, May 29, 2023 at 09:38:59AM +0200, Konrad Dybcio wrote:
>
>
>
> On 28.05.2023 19:07, Manivannan Sadhasivam wrote:
> > On Tue, May 23, 2023 at 09:59:53AM +0200, Konrad Dybcio wrote:
> >>
> >>
> >> On 23.05.2023 03:15, Bjorn Andersson wrote:
> >>> From: Bjorn Andersson
> >>>
> >>> Add Adre
On Wed, May 31, 2023 at 10:30:09PM +0200, Konrad Dybcio wrote:
>
>
>
> On 31.05.2023 05:09, Bjorn Andersson wrote:
> > From: Bjorn Andersson
> >
> > Introduce support for the Adreno A690, found in Qualcomm SC8280XP.
> >
> > Tested-by: Steev Klimaszewski
> > Reviewed-by: Konrad Dybcio
> > Si
On Thu, Jun 01, 2023 at 07:03:18PM +0200, Dario Binacchi wrote:
> Add compatible to panel-simple for Rocktech Displays Limited
> RK043FN48H 4.3" 480x272 LCD-TFT panel.
>
> Signed-off-by: Dario Binacchi
> ---
>
> .../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
> 1 file ch
After recent discussions with Mesa folks, it was requested
that we optimize i915's GET_PARAM for the PXP_STATUS without
changing the UAPI spec.
This patch adds this additional optimizations:
- If any PXP initializatoin flow failed, then ensure that
we catch it so that we can change the ret
On 31/05/2023 11:32, Liu Ying wrote:
> NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
> configures parallel display format by using the "PARALLEL_DISP_FORMAT"
> field. Add device tree bindings for the display format configuration.
>
> Signed-off-by: Liu Ying
> ---
> v1->v2:
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 571d71e886a5edc89b4ea6d0fe6f445282938320 Add linux-next specific
files for 20230601
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202305230552.wobyqyya-...@intel.com
https
There is no need to assign a result to temp varable just to return it
two lines below. Drop the temporary variable.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff
There is no need to assign a result to temp varable just to return it
after a goto. Drop the temporary variable and goto and return the result
directly.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 10 ++
1 file cha
There is little sense to get intf index just to call dpu_rm_get_intf()
on it. Move dpu_rm_get_intf() call to dpu_encoder_get_intf() function.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 20
1 file changed, 8 i
Remove intf_idx and wb_idx fields from struct dpu_encoder_phys and
struct dpu_enc_phys_init_params. Set the hw_intf and hw_wb directly and
use them to get the instance index.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 72 ++
The function dpu_encoder_get_wb() returns controller_id if the
corresponding WB is present in the catalog. We can inline this function
and rely on dpu_rm_get_wb() returning NULL for indices for which the
WB is not present on the device.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
There is no reason to split the dpu_encoder interface into separate
_init() and _setup() phases. Merge them into a single function.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 55 +
drivers/gpu/drm/msm/disp/dpu1/dpu_en
Move common DPU physical encoder initialization code to the new function
dpu_encoder_phys_init().
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 29 +--
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 3 ++
.../drm
Rework dpu_encoder initialization code, simplifying calling sequences
and separating common init parts.
Changes since v2:
- Rebased on top of msm-next-lumag branch
Changes since v1:
- Withdrawn two pathes for a later consideration
- Changed dpu_encoder_phys_init() to return void (Abhinav)
- Added
On Thu, 1 Jun 2023 19:14:50 +0200 Andrzej Hajda wrote:
> Ping on the series, everything reviewed.
> Eric, Dave, Jakub, could you take patches 1-4 via net tree?
Sure thing, would you mind reposting them separately?
Easier for us to apply and it's been over a month since posting,
a fresh run of buil
Add DSI as main display output for mt8188 vdosys0.
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
Reviewed-by: Matthias Brugger
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +
To support DSI and eDP as main display connector without modifying
mtk-drm driver, we add the dynamic connector selection mechanism.
Change in v4:
1. Change variable naming of connector routes number from conn_route_num to
num_conn_routes.
2. Chnage he encoder_index function return valuew from in
1. Move output drm connector from each ddp_path array to connector array.
2. Add dynamic select available connector flow in crtc create and enable.
Signed-off-by: Nancy Lin
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu
On 08.05.2023 19:16, Andrzej Hajda wrote:
On 05.05.2023 22:06, Rodrigo Vivi wrote:
On Thu, May 04, 2023 at 06:27:53PM +0200, Andrzej Hajda wrote:
Hi maintainers of net and i915,
On 25.04.2023 00:05, Andrzej Hajda wrote:
This is revived patchset improving ref_tracker library and converting
i
Add the nodes that describe the mdss so that display can work on
MSM8226.
Signed-off-by: Luca Weiss
---
arch/arm/boot/dts/qcom-msm8226.dtsi | 127
1 file changed, 127 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi
b/arch/arm/boot/dts/qcom-ms
This series adds the required configs for MDP5 and DSI blocks that are
needed for MDSS on MSM8226. Finally we can add the new nodes into the
dts.
Tested on apq8026-lg-lenok and msm8926-htc-memul.
Signed-off-by: Luca Weiss
---
Changes in v3:
- Adjust mdss labels to new style (Stephan)
- Link to v
The MSM8226 SoC uses a slightly different 28nm dsi phy. Add a new
compatible for it.
And while we're at it, in the dsi-phy-28nm.yaml move the 8960 compatible
to its correct place so its sorted alphabetically.
Acked-by: Conor Dooley
Signed-off-by: Luca Weiss
---
Documentation/devicetree/binding
Add the required config for the v1.1 MDP5 found on MSM8226.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Luca Weiss
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 82
1 file changed, 82 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
b/driv
MSM8226 uses a modified PLL lock sequence compared to MSM8974, which is
based on the function dsi_pll_enable_seq_m in the msm-3.10 kernel.
Worth noting that the msm-3.10 downstream kernel also will try other
sequences in case this one doesn't work, but during testing it has shown
that the _m seque
Add the config for the v1.0.2 DSI found on MSM8226. We can reuse
existing bits from other revisions that are identical for v1.0.2.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
Signed-off-by: Luca Weiss
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 ++
drivers/gpu/drm/msm/dsi/dsi_cfg.h
Add the compatible for the DSI found on MSM8226.
Acked-by: Conor Dooley
Signed-off-by: Luca Weiss
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.y
Add the compatible for the MDP5 found on MSM8226.
Acked-by: Conor Dooley
Signed-off-by: Luca Weiss
---
Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml
b/Documentation/d
On 5/26/2023 4:51 AM, Dan Carpenter wrote:
Static analysis tools complain about the -EINVAL error code being
stored in an unsigned variable. Let's change this to match
the clk_get_rate() function which is type unsigned long and returns
zero on error.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845
On 5/21/2023 6:32 PM, Su Hui wrote:
Pointer variables of (void*) type do not require type cast.
Signed-off-by: Su Hui
---
Reviewed-by: Abhinav Kumar
On 5/30/2023 8:02 AM, Thomas Zimmermann wrote:
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Msm does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can
Hi Lu,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on next-20230601]
[cannot apply to linus/master v6.4-rc4]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch
On Wed, Apr 12, 2023 at 5:52 PM Christian König
wrote:
>
> Hi guys,
>
> took me some tries to get the Intel CI happy with this patch set.
>
> This is the version rebased on drm-misc-next, for a CI run you actually
> need to rebase the last patch to drm-tip. So I'm planning to merge 1-4
> for this
In the case of failed suspend flow or cases where the kernel does not go
into full suspend but goes from suspend_prepare back to resume_complete,
we get called for a pm_complete but without runtime_pm guaranteed.
Thus, ensure we take the runtime_pm when calling intel_pxp_init_hw
from within intel_
On 2023-05-29 15:28, Christophe JAILLET wrote:
> Use struct_size() instead of hand-writing it. It is less verbose, more
> robust and more informative.
>
> Signed-off-by: Christophe JAILLET
Reviewed-by: Marco Pagani
> ---
> drivers/accel/ivpu/ivpu_job.c | 4 +---
> 1 file changed, 1 insertio
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
wrote:
>
> The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
> the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
> to keep the LP11 state before the lcm_reset pin is pulled high. So add
> lp11_before_rese
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
wrote:
>
> The STARRY ili9882t is a 10.51" WUXGA TFT LCD panel,
> which fits in nicely with the existing panel-boe-tv101wum-nl6
> driver. Hence, we add a new compatible with panel specific config.
>
> Signed-off-by: Cong Yang
> Reviewed-by: Douglas A
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
wrote:
>
> The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
> with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
> needs to keep the LP11 state before the lcm_reset pin is pulled high, so
> increase
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
wrote:
>
> The STARRY himax83102-j02 is a 10.51" WUXGA TFT LCD panel,
> which fits in nicely with the existing panel-boe-tv101wum-nl6
> driver. Hence, we add a new compatible with panel specific config.
>
> Signed-off-by: Cong Yang
> Reviewed-by: Dou
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
wrote:
>
> Copare V3:Resend without Conor's acks on patches 2 and 4.
>
> Cong Yang (4):
> dt-bindings: display: panel: Add compatible for Starry himax83102-j02
> drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
> dt-bindings: dis
On 2023-05-23 09:46:19, Konrad Dybcio wrote:
> Add basic SM6375 support to the DPU1 driver to enable display output.
Nit: The SM6350 commit doesn't use the word "basic" here: what does it
mean? Is this addition not complete (because it seems so)?
> Reviewed-by: Dmitry Baryshkov
> Signed-off-by:
Hi Lu,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on next-20230601]
[cannot apply to linus/master v6.4-rc4]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
> -Original Message-
> From: Intel-gfx On Behalf Of
> Andrzej Hajda
> Sent: Thursday, June 1, 2023 6:14 PM
> To: Andi Shyti ; Intel GFX g...@lists.freedesktop.org>; DRI Devel
> Cc: Chris Wilson ; sta...@vger.kernel.org; Dan
> Carpenter ; Andi Shyti
> Subject: Re: [Intel-gfx] [PATCH] d
Hi Tejas,
> > > @@ -1530,8 +1530,8 @@ static int live_busywait_preempt(void *arg)
> > > struct drm_i915_gem_object *obj;
> > > struct i915_vma *vma;
> > > enum intel_engine_id id;
> > > - int err = -ENOMEM;
> > > u32 *map;
> > > + int err;
>
> We could init
Am 26.05.23 um 14:37 schrieb Min Li:
Userspace can race to free the gobj(robj converted from), robj should not
be accessed again after drm_gem_object_put, otherwith it will result in
use-after-free.
Signed-off-by: Min Li
---
drivers/gpu/drm/radeon/radeon_gem.c | 2 +-
1 file changed, 1 inser
Hi,
On Tue, 30 May 2023 09:38:01 +0200, Neil Armstrong wrote:
> The Amlogic G12A, G12B & SM1 SoCs embeds a Synopsys DW-MIPI-DSI transceiver
> (ver 1.21a),
> with a custom glue managing the IP resets, clock and data input similar to
> the DW-HDMI
> glue on the same Amlogic SoCs.
>
> This adds su
Hi,
On Thu, 26 Jan 2023 10:39:42 +0100, Neil Armstrong wrote:
> This updates the panel timings to achieve a clean 60Hz refresh rate.
>
>
Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git
(drm-misc-next)
[1/1] drm/panel: khadas-ts050: update timings to achieve 60Hz refres
Hi Dave & Daniel,
One fix appeared this morning, related to OA API for
non-power-of-two reports.
Full CI results not in yet, BAT is looking good so please check
before pulling the trigger.
Regards, Joonas
***
drm-intel-fixes-2023-06-01:
- Fix for OA reporting to allow detecting non-power-of-t
Hi,
On 2023/6/1 02:07, Lucas Stach wrote:
+static int etnaviv_gpu_clk_get(struct etnaviv_gpu *gpu)
+{
+ struct device *dev = gpu->dev;
+
+ if (gpu->no_clk)
+ return 0;
+
+ gpu->clk_reg = devm_clk_get_optional(dev, "reg");
+ DBG("clk_reg: %p", gpu->clk_reg);
From: Robert Foss
On Tue, 30 May 2023 21:28:04 +0200, Marek Vasut wrote:
> This chip has one reset GPIO input, document it. The reset GPIO
> is optional as it is sometimes not connected on some hardware.
>
>
Applied, thanks!
[1/2] dt-bindings: display: bridge: tc358762: Document reset-gpios
On 26.05.2023 14:41, Andi Shyti wrote:
kernel_context() returns an error pointer. Use pointer-error
conversion functions to evaluate its return value, rather than
checking for a '0' return.
Fixes: eb5c10cbbc2f ("drm/i915: Remove I915_USER_PRIORITY_SHIFT")
Reported-by: Dan Carpenter
Signed-off-b
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