On 2023-05-08 17:51:08, Jessica Zhang wrote:
>
>
> On 5/7/2023 11:34 AM, Marijn Suijten wrote:
> > On 2023-05-07 17:27:33, Marijn Suijten wrote:
> >> On 2023-05-04 15:05:15, Abhinav Kumar wrote:
> >>>
> >>>
> >>> On 5/4/2023 2:56 PM, Marijn Suijten wrote:
> On 2023-04-12 16:25:20, Jessica Zh
On 2023-05-08 17:00:12, Jessica Zhang wrote:
> On 5/8/2023 4:17 PM, Jessica Zhang wrote:
> > On 5/7/2023 9:06 AM, Marijn Suijten wrote:
> >> On 2023-05-05 14:23:51, Jessica Zhang wrote:
> >>> Add a DPU INTF op to set DATA_COMPRESS register for command mode
> >>> panels if
> >>> the DPU_INTF_DATA_C
On 2023-05-08 16:17:54, Jessica Zhang wrote:
> >> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
> >> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
> >> index 73b0885918f8..a8def68a5ec2 100644
> >> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h
> >> +++ b/drivers/gpu/drm/msm/disp/dpu
Hello Neil,
On Mon, Mar 20, 2023 at 11:54:12AM +0100, Neil Armstrong wrote:
> On Sat, 18 Mar 2023 20:07:45 +0100, Uwe Kleine-König wrote:
> > this series adapts the platform drivers below drivers/gpu/drm/bridge to use
> > the
> > .remove_new() callback. Compared to the traditional .remove() callb
On Mon, May 08, 2023 at 07:10:27PM -0300, Maíra Canal wrote:
> Hi Uwe,
>
> On 5/7/23 13:26, Uwe Kleine-König wrote:
> > The .remove() callback for a platform driver returns an int which makes
> > many driver authors wrongly assume it's possible to do error handling by
> > returning an error code.
Both amdgpu and radeon use some wrapper macros over get_u{32,16,8}()
functions which end up adding an implicit argument. Instead of using
the macros, just call the functions directly without hiding the context
that is being passed. This will allow the macros to be used in a more
global context like
Convert the REG_* macros from i915_reg_defs.h to use the new macros
defined in linux/bits.h. This is just to help on the implementation
of the new macros and not intended to be applied.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg_defs.h | 28 +---
1 f
Generalize the REG_GENMASK*() and REG_BIT*() macros so they can be used
by other drivers. The intention is to migrate i915 to the generic
helpers and also make use of them on the upcoming xe driver. There are
possibly other users in the kernel that need u32/u16/u8 bit handling.
First patch is one
Add GENMASK_U32(), GENMASK_U16() and GENMASK_U8() macros to create
masks for fixed-width types and also the corresponding BIT_U32(),
BIT_U16() and BIT_U8().
All of those depend on a new "U" suffix added to the integer constant.
Due to naming clashes it's better to call the macro U32. Since C does
On 5/8/2023 5:47 PM, Dmitry Baryshkov wrote:
On 09/05/2023 03:45, Abhinav Kumar wrote:
On 5/8/2023 4:27 PM, Dmitry Baryshkov wrote:
On 08/05/2023 23:09, Abhinav Kumar wrote:
On 5/3/2023 1:26 AM, Dmitry Baryshkov wrote:
On 03/05/2023 04:19, Jessica Zhang wrote:
Currently, word count is
There is a problem of screen shake on the old panel. So increase the
panel GOP component pull-down circuit size in hardware, and update the
initialization code at the same time. The new initialization code mainly
modifles the following.
a)adjusted for GOP timing. When Display sleep in, raise all G
On 5/8/23 07:57, Liu Ying wrote:
The single LCDIF embedded in i.MX93 SoC may drive multiple displays
simultaneously. Look at LCDIF output port's remote port parents to
find all enabled first bridges. Add an encoder for each found bridge
and attach the bridge to the encoder. This is a preparati
On 5/8/23 07:57, Liu Ying wrote:
With all previous preparations done to make it possible for the
single LCDIF embedded in i.MX93 SoC to drive multiple displays
simultaneously, add i.MX93 LCDIF compatible string as the last
step of adding i.MX93 LCDIF support.
Tested-by: Alexander Stein
Reviewed
On 5/8/23 07:57, Liu Ying wrote:
Instead of determining LCDIF output bus format and bus flags in
->atomic_enable(), do that in ->atomic_check(). This is a
preparation for the upcoming patch to check consistent bus format
and bus flags across all first downstream bridges in ->atomic_check().
New
On 5/8/23 07:57, Liu Ying wrote:
The single LCDIF embedded in i.MX93 SoC may drive multiple displays
simultaneously. Check bus format and flags across first bridges in
->atomic_check() to ensure they are consistent. This is a preparation
for adding i.MX93 LCDIF support.
Acked-by: Alexander Ste
On 5/8/23 07:57, Liu Ying wrote:
Hi,
diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c
b/drivers/gpu/drm/mxsfb/lcdif_kms.c
index 262bc43b1079..e54200a9fcb9 100644
--- a/drivers/gpu/drm/mxsfb/lcdif_kms.c
+++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c
@@ -394,7 +394,7 @@ static void lcdif_crtc_mode_set_no
Hi,Doug:
Sorry, the first patch is missed the modification of clock rate /
blanking periods, I set it as Not Applicable in patchwork. The blanking
periods are modified because the iniatal code increases the Vertical.
I will send V2 version update Commit message, thanks you.
On Mon, May 8, 2023
On 5/7/2023 11:34 AM, Marijn Suijten wrote:
On 2023-05-07 17:27:33, Marijn Suijten wrote:
On 2023-05-04 15:05:15, Abhinav Kumar wrote:
On 5/4/2023 2:56 PM, Marijn Suijten wrote:
On 2023-04-12 16:25:20, Jessica Zhang wrote:
hdisplay for compressed images should be calculated as bytes_per_
On 09/05/2023 03:28, Abhinav Kumar wrote:
On 5/8/2023 4:08 PM, Dmitry Baryshkov wrote:
On 09/05/2023 00:46, Jessica Zhang wrote:
On 5/7/2023 9:00 AM, Marijn Suijten wrote:
On 2023-05-05 14:23:50, Jessica Zhang wrote:
Add DATA_COMPRESS feature flag to DPU INTF block.
In DPU 7.x and later,
On 09/05/2023 03:45, Abhinav Kumar wrote:
On 5/8/2023 4:27 PM, Dmitry Baryshkov wrote:
On 08/05/2023 23:09, Abhinav Kumar wrote:
On 5/3/2023 1:26 AM, Dmitry Baryshkov wrote:
On 03/05/2023 04:19, Jessica Zhang wrote:
Currently, word count is calculated using slice_count. This is
incorrect
On 5/8/2023 4:27 PM, Dmitry Baryshkov wrote:
On 08/05/2023 23:09, Abhinav Kumar wrote:
On 5/3/2023 1:26 AM, Dmitry Baryshkov wrote:
On 03/05/2023 04:19, Jessica Zhang wrote:
Currently, word count is calculated using slice_count. This is
incorrect
as downstream uses slice per packet, whic
On 5/8/2023 2:46 PM, Marijn Suijten wrote:
On 2023-04-12 16:25:20, Jessica Zhang wrote:
hdisplay for compressed images should be calculated as bytes_per_slice *
slice_count. Thus, use MSM DSC helper to calculate hdisplay for
dsi_timing_setup instead of directly using mode->hdisplay.
This do
On 5/8/2023 4:08 PM, Dmitry Baryshkov wrote:
On 09/05/2023 00:46, Jessica Zhang wrote:
On 5/7/2023 9:00 AM, Marijn Suijten wrote:
On 2023-05-05 14:23:50, Jessica Zhang wrote:
Add DATA_COMPRESS feature flag to DPU INTF block.
In DPU 7.x and later, DSC/DCE enablement registers have been mo
> On Sun, May 07, 2023 at 11:39:18PM -0700, Yang, Fei wrote:
>>> On Wed, May 03, 2023 at 03:50:59PM -0700, fei.y...@intel.com wrote:
From: Fei Yang
Currently the KMD is using enum i915_cache_level to set caching policy for
buffer objects. This is flaky because the PAT index whi
On 5/8/2023 4:17 PM, Jessica Zhang wrote:
On 5/7/2023 9:06 AM, Marijn Suijten wrote:
On 2023-05-05 14:23:51, Jessica Zhang wrote:
Add a DPU INTF op to set DATA_COMPRESS register for command mode
panels if
the DPU_INTF_DATA_COMPRESS feature flag is set. This flag needs to be
enabled in ord
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a def
From: Fei Yang
Currently the KMD is using enum i915_cache_level to set caching policy for
buffer objects. This is flaky because the PAT index which really controls
the caching behavior in PTE has far more levels than what's defined in the
enum. In addition, the PAT index is platform dependent, ha
From: Fei Yang
The design is to keep Buffer Object's caching policy immutable through
out its life cycle. This patch ends the support for set caching ioctl
from MTL onward. While doing that we also set BO's to be 1-way coherent
at creation time because GPU is no longer automatically snooping CPU
From: Fei Yang
The first three patches in this series are taken from
https://patchwork.freedesktop.org/series/116868/
These patches are included here because the last patch
has dependency on the pat_index refactor.
This series is focusing on uAPI changes,
1. end support for set caching ioctl [PA
From: Fei Yang
This patch is a preparation for replacing enum i915_cache_level with PAT
index. Caching policy for buffer objects is set through the PAT index in
PTE, the old i915_cache_level is not sufficient to represent all caching
modes supported by the hardware.
Preparing the transition by a
From: Fei Yang
This patch is a preparation for replacing enum i915_cache_level with PAT
index. Caching policy for buffer objects is set through the PAT index in
PTE, the old i915_cache_level is not sufficient to represent all caching
modes supported by the hardware.
Preparing the transition by a
From: Fei Yang
Currently the KMD is using enum i915_cache_level to set caching policy for
buffer objects. This is flaky because the PAT index which really controls
the caching behavior in PTE has far more levels than what's defined in the
enum. In addition, the PAT index is platform dependent, ha
From: Fei Yang
This patch set was posted at
https://patchwork.freedesktop.org/series/116868/
Change title since the PTE patch was merged separately.
These patches are extracted from series
https://patchwork.freedesktop.org/series/115980/
This series refactor the cache policy programming so that
On Mon, 8 May 2023 at 21:01, Dmitry Baryshkov
wrote:
>
> On 08/05/2023 13:49, Dmitry Baryshkov wrote:
> > On 08/05/2023 13:38, Konrad Dybcio wrote:
> >>
> >>
> >> On 8.05.2023 12:33, Dmitry Baryshkov wrote:
> >>> On 08/05/2023 11:33, Konrad Dybcio wrote:
>
>
> On 7.05.2023 21:07, Dm
On 08/05/2023 23:09, Abhinav Kumar wrote:
On 5/3/2023 1:26 AM, Dmitry Baryshkov wrote:
On 03/05/2023 04:19, Jessica Zhang wrote:
Currently, word count is calculated using slice_count. This is incorrect
as downstream uses slice per packet, which is different from
slice_count.
Slice count repr
On 5/7/2023 9:06 AM, Marijn Suijten wrote:
On 2023-05-05 14:23:51, Jessica Zhang wrote:
Add a DPU INTF op to set DATA_COMPRESS register for command mode panels if
the DPU_INTF_DATA_COMPRESS feature flag is set. This flag needs to be
enabled in order for DSC v1.2 to work.
Note: These changes
On 09/05/2023 00:46, Jessica Zhang wrote:
On 5/7/2023 9:00 AM, Marijn Suijten wrote:
On 2023-05-05 14:23:50, Jessica Zhang wrote:
Add DATA_COMPRESS feature flag to DPU INTF block.
In DPU 7.x and later, DSC/DCE enablement registers have been moved from
PINGPONG to INTF.
As core_rev (and rela
From: Fei Yang
Currently the KMD is using enum i915_cache_level to set caching policy for
buffer objects. This is flaky because the PAT index which really controls
the caching behavior in PTE has far more levels than what's defined in the
enum. In addition, the PAT index is platform dependent, ha
From: Fei Yang
This patch set was posted at
https://patchwork.freedesktop.org/series/116868/
Change title since the PTE patch was merged separately.
These patches are extracted from series
https://patchwork.freedesktop.org/series/115980/
This series refactor the cache policy programming so that
From: Fei Yang
This patch is a preparation for replacing enum i915_cache_level with PAT
index. Caching policy for buffer objects is set through the PAT index in
PTE, the old i915_cache_level is not sufficient to represent all caching
modes supported by the hardware.
Preparing the transition by a
Hi Uwe,
On 5/7/23 13:26, Uwe Kleine-König wrote:
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is (mostly) ignored
and this typically results in
On 2023-05-05 15:11:44, Dmitry Baryshkov wrote:
> On 27/04/2023 18:37, Marijn Suijten wrote:
> > On 2023-04-21 00:31:16, Konrad Dybcio wrote:
> >> Add SM6350 support to the DPU1 driver to enable display output.
> >>
> >> Signed-off-by: Konrad Dybcio
> >> Signed-off-by: Konrad Dybcio
> >
> > Afte
On 2023-04-28 16:03:54, Dmitry Baryshkov wrote:
> >> + .qseed_type = DPU_SSPP_SCALER_QSEED4,
> >
> > I thought it was QSEED3LITE, but doesn't really matter as both are
> > handled similarly. It'll anyway change when I resubmit:
>
> If I understood correctly, we mixed two things: hw stuff and t
Fix the following warnings:
drivers/gpu/drm/vkms/vkms_composer.c:42: warning: Function parameter or member
'frame_info' not described in 'pre_mul_alpha_blend'
drivers/gpu/drm/vkms/vkms_composer.c:42: warning: Excess function parameter
'src_frame_info' description in 'pre_mul_alpha_blend'
drivers
The function vkms_compose_row() was introduced in the code without any
documentation. In order to make the function more clear, add a
kernel-doc to it.
Suggested-by: Melissa Wen
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/vkms/vkms_formats.c | 13 +
1 file changed, 13 insertions(
On 2023-04-12 16:25:17, Jessica Zhang wrote:
> Use the DRM DSC helper for det_thresh_flatness to match downstream
> implementation and the DSC spec.
This should put more emphasis on the fact that the helper **has a
different math implementation** to calculate the value differently, and
that this h
On 2023-05-05 14:49:08, Jessica Zhang wrote:
> On 5/5/2023 2:23 PM, Jessica Zhang wrote:
> > Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
> > is enabled.
> >
> > Changes in v2:
> > - Adjusted pclk_rate math to divide only the hdisplay value by
> >compression ratio
On 2023-05-08 10:36:09, Konrad Dybcio wrote:
> > Depending on who lands first, this flag should be split.
> I'll adapt my patches. Jessica, no changes required on your side.
Looks like no split is needed after moving HCTL to SC7180. Your SM6375
series can use SC7180 instead of SC7280 now and eve
On 2023-05-08 14:46:10, Jessica Zhang wrote:
>
>
> On 5/7/2023 9:00 AM, Marijn Suijten wrote:
> > On 2023-05-05 14:23:50, Jessica Zhang wrote:
> >> Add DATA_COMPRESS feature flag to DPU INTF block.
> >>
> >> In DPU 7.x and later, DSC/DCE enablement registers have been moved from
> >> PINGPONG to
On 2023-05-07 22:21:35, Dmitry Baryshkov wrote:
> > Konrad: Your SM6350/SM6375 series v3 [1] switched from INTF_SC7180_MASK
> > to INTF_SC7280_MASK to enable HCTL on SM6375, but that will now
> > erroneously also receive this feature flag and write the new
> > DATA_COMPESS mask even if it's DPU 6.
On 5/7/2023 9:00 AM, Marijn Suijten wrote:
On 2023-05-05 14:23:50, Jessica Zhang wrote:
Add DATA_COMPRESS feature flag to DPU INTF block.
In DPU 7.x and later, DSC/DCE enablement registers have been moved from
PINGPONG to INTF.
As core_rev (and related macros) was removed from the dpu_kms s
On 2023-04-12 16:25:20, Jessica Zhang wrote:
> hdisplay for compressed images should be calculated as bytes_per_slice *
> slice_count. Thus, use MSM DSC helper to calculate hdisplay for
> dsi_timing_setup instead of directly using mode->hdisplay.
This doesn't really matter in the common case of of
On 2023-04-12 16:25:18, Jessica Zhang wrote:
> Correct the math for slice_last_group_size so that it matches the
> calculations downstream.
>
> Changes in v3:
> - Reworded slice_last_group_size calculation to
> `(dsc->slice_width + 2) % 3`
>
> Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add suppor
On Mon, May 8, 2023 at 11:28 PM Dmitry Torokhov
wrote:
> On Mon, May 08, 2023 at 11:23:44PM +0200, Linus Walleij wrote:
> > > This needs to be
> > >
> > > return !gpiod_get_value_raw(ts->gpio_pendown);
> >
> > There is no such function. The gpio descriptor runpath simply assumes that
> >
On Mon, May 8, 2023 at 5:17 PM wrote:
> > + GPIO_LOOKUP("gpio-32-47", 8, "tahvo_irq",
> > + GPIO_ACTIVE_HIGH),
>
> Missing terminator.
Darn I missed this comment in v4, I have fixed it in my tree, I will see if
there are more comments for v4 before I resend.
On Mon, May 08, 2023 at 11:23:44PM +0200, Linus Walleij wrote:
> On Fri, May 5, 2023 at 8:08 PM Dmitry Torokhov
> wrote:
>
> > > - return !gpio_get_value(ts->gpio_pendown);
> > > + return !gpiod_get_value(ts->gpio_pendown);
> >
> > This needs to be
> >
> > return !gpiod_get_value_
On 4/23/23 10:10, Melissa Wen wrote:
> From: Joshua Ashton
>
> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80
> nits for SD
On Mon, May 08, 2023 at 11:20:06PM +0200, Linus Walleij wrote:
> The Nokia 770 is using GPIOs from the global numberspace on the
> CBUS node to pass down to the LCD controller. This regresses when we
> let the OMAP GPIO driver use dynamic GPIO base.
>
> The Nokia 770 now has dynamic allocation of
On 4/23/23 10:10, Melissa Wen wrote:
> From amdgpu_dm_plane we can get it for both CRTC and plane color
> properties. We are adding new plane properties for AMD driver-private
> color mgmt.
>
> Signed-off-by: Melissa Wen
> ---
> .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c| 37 +
On 4/23/23 10:10, Melissa Wen wrote:
> From: Joshua Ashton
>
> Add predefined transfer function property to DRM CRTC gamma to convert
> to wire encoding with or without gamma LUT.
>
Are all these new CRTC properties used by gamescope? I would be reluctant
to merge them if they're currently n
On 4/23/23 10:10, Melissa Wen wrote:
> CRTC shaper LUT shapes the content after blending, i.e., de-linearizes
> or normalizes space before applying a 3D LUT color correction. In the
> next patch, we add CRTC 3D LUT property to DRM color management after
> this shaper LUT and before the current C
On 4/23/23 10:10, Melissa Wen wrote:
> Hi all,
>
> Joshua Ashton and I (with the great collaboration of Harry Wentland -
> thanks) have been working on KMS color pipeline enhancement for Steam
> Deck/SteamOS by exposing the large set of color caps available in AMD
> display HW.
>
Thank you fo
On 4/23/23 10:10, Melissa Wen wrote:
> We are enabling a large set of color calibration features to enhance KMS
> color mgmt but these properties are specific of AMD display HW, and
> cannot be provided by other vendors. Therefore, set a config option to
> enable AMD driver-private properties used
On Fri, May 5, 2023 at 8:08 PM Dmitry Torokhov
wrote:
> > - return !gpio_get_value(ts->gpio_pendown);
> > + return !gpiod_get_value(ts->gpio_pendown);
>
> This needs to be
>
> return !gpiod_get_value_raw(ts->gpio_pendown);
There is no such function. The gpio descriptor runpath si
Several device tree files get the polarity of the pendown-gpios
wrong: this signal is active low. Fix up all incorrect flags, so
that operating systems can rely on the flag being correctly set.
Signed-off-by: Linus Walleij
---
ChangeLog ->v4
- New patch as issue was pointed out by Dmitry. Can be
A recent change to the OMAP driver making it use a dynamic GPIO
base created problems with some old OMAP1 board files, among
them Nokia 770, SX1 and also the OMAP2 Nokia n8x0.
Fix up all instances of GPIOs being used for the MMC driver
by pushing the handling of power, slot selection and MMC
"cove
The platform devices on the Nokia 770 is using some
board-specific IRQs that get statically assigned to platform
devices in the boardfile.
This does not work with dynamic IRQ chip bases.
Utilize the NULL device to define some board-specific
GPIO lookups and use these to immediately look up the
sa
A recent change to use dynamic GPIO base allocation in the
OMAP GPIO driver caused a regression in some OMAP1 boards.
This series fixes up the Nokia 770 board from 2005:
https://en.wikipedia.org/wiki/Nokia_770_Internet_Tablet
I don't know how urgent the fix is, you decide. For me,
it is fair if fr
The Nokia 770 is using GPIOs from the global numberspace on the
CBUS node to pass down to the LCD controller. This regresses when we
let the OMAP GPIO driver use dynamic GPIO base.
The Nokia 770 now has dynamic allocation of IRQ numbers, so this
needs to be fixed for it to work.
As this is the on
On Mon, May 08, 2023 at 10:59:24AM +0200, Konrad Dybcio wrote:
>
>
> On 6.05.2023 16:46, Akhil P Oommen wrote:
> > On Fri, May 05, 2023 at 12:35:18PM +0200, Konrad Dybcio wrote:
> >>
> >>
> >> On 5.05.2023 10:46, Akhil P Oommen wrote:
> >>> On Thu, May 04, 2023 at 08:34:07AM +0200, Konrad Dybcio
On 2023-01-18 15:00:31, Dmitry Baryshkov wrote:
> Move a call to dsi_calc_pclk() out of calc_clk_rate directly towards
> msm_dsi_host_get_phy_clk_req(). It is called for both 6g and v2 hosts.
>
> Also, while we are at it, replace another dsi_get_pclk_rate() invocation
> with using the stored value
On Mon, May 8, 2023 at 5:16 PM wrote:
> Fri, May 05, 2023 at 01:16:55PM +0200, Linus Walleij kirjoitti:
> > The Nokia 770 is using GPIOs from the global numberspace on the
> > CBUS node to pass down to the LCD controller. This regresses when we
> > let the OMAP GPIO driver use dynamic GPIO base.
On 5/3/2023 1:26 AM, Dmitry Baryshkov wrote:
On 03/05/2023 04:19, Jessica Zhang wrote:
Currently, word count is calculated using slice_count. This is incorrect
as downstream uses slice per packet, which is different from
slice_count.
Slice count represents the number of soft slices per inter
On Sun, May 7, 2023 at 6:26 PM Uwe Kleine-König
wrote:
>
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do error handling by
> returning an error code. However the value returned is (mostly) ignored
> and this typical
On 5/4/2023 8:35 AM, Dmitry Baryshkov wrote:
DSC model contains pre-SCR RC parameters for other bpp/bpc combinations,
include them here for completeness. The values were generated from the
'pre_scr_cfg_files_for_reference' files found in DSC models 20210623.
The same fileset is a part of DSC m
On 5/8/23 05:18, Daniel Vetter wrote:
> On Mon, 8 May 2023 at 10:58, Simon Ser wrote:
>>
>> On Friday, May 5th, 2023 at 21:53, Daniel Vetter wrote:
>>
>>> On Fri, May 05, 2023 at 04:06:26PM +, Simon Ser wrote:
On Friday, May 5th, 2023 at 17:28, Daniel Vetter wrote:
> Ok no c
On 08/05/2023 13:49, Dmitry Baryshkov wrote:
On 08/05/2023 13:38, Konrad Dybcio wrote:
On 8.05.2023 12:33, Dmitry Baryshkov wrote:
On 08/05/2023 11:33, Konrad Dybcio wrote:
On 7.05.2023 21:07, Dmitry Baryshkov wrote:
Enable ADSP and Modem DSPs on APQ8074 dragonboard. The MSS region
differ
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 52025ebbb518a2d876b8aba191b348ffb1cf368b Add linux-next specific
files for 20230508
Warning reports:
https://lore.kernel.org/oe-kbuild-all/202304230014.ybscpx20-...@intel.com
Warning
On Sun, May 07, 2023 at 11:39:18PM -0700, Yang, Fei wrote:
>> On Wed, May 03, 2023 at 03:50:59PM -0700, fei.y...@intel.com wrote:
>>> From: Fei Yang
>>>
>>> Currently the KMD is using enum i915_cache_level to set caching policy
>for
>>> buffer objects. This is flaky because
On 05.05.2023 22:06, Rodrigo Vivi wrote:
On Thu, May 04, 2023 at 06:27:53PM +0200, Andrzej Hajda wrote:
Hi maintainers of net and i915,
On 25.04.2023 00:05, Andrzej Hajda wrote:
This is revived patchset improving ref_tracker library and converting
i915 internal tracker to ref_tracker.
The old
On Thu, 2023-03-23 at 18:08 +0200, Ville Syrjälä wrote:
> On Thu, Mar 23, 2023 at 03:17:38PM +0100, Niklas Schnelle wrote:
> > On Wed, 2023-03-15 at 12:19 +0200, Ville Syrjälä wrote:
> > > On Wed, Mar 15, 2023 at 09:16:50AM +0100, Geert Uytterhoeven wrote:
> > > > Hi Niklas,
> > > >
> > > > On Tue
I have tested glmark2 on ls3a5000 with this patch applied,
I have also bought a better gpu (vega 56), which is on the way.
currently only have a rx550 at hand.
I pasted the performance score here, how about this score?
Does this looks normal?
glmark2
=
On Mon, May 08, 2023 at 04:50:15PM +0800, Cong Liu wrote:
> Be sure to properly free the allocated memory before exiting
> the live_nop_switch function.
>
> Signed-off-by: Cong Liu
> ---
> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deleti
On Thu, Apr 27, 2023 at 12:02:18PM +0200, Daniel Vetter wrote:
> On Tue, Apr 25, 2023 at 08:02:40AM +, Brandon Pollack wrote:
> > added documentation to drm_dev_unregister clarifying that devres managed
> > devices allocated with devm_drm_dev_alloc do not require calls to
> > drm_dev_put.
> >
Nice patch!
I have tested this patch on ls3a5000+ls7a2000+AMDGPU RX550, but it seems
that dc_fpu_begin() and
dc_fpu_end() will not be called on AMDGPU RX550. But it at least proved that
this patch does not introduce bugs to what already works.
I can proved that after apply this patch, glm
Fri, May 05, 2023 at 01:16:57PM +0200, Linus Walleij kirjoitti:
> The platform devices on the Nokia 770 is using some
> board-specific IRQs that get statically assigned to platform
> devices in the boardfile.
>
> This does not work with dynamic IRQ chip bases.
>
> Utilize the NULL device to defin
Fri, May 05, 2023 at 01:16:55PM +0200, Linus Walleij kirjoitti:
> The Nokia 770 is using GPIOs from the global numberspace on the
> CBUS node to pass down to the LCD controller. This regresses when we
> let the OMAP GPIO driver use dynamic GPIO base.
>
> The Nokia 770 now has dynamic allocation of
May 7, 2023 at 7:26 PM, "Uwe Kleine-König" mailto:u.kleine-koe...@pengutronix.de?to=%22Uwe%20Kleine-K%C3%B6nig%22%20%3Cu.kleine-koenig%40pengutronix.de%3E
> wrote:
>
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do
Applied. Thanks!
On Sat, May 6, 2023 at 4:11 AM Jiapeng Chong
wrote:
>
> Variable golden_settings_gc_9_4_3 is not effectively used, so delete it.
>
> drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c:48:38: warning:
> ‘golden_settings_gc_9_4_3’ defined but not used.
>
> Reported-by: Abaci Robot
> Link:
Maíra Canal writes:
> I've been contributing to VKMS with improvements, reviews, testing and
> debugging. Therefore, add myself as a co-maintainer of the VKMS driver.
>
> Signed-off-by: Maíra Canal
> ---
Reviewed-by: Javier Martinez Canillas
--
Best regards,
Javier Martinez Canillas
Core Pl
Hi,
On Sat, May 6, 2023 at 2:32 AM Cong Yang
wrote:
>
> Optimize flickering problem and power off sequence GOP timing at sleep in
> mode.
> When display sleep in raise the potential of all GOP signals to VGHO and then
> lower to GND.
>
> Signed-off-by: Cong Yang
> ---
> .../gpu/drm/panel/panel
I've been contributing to VKMS with improvements, reviews, testing and
debugging. Therefore, add myself as a co-maintainer of the VKMS driver.
Signed-off-by: Maíra Canal
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 276298cfc7ee..63e9b1e8c113
Hello again,
On 2023-05-08 at 08:54:28 +0200, Frank Oltmanns wrote:
> Hello Roman,
>
> On 2023-05-03 at 16:22:32 +0200, "Roman Beranek" wrote:
>> Hello everyone,
>>
>> I apologize for my absence from the discussion during past week, I got
>> hit with tonsillitis.
>
> I hope you feel better!
>
>>
On Wed, May 3, 2023 at 10:07 AM Gurchetan Singh
wrote:
>
>
>
> On Mon, May 1, 2023 at 8:38 AM Dmitry Osipenko
> wrote:
>>
>> On 4/16/23 14:52, Dmitry Osipenko wrote:
>> > We have multiple Vulkan context types that are awaiting for the addition
>> > of the sync object DRM UAPI support to the Virt
On Sun, May 7, 2023 at 6:31 PM Uwe Kleine-König
wrote:
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do error handling by
> returning an error code. However the value returned is (mostly) ignored
> and this typically
On Sun, May 7, 2023 at 6:31 PM Uwe Kleine-König
wrote:
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do error handling by
> returning an error code. However the value returned is (mostly) ignored
> and this typically
On 5/7/23 17:54, Melissa Wen wrote:
On 04/18, Maíra Canal wrote:
This patchset implements all possible rotation value in vkms. All operations
were implemented by software by changing the way the pixels are read. The way
the blending is performed can be depicted as:
- rotate-0:
(x) >
On 5/3/23 09:51, Gerd Hoffmann wrote:
> On Mon, May 01, 2023 at 06:38:45PM +0300, Dmitry Osipenko wrote:
>> On 4/16/23 14:52, Dmitry Osipenko wrote:
>>> We have multiple Vulkan context types that are awaiting for the addition
>>> of the sync object DRM UAPI support to the VirtIO-GPU kernel driver:
Fbdev provides helpers for framebuffer I/O, such as fb_readl(),
fb_writel() or fb_memcpy_to_fb(). The implementation of each helper
depends on the architecture, but they are all equivalent to regular
I/O functions of similar names. So use regular functions instead and
move all helpers into
The fi
Fix coding style. No functional changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Arnd Bergmann
Reviewed-by: Sam Ravnborg
Reviewed-by: Sui Jingfeng
Tested-by: Sui Jingfeng
---
drivers/video/fbdev/matrox/matroxfb_accel.c | 6 +++---
drivers/video/fbdev/matrox/matroxfb_base.h | 4 ++--
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