Am 16.04.23 um 16:38 schrieb Sui Jingfeng:
The dma_resv_wait_timeout() function return a value greater than zero
on success.
Signed-off-by: Sui Jingfeng
Reviewed and pushed to drm-misc-next.
Thanks,
Christian.
---
drivers/dma-buf/dma-resv.c | 2 +-
1 file changed, 1 insertion(+), 1 dele
Am 11.04.23 um 16:13 schrieb Daniel Vetter:
On Tue, Apr 11, 2023 at 11:02:55AM +0200, Christian König wrote:
The point is that this not only requires some work in the drm_scheduler, but
rather it then makes only little sense to use the drm_scheduler in the first
place.
The whole point of the dr
> fei.y...@intel.com kirjoitti 17.4.2023 klo 9.24:
>> From: Fei Yang
>>
>> The series includes patches needed to enable MTL.
>> Also add new extension for GEM_CREATE uAPI to let user space set cache
>> policy for buffer objects.
>
> if I'm counting right, this would be version 5 of the series, y
fei.y...@intel.com kirjoitti 17.4.2023 klo 9.24:
From: Fei Yang
The series includes patches needed to enable MTL.
Also add new extension for GEM_CREATE uAPI to let
user space set cache policy for buffer objects.
if I'm counting right, this would be version 5 of the series, yet that
is not sh
On Mon, Apr 17, 2023 at 02:01:05PM +0800, Hongqi Chen wrote:
> Smatch reports that missing unwind goto in psb_driver_load().
> drivers/gpu/drm/gma500/psb_drv.c:350 psb_driver_load() warn: missing
> unwind goto?
>
> psb_driver_unload() and psb_driver_load() exist in correspondence,
> and psb_drive
From: Fei Yang
PTE encode functions are platform dependent. This patch implements
PTE functions for MTL, and ensures the correct PTE encode function
is used by calling pte_encode function pointer instead of the
hardcoded gen8 version of PTE encode.
Signed-off-by: Fei Yang
---
drivers/gpu/drm/i
From: Fei Yang
Currently the KMD is using enum i915_cache_level to set caching policy for
buffer objects. This is flaky because the PAT index which really controls
the caching behavior in PTE has far more levels than what's defined in the
enum. In addition, the PAT index is platform dependent, ha
From: Fei Yang
The design is to keep Buffer Object's caching policy immutable through
out its life cycle. This patch ends the support for set caching ioctl
from MTL onward. While doing that we also set BO's to be 1-way coherent
at creation time because GPU is no longer automatically snooping CPU
From: Fei Yang
The series includes patches needed to enable MTL.
Also add new extension for GEM_CREATE uAPI to let
user space set cache policy for buffer objects.
Fei Yang (7):
drm/i915/mtl: Set has_llc=0
drm/i915/mtl: Add PTE encode function
drm/i915/mtl: workaround coherency issue for Me
From: Fei Yang
This patch implements Wa_22016122933.
In MTL, memory writes initiated by Media tile update the whole
cache line even for partial writes. This creates a coherency
problem for cacheable memory if both CPU and GPU are writing data
to different locations within a single cache line. CT
From: Fei Yang
This patch is a preparation for replacing enum i915_cache_level with PAT
index. Caching policy for buffer objects is set through the PAT index in
PTE, the old i915_cache_level is not sufficient to represent all caching
modes supported by the hardware.
Preparing the transition by a
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out its life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a defau
From: Madhumitha Tolakanahalli Pradeep
On MTL, GT can no longer allocate on LLC - only the CPU can.
This, along with addition of support for L4 cache calls a
MOCS/PAT table update.
Alos the PAT index registers are multicasted for primary GT,
and there is an address jump from index 7 to 8. This p
From: Fei Yang
On MTL, GT is no longer allocated on LLC, set has_llc=0.
Signed-off-by: Fei Yang
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index cddb6e197972..025d32c0b161 100644
---
Am 14.04.23 um 21:33 schrieb Hamza Mahfooz:
Currently, we allow the framebuffer for a given plane to move between
memory domains, however when that happens it causes the screen to
flicker, it is even possible for the framebuffer to change memory
domains on every plane update (causing a continuous
Am 15.04.23 um 04:02 schrieb John Ogness:
Commit 41d351f29528 ("drm/nouveau: stop using ttm_bo_wait")
converted from ttm_bo_wait_ctx() to dma_resv_wait_timeout().
However, dma_resv_wait_timeout() returns greater than zero on
success as opposed to ttm_bo_wait_ctx(). As a result, relocs
will fail a
-next' into drm-tip
config: sparc-allyesconfig
(https://download.01.org/0day-ci/archive/20230416/202304162325.yltnxysy-...@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/mak
/20230416/202304160359.4lhmfolu-...@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot
| Reported-by: Dan Carpenter
| Link: https://lore.kernel.org/r/202304160359.4lhmfolu-...@intel.com
Hi Daniel,
2023년 3월 29일 (수) 오후 2:39, 대인기 님이 작성:
>
>
>
> > -Original Message-
> > From: Daniel Vetter
> > Sent: Wednesday, March 29, 2023 2:31 AM
> > To: Inki Dae
> > Cc: airl...@linux.ie; dan...@ffwll.ch; dri-devel@lists.freedesktop.org;
> > linux-samsung-...@vger.kernel.org
> > Subject:
On Sat, Apr 08, 2023 at 04:05:20PM +0900, Asahi Lina wrote:
> On 04/04/2023 10.58, Matthew Brost wrote:
> > On Tue, Apr 04, 2023 at 10:07:48AM +0900, Asahi Lina wrote:
> > > Hi, thanks for the Cc!
> > >
> >
> > No problem.
> >
> > > On 04/04/2023 09.22, Matthew Brost wrote:
> > > > Hello,
> > >
In multi-gt systems IRQs need to be reset and enabled per GT.
This might add some redundancy when handling interrupts for
engines that might not exist in every tile, but helps to keep the
code cleaner and more understandable.
Signed-off-by: Andi Shyti
Cc: Tvrtko Ursulin
---
Hi,
Following the m
On Sun, Apr 16, 2023 at 5:07 PM Marek Vasut wrote:
>
> On 4/15/23 12:40, Adam Ford wrote:
> > According to Table 13-45 of the i.MX8M Mini Reference Manual, the min
> > and max values for M and the frequency range for the VCO_out
> > calculator were incorrect. This also appears to be the case for
On 4/15/23 12:41, Adam Ford wrote:
The high-speed clock is hard-coded to the burst-clock
frequency specified in the device tree. However, when
using devices like certain bridge chips without burst mode
and varying resolutions and refresh rates, it may be
necessary to set the high-speed clock dyn
On 4/15/23 12:41, Adam Ford wrote:
NXP uses a lookup table to determine the various values for
the PHY Timing based on the clock rate in their downstream
kernel. Since the input clock can be variable, the phy
settings need to be variable too. Add an additional variable
to the driver data to ena
On 4/15/23 12:41, Adam Ford wrote:
Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
having an entry in the device tree for samsung,pll-clock-frequency.
Signed-off-by: Adam Ford
---
drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++--
1 file changed, 6 insertions(+), 6 deleti
On 4/15/23 12:40, Adam Ford wrote:
According to Table 13-45 of the i.MX8M Mini Reference Manual, the min
and max values for M and the frequency range for the VCO_out
calculator were incorrect. This also appears to be the case for the
imx8mn and imx8mp.
To fix this, make new variables to hold t
On 4/15/23 12:40, Adam Ford wrote:
If there is more than one lane, the HFP, HBP, and HSA is calculated in
bytes/pixel, then they are divided amongst the different lanes with some
additional overhead. This is necessary to achieve higher resolutions while
keeping the pixel clocks lower as the numbe
Uwe Kleine-König writes:
[...]
>>
>> This issue was already fixed by Dave in commit b24343eaceed ("Merge tag
>> 'drm-misc-next-2023-03-16' of git://anongit.freedesktop.org/drm/drm-misc
>> into drm-next").
>
> FTR: s/b24343eaceed/c6265f5c2f50/
>
Ups indeed. I pasted the wrong commit :)
> Thank
Hello Javier,
On Sat, Apr 15, 2023 at 11:47:22PM +0200, Javier Martinez Canillas wrote:
> Javier Martinez Canillas writes:
>
> > Uwe Kleine-König writes:
> >
> > Hello Uwe,
> >
> >> Hello,
> >>
> >> On Sat, Mar 18, 2023 at 11:10:27PM +0100, Uwe Kleine-König wrote:
> >>> The driver needs the inc
ci/archive/20230416/202304162325.yltnxysy-...@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
git remote a
On 12/04/2023 17:52, Christian König wrote:
> /**
> - * accel_debugfs_init() - Initialize debugfs for accel minor
> + * accel_debugfs_init() - Register debugfs for accel minor
> + * @dev: Pointer to the device instance.
> + *
> + * This function creates a root directory for the device in debugfs.
Date: Sun, 16 Apr 2023 17:30:46 +0200
The address of a data structure member was determined before
a corresponding null pointer check in the implementation of
the function “receive_timing_debugfs_show”.
Thus avoid the risk for undefined behaviour by moving the assignment
for the variable “vid” be
01
(https://download.01.org/0day-ci/archive/20230416/202304162307.7pcvuwlb-...@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-8) 11.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.4-39-gce1a6720-dirty
#
https://github.com/intel-lab-lkp/li
Few panel bindings for dual-link connections just type "ports: true",
which does not enforce any type. Add common definition of ports, so the
type will be fixed.
Signed-off-by: Krzysztof Kozlowski
---
Cc: Konrad Dybcio
---
.../bindings/display/panel/panel-common.yaml | 16 +++
On 13/04/2023 12:09, Konrad Dybcio wrote:
> Using 'port' instead of 'ports' for single-DSI usecases allows for saving
> a couple of DTS LoC, including a level of indentation. Allow that.
>
> Signed-off-by: Konrad Dybcio
> ---
> .../bindings/display/panel/novatek,nt36523.yaml | 15
> ++
On 13/04/2023 12:09, Konrad Dybcio wrote:
> Some Lenovo J606F tablets come with a 2K (2000x1200) 60Hz 11" 5:3
> video mode display. Document it and allow rotation while at it (Lenovo
> mounted it upside down!).
>
> Reviewed-by: Linus Walleij
> Signed-off-by: Konrad Dybcio
Reviewed-by: Krzysztof
On Mon, 3 Apr 2023 17:49:54 +0200
Paul Cercueil wrote:
> Use the functions provided by the buffer-dma core to implement the
> DMABUF userspace API in the buffer-dmaengine IIO buffer implementation.
>
> Since we want to be able to transfer an arbitrary number of bytes and
> not necesarily the fu
On Mon, 3 Apr 2023 17:47:58 +0200
Paul Cercueil wrote:
> Implement iio_dma_buffer_attach_dmabuf(), iio_dma_buffer_detach_dmabuf()
> and iio_dma_buffer_transfer_dmabuf(), which can then be used by the IIO
> DMA buffer implementations.
>
> Signed-off-by: Paul Cercueil
Hi Paul,
A few superficial
On Mon, 3 Apr 2023 17:47:56 +0200
Paul Cercueil wrote:
> Add the necessary infrastructure to the IIO core to support a new
> optional DMABUF based interface.
>
> With this new interface, DMABUF objects (externally created) can be
> attached to a IIO buffer, and subsequently used for data transf
The dma_resv_wait_timeout() function return a value greater than zero
on success.
Signed-off-by: Sui Jingfeng
---
drivers/dma-buf/dma-resv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index 2a594b754af1..b6f71eb0086
On Mon, 3 Apr 2023 17:47:55 +0200
Paul Cercueil wrote:
> Use the iio_dma_buffer_write() and iio_dma_buffer_space_available()
> functions provided by the buffer-dma core, to enable write support in
> the buffer-dmaengine code.
>
> Signed-off-by: Paul Cercueil
> Reviewed-by: Alexandru Ardelean
On Mon, 3 Apr 2023 17:47:54 +0200
Paul Cercueil wrote:
> Update the devm_iio_dmaengine_buffer_setup() function to support
> specifying the buffer direction.
>
> Update the iio_dmaengine_buffer_submit() function to handle input
> buffers as well as output buffers.
>
> Signed-off-by: Paul Cercue
On Mon, 3 Apr 2023 17:47:53 +0200
Paul Cercueil wrote:
> Adding write support to the buffer-dma code is easy - the write()
> function basically needs to do the exact same thing as the read()
> function: dequeue a block, read or write the data, enqueue the block
> when entirely processed.
>
> Th
On Mon, 3 Apr 2023 17:47:52 +0200
Paul Cercueil wrote:
> The buffer-dma code was using two queues, incoming and outgoing, to
> manage the state of the blocks in use.
>
> While this totally works, it adds some complexity to the code,
> especially since the code only manages 2 blocks. It is much
On Sun, Apr 16, 2023 at 03:31:56PM +0200, Jernej Škrabec wrote:
> Dne nedelja, 16. april 2023 ob 15:25:31 CEST je Laurent Pinchart napisal(a):
> > Hi Jernej,
> >
> > Thank you for the patch.
> >
> > On Sat, Apr 15, 2023 at 12:46:13PM +0200, Jernej Skrabec wrote:
> > > Beelink X2 uses software imp
Dne nedelja, 16. april 2023 ob 15:25:31 CEST je Laurent Pinchart napisal(a):
> Hi Jernej,
>
> Thank you for the patch.
>
> On Sat, Apr 15, 2023 at 12:46:13PM +0200, Jernej Skrabec wrote:
> > Beelink X2 uses software implementation of CEC even though DW-HDMI has
> > working hardware implementation
Hi Jernej,
Thank you for the patch.
On Sat, Apr 15, 2023 at 12:46:13PM +0200, Jernej Skrabec wrote:
> Beelink X2 uses software implementation of CEC even though DW-HDMI has
> working hardware implementation.
Why ? The reason should be explained in the commit message.
> Disable unused DW-HDMI CE
Hi
looping in as well the regressions list (hoping not doing any mistake
with the regzbot commands):
On Wed, Apr 12, 2023 at 11:55:08AM +0200, Cyril Brulebois wrote:
> Since commit 241d2fb56a18 ("of: Make OF framebuffer device names unique"),
> as spotted by Frédéric Bonnard, the historical "of-d
[TLDR: This mail in primarily relevant for Linux regression tracking. A
change or fix related to the regression discussed in this thread was
posted or applied, but it did not use a Link: tag to point to the
report, as Linus and the documentation call for. Things happen, no
worries -- but now the re
Move virtio_gpu_execbuffer_ioctl() into separate virtgpu_submit.c file,
refactoring and optimizing the code along the way to ease addition of new
features to the ioctl.
The optimization is done by using optimal ordering of the job's submission
steps, reducing code path from the start of the ioctl
Add sync object DRM UAPI support to VirtIO-GPU driver. Sync objects
support is needed by native context VirtIO-GPU Mesa drivers, it also will
be used by Venus and Virgl contexts.
Reviewed-by; Emil Velikov
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/virtio/virtgpu_drv.c| 3 +-
drive
We have multiple Vulkan context types that are awaiting for the addition
of the sync object DRM UAPI support to the VirtIO-GPU kernel driver:
1. Venus context
2. Native contexts (virtio-freedreno, virtio-intel, virtio-amdgpu)
Mesa core supports DRM sync object UAPI, providing Vulkan drivers wit
Use dma-fence-unwrap API for waiting each dma-fence of the in-fence array
individually. Sync file's in-fence array always has a non-matching fence
context ID, which doesn't allow to skip waiting of fences with a matching
context ID in a case of a merged sync file fence.
Suggested-by: Rob Clark
Re
From: Moti Haimovski
This commit fixes a bug in Gaudi2 when freeing the scratchpad memory
in case software init fails.
Signed-off-by: Moti Haimovski
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/gaudi2/gaudi2.c | 4 ++--
1 file changed, 2 insertions(+), 2 d
From: Rakesh Ughreja
EDMA transpose workload requires to signal for every activation.
User FW sends all the dummy signals to RD_LBW_RATE_LIM_CFG, to save
lbw bandwidth. We need the user to be able to access that register to
configure it.
Signed-off-by: Rakesh Ughreja
Reviewed-by: Oded Gabbay
S
From: Koby Elbaz
Once it was decided that these security settings are to be done by FW
rather than by the driver, there's no reason to keep them in the code.
Signed-off-by: Koby Elbaz
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/gaudi2/gaudi2_security.c |
From: Tal Cohen
In Gaudi2 asic, PSOC RAZWI may cause in HBW or LBW. The address that
caused the error is read from HW register and printed by the Driver.
There are cases where the Driver receives an indication on PSOC
RAZWI error but the address value is zero. In that case, the indication
is a fa
On 16/04/2023 12:01, Artur Weber wrote:
> Signed-off-by: Artur Weber
Missing commit msg.
Best regards,
Krzysztof
On 16/04/2023 12:01, Artur Weber wrote:
> Signed-off-by: Artur Weber
Missing commit msg.
Subject: drop second/last, redundant "bindings". The "dt-bindings"
prefix is already stating that these are bindings.
> ---
> .../display/panel/samsung,s6d7aa0.yaml| 51 +++
> 1 fi
Date: Sun, 16 Apr 2023 10:50:12 +0200
The address of a data structure member was determined before
a corresponding null pointer check in the implementation of
the functions “nvkm_fanpwm_create” and “nvkm_fantog_create”.
Thus avoid the risk for undefined behaviour by moving the assignment
for the
Date: Sun, 16 Apr 2023 08:45:31 +0200
The variable “pbus” was read only once in the implementation of
the function “nvkm_pcie_set_link”.
Thus move the usage of an expression into a parameter for a function call.
Signed-off-by: Markus Elfring
---
drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.c |
Date: Sun, 16 Apr 2023 08:18:40 +0200
The address of a data structure member was determined before
a corresponding null pointer check in the implementation of
the function “nvkm_pcie_set_link”.
Thus avoid the risk for undefined behaviour by moving the assignment
for the variable “subdev” behind s
Date: Sun, 16 Apr 2023 07:45:54 +0200
The address of a data structure member was determined before
a corresponding null pointer check in the implementation of
the function “nvkm_pstate_new”.
Thus avoid the risk for undefined behaviour by moving the assignment
for the variable “cstate” behind the
Date: Sat, 15 Apr 2023 22:30:30 +0200
The address of a data structure member was determined before
a corresponding null pointer check in the implementation of
the function “nvbios_power_budget_header”.
Thus avoid the risk for undefined behaviour by moving the usage
of an expression into a paramet
Date: Sat, 15 Apr 2023 22:02:31 +0200
Five strings which did not contain a data format specification should
be put into a sequence. Thus use the corresponding function “seq_puts”.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/gpu/drm/nouvea
Date: Sat, 15 Apr 2023 21:48:47 +0200
A single character (line break) should be put into a sequence.
Thus use the corresponding function “seq_putc”.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/gpu/drm/nouveau/nouveau_debugfs.c | 2 +-
1 f
Hi,
On 2023/4/16 15:57, Daniel Vetter wrote:
On Fri, Apr 14, 2023 at 06:58:53PM +0800, Sui Jingfeng wrote:
Hi,
On 2023/4/14 03:16, Thomas Zimmermann wrote:
Hi,
thanks for the patch. This is effectively a revert of commit
8fbc9af55de0 ("drm/fbdev-generic: Set screen size to size of GEM
buffer
Date: Sat, 15 Apr 2023 21:24:43 +0200
The address of a data structure member was determined before
a corresponding null pointer check in the implementation of
the function “nouveau_debugfs_pstate_get”.
Thus avoid the risk for undefined behaviour by moving the assignment
for the variable “ctrl” be
Date: Sat, 15 Apr 2023 21:06:06 +0200
The address of a data structure member was determined before
a corresponding null pointer check in the implementation of
the function “nouveau_debugfs_pstate_set”.
Thus avoid the risk for undefined behaviour by moving the usage
of an expression into a paramet
Date: Sun, 16 Apr 2023 11:22:23 +0200
Several update suggestions were taken into account
from static source code analysis.
Markus Elfring (9):
debugfs: Move an expression into a function call parameter
in nouveau_debugfs_pstate_set()
debugfs: Move a variable assignment behind a null point
On Tue, Apr 11, 2023 at 5:09 PM Tom Rix wrote:
>
> gcc with W=1 reports
> drivers/accel/habanalabs/gaudi/gaudi.c:117:19: error:
> ‘gaudi_irq_name’ defined but not used [-Werror=unused-const-variable=]
> 117 | static const char
> gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = {
>
Smatch reports:
pl111_amba_probe() warn: missing unwind goto?
Code segment for dev_put is:
dev_put:
drm_dev_put(drm);
of_reserved_mem_device_release(dev);
When err happened, jumping to dev_put will release
drm and dev resources allocated or initiali
On Fri, Apr 14, 2023 at 01:59:12PM +0100, broo...@kernel.org wrote:
> Hi all,
>
> Today's linux-next merge of the drm-misc tree got a conflict in:
>
> drivers/gpu/drm/ttm/ttm_pool.c
>
> between commit:
>
> 23baf831a32c0 ("mm, treewide: redefine MAX_ORDER sanely")
>
> from the mm-stable tre
On Fri, Apr 14, 2023 at 06:58:53PM +0800, Sui Jingfeng wrote:
> Hi,
>
> On 2023/4/14 03:16, Thomas Zimmermann wrote:
> > Hi,
> >
> > thanks for the patch. This is effectively a revert of commit
> > 8fbc9af55de0 ("drm/fbdev-generic: Set screen size to size of GEM
> > buffer"). Please add a Fixes t
On Fri, Apr 14, 2023 at 07:30:53PM +0800, Sui Jingfeng wrote:
> Hi,
>
> On 2023/4/14 15:56, Daniel Vetter wrote:
> > On Fri, 14 Apr 2023 at 09:34, Thomas Zimmermann wrote:
> > > Hi
> > >
> > > Am 14.04.23 um 07:36 schrieb Daniel Vetter:
> > > > On Fri, 14 Apr 2023 at 06:24, Sui Jingfeng <1533027
On Fri, Apr 14, 2023 at 06:40:27AM -0700, Rob Clark wrote:
> On Fri, Apr 14, 2023 at 1:57 AM Tvrtko Ursulin
> wrote:
> >
> >
> > On 13/04/2023 21:05, Daniel Vetter wrote:
> > > On Thu, Apr 13, 2023 at 05:40:21PM +0100, Tvrtko Ursulin wrote:
> > >>
> > >> On 13/04/2023 14:27, Daniel Vetter wrote:
>
On Fri, Apr 14, 2023 at 07:52:12PM +0900, Tetsuo Handa wrote:
> On 2023/04/14 19:13, Jani Nikula wrote:
> > On Fri, 14 Apr 2023, Tetsuo Handa
> > wrote:
> >> On 2023/03/15 19:47, Luca Coelho wrote:
> >>> On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
> Like commit c4f135d643823a86 ("
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