Uwe Kleine-König writes:
> On Wed, Mar 22, 2023 at 12:06:55PM +0300, Dan Carpenter wrote:
>> The devm_drm_dev_alloc() function returns error pointers. It never
>> returns NULL. Fix the check.
>>
>> Fixes: c87e859cdeb5 ("drm/imx/lcdc: Implement DRM driver for imx25")
>> Signed-off-by: Dan Carpe
Javier Martinez Canillas writes:
> Uwe Kleine-König writes:
>
> Hello Uwe,
>
>> Hello,
>>
>> On Sat, Mar 18, 2023 at 11:10:27PM +0100, Uwe Kleine-König wrote:
>>> The driver needs the include . WIth CONFIG_OF enabled
>>
>
> Reviewed-by: Javier Martinez Canillas
>
>
>> Just noticed: s/WIth/With/
Uwe Kleine-König writes:
Hello Uwe,
> Hello,
>
> On Sat, Mar 18, 2023 at 11:10:27PM +0100, Uwe Kleine-König wrote:
>> The driver needs the include . WIth CONFIG_OF enabled
>
Reviewed-by: Javier Martinez Canillas
> Just noticed: s/WIth/With/. Assuming no further review comments make a
> v2 ne
On Sat, Apr 15, 2023 at 12:41:09AM +0200, Andi Shyti wrote:
> From: Cong Liu
>
> This patch fixes memory leaks on error escapes in function fake_get_pages
>
> Fixes: c3bfba9a2225 ("drm/i915: Check for integer truncation on scatterlist
> creation")
> Signed-off-by: Cong Liu
> Reviewed-by: Andrz
Rather than passing DRM_MODE_ENCODER_* and letting dpu_encoder to guess,
which intf type we mean, pass INTF_DSI/INTF_DP directly. This is
required to support HDMI output in DPU, as both DP and HDMI encoders are
DRM_MODE_ENCODER_TMDS. Thus dpu_encoder code can not make a difference
between HDMI and
Since msm8998 and older platforms (wip) support INTF_HDMI, extend DPU
driver to support HDMI output. First patch was submitted about a year
ago, but received some pushback ([1], [2]). However it becomes
absolutely required to properly support INTF_HDMI as both HDMI and DP
should use DRM_MODE_ENCODE
MSM8998 and the older Qualcomm platforms support HDMI outputs. Now as
DPU encoder is ready, add support for using INTF_HDMI.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/
This is a note to let you know that I've just added the patch titled
fbmem: Reject FB_ACTIVATE_KD_TEXT from userspace
to the 5.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
fbmem
This is a note to let you know that I've just added the patch titled
fbmem: Reject FB_ACTIVATE_KD_TEXT from userspace
to the 5.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
fbmem
This is a note to let you know that I've just added the patch titled
fbmem: Reject FB_ACTIVATE_KD_TEXT from userspace
to the 6.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
fbmem-
This is a note to let you know that I've just added the patch titled
fbmem: Reject FB_ACTIVATE_KD_TEXT from userspace
to the 6.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
fbmem-
smatch reports
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_dccg.c:277:6: warning:
symbol
'dccg314_init' was not declared. Should it be static?
This variable is only used in one file so should be static.
Signed-off-by: Tom Rix
---
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_dccg.c
use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Jeffrey-Hugo/bus-mhi-host-Add-quirk-framework-and-initial-quirk/20230415-035846
base: git://anongit.freedesktop.org/drm/drm-misc drm
On Thu, Apr 13, 2023 at 09:33:17PM +0200, Christophe JAILLET wrote:
> When dev_err_probe() is called, 'ret' holds the value of the previous
> successful devm_request_irq() call.
> 'ret' should be assigned with a meaningful value before being used in
> dev_err_probe().
>
> While at it, use and retu
e fail to attach to either host, we're done */
+ mipi_dsi_device_unregister(nt->dsi[1]);
+
return dev_err_probe(dev, ret,
"Cannot attach to DSI%d host.\n",
i);
}
---
base-commit: 035ba5f9cf511b9299fd
Even though some DW-HDMI controllers have perfectly usable HDMI-CEC
implementation, some boards might prefer not to use it or even use
software implementation instead.
Add property for disabling CEC so driver doesn't expose unused CEC
interface, if CEC pin isn't connected anywhere.
Signed-off-by:
Beelink X2 uses software implementation of CEC even though DW-HDMI has
working hardware implementation.
Disable unused DW-HDMI CEC.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-
New DT property allows to skip CEC initialization.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 603bb
Boards can have perfectly working DW HDMI CEC implementation but they
may prefer to use bit banged implementation instead. This is the
situation on Beelink X2.
Add DW HDMI DT property for disabling CEC. This prevents confusion on
userspace side by not exposing unused CEC interface.
Best regards,
The high-speed clock is hard-coded to the burst-clock
frequency specified in the device tree. However, when
using devices like certain bridge chips without burst mode
and varying resolutions and refresh rates, it may be
necessary to set the high-speed clock dynamically based
on the desired pixel c
There are a few clocks whose parents are set in mipi_dsi
and mxsfb nodes, but these clocks are used by the disp_blk_ctrl
power domain which may cause an issue when re-parenting, resuling
in a disp_pixel clock having the wrong parent and wrong rate.
Fix this by moving the assigned-clock-parents as
Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of
having an entry in the device tree for samsung,pll-clock-frequency.
Signed-off-by: Adam Ford
---
drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/br
NXP uses a lookup table to determine the various values for
the PHY Timing based on the clock rate in their downstream
kernel. Since the input clock can be variable, the phy
settings need to be variable too. Add an additional variable
to the driver data to enable this feature to prevent breaking
According to Table 13-45 of the i.MX8M Mini Reference Manual, the min
and max values for M and the frequency range for the VCO_out
calculator were incorrect. This also appears to be the case for the
imx8mn and imx8mp.
To fix this, make new variables to hold the min and max values of m
and the mi
If there is more than one lane, the HFP, HBP, and HSA is calculated in
bytes/pixel, then they are divided amongst the different lanes with some
additional overhead. This is necessary to achieve higher resolutions while
keeping the pixel clocks lower as the number of lanes increase.
Signed-off-by:
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