Add the missing declaration of struct drm_atomic_state to fix the
compile error below:
error: 'struct drm_atomic_state' declared inside parameter
list will not be visible outside of this definition or declaration [-Werror]
Signed-off-by: Ma Jun
---
include/drm/drm_plane_helper.h | 1 +
1 file c
Quoting Dmitry Baryshkov (2022-12-15 13:12:49)
> On 15/12/2022 02:38, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> >>
> >> Once link training start, then there are no any interactions between
> >> controller and phy during link training session.
> >
> > What do you mean? The
On 12/15/2022 4:40 PM, Thomas Zimmermann wrote:
> Hi
>
> Am 15.12.22 um 04:01 schrieb Ma Jun:
>> Add the missing declaration of struct drm_atomic_state to fix the
>> compile error below:
>>
>> error: 'struct drm_atomic_state' declared inside parameter
>> list will not be visible outside of this
dp_display_irq_handler() is the main isr handler with the helps
of two sub isr, dp_aux_isr and dp_ctrl_isr, to service all DP
interrupts on every irq triggered. Current all three isr does
not return IRQ_HANDLED if there are any interrupts it had
serviced. This patch fix this ambiguity by having all
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr status bits shows interrupts
are pending. The
ignore spuriors isr at dp_aux_isr() to fixed eDP edid read failed
Kuogee Hsieh (2):
drm/msm/dp: do not complete dp_aux_cmd_fifo_tx() if irq is not for aux
transfer
drm/msm/dp: enhance dp controller isr
drivers/gpu/drm/msm/dp/dp_aux.c | 97 ++---
driver
On Fri, 16 Dec 2022 at 00:53, Kuogee Hsieh wrote:
>
> dp_display_irq_handler() is the main isr handler with the helps
> of two sub isr, dp_aux_isr and dp_ctrl_isr, to service all DP
> interrupts on every irq triggered. Current all three isr does
> not return IRQ_HANDLED if there are any interrupts
On Fri, 16 Dec 2022 at 00:53, Kuogee Hsieh wrote:
>
> There are 3 possible interrupt sources are handled by DP controller,
> HPDstatus, Controller state changes and Aux read/write transaction.
> At every irq, DP controller have to check isr status of every interrupt
> sources and service the inter
On Fri, 16 Dec 2022 at 00:57, Doug Anderson wrote:
>
> Hi,
>
> On Thu, Dec 15, 2022 at 1:12 PM Dmitry Baryshkov
> wrote:
> >
> > On 15/12/2022 02:38, Stephen Boyd wrote:
> > > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> > >>
> > >> On 12/13/2022 3:06 PM, Stephen Boyd wrote:
> > >>> Quoting Kuoge
Hi,
On Thu, Dec 15, 2022 at 1:12 PM Dmitry Baryshkov
wrote:
>
> On 15/12/2022 02:38, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> >>
> >> On 12/13/2022 3:06 PM, Stephen Boyd wrote:
> >>> Quoting Kuogee Hsieh (2022-12-13 13:44:05)
> Add both data-lanes and link-frequen
ignore spuriors isr at dp_aux_isr() to fixed eDP edid read failed
Kuogee Hsieh (2):
drm/msm/dp: do not complete dp_aux_cmd_fifo_tx() if irq is not for aux
transfer
drm/msm/dp: enhance dp controller isr
drivers/gpu/drm/msm/dp/dp_aux.c | 98 +
driver
dp_display_irq_handler() is the main isr handler with the helps
of two sub isr, dp_aux_isr and dp_ctrl_isr, to service all DP
interrupts on every irq triggered. Current all three isr does
not return IRQ_HANDLED if there are any interrupts it had
serviced. This patch fix this ambiguity by having all
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr status bits shows interrupts
are pending. The
Hi Dave, Daniel,
Fixes for 6.2.
The following changes since commit 66efff515a6500d4b4976fbab3bee8b92a1137fb:
Merge tag 'amd-drm-next-6.2-2022-12-07' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2022-12-09 12:08:33
+1000)
are available in the Git repository at:
https://git
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on next-20221215]
[also build test ERROR on linus/master v6.1]
[cannot apply to drm-misc/drm-misc-next drm/drm-next drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip drm-exynos/exynos-drm
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on next-20221215]
[also build test ERROR on linus/master v6.1]
[cannot apply to drm-misc/drm-misc-next drm/drm-next drm-intel/for-linux-next
drm-intel/for-linux-next-fixes drm-tip/drm-tip drm-exynos/exynos-drm
On 12/15/2022 1:15 PM, Dmitry Baryshkov wrote:
On 15/12/2022 22:10, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
On 15/12/2022 20:32, Kuogee Hsieh wrote:
if (!aux->cmd_busy)
return;
if (aux->native)
- dp_aux_native_handler(aux,
On 12/15/2022 1:15 PM, Dmitry Baryshkov wrote:
On 15/12/2022 22:10, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
On 15/12/2022 20:32, Kuogee Hsieh wrote:
if (!aux->cmd_busy)
return;
if (aux->native)
- dp_aux_native_handler(aux,
On 15/12/2022 22:10, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
On 15/12/2022 20:32, Kuogee Hsieh wrote:
if (!aux->cmd_busy)
return;
if (aux->native)
- dp_aux_native_handler(aux, isr);
+ ret = dp_aux_native_handler(au
On 15/12/2022 02:38, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-12-14 14:56:23)
On 12/13/2022 3:06 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-12-13 13:44:05)
Add both data-lanes and link-frequencies property into endpoint
Why do we care? Please tell us why it's important.
Any r
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr status bits shows interrupts
are pending. The
https://bugzilla.kernel.org/show_bug.cgi?id=216119
--- Comment #49 from Harald Judt (h.j...@gmx.at) ---
I meant "I am not quite sure about this."
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are watching the assignee of the bug.
https://bugzilla.kernel.org/show_bug.cgi?id=216119
--- Comment #48 from Harald Judt (h.j...@gmx.at) ---
Ok. I am quite sure about this, but I have new observations which could mean
that the hibernation issue could be fixed but there is another issue.
First, I have tried 6.1.0. Hibernation/resume
Hi Dave and Daniel,
In case you end up sending more stuff towards 6.2-rc1,
please consider sending these fixes below.
The migrate related fixes seems to be the most important
ones, but also I don't believe it looks so critical that
it couldn't wait for the -rc2.
Here goes drm-intel-next-fixes-20
On 12/15/2022 10:46 AM, Dmitry Baryshkov wrote:
On 15/12/2022 20:32, Kuogee Hsieh wrote:
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every inter
On 12/15/2022 12:10 PM, Stephen Boyd wrote:
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
On 15/12/2022 20:32, Kuogee Hsieh wrote:
if (!aux->cmd_busy)
return;
if (aux->native)
- dp_aux_native_handler(aux, isr);
+ ret = dp_aux_native_handl
Quoting Kuogee Hsieh (2022-12-15 09:08:04)
>
> On 12/14/2022 4:38 PM, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> >> On 12/13/2022 3:06 PM, Stephen Boyd wrote:
> >>> Quoting Kuogee Hsieh (2022-12-13 13:44:05)
> >
> >> Therefore I think add data-lanes and link-frequencies pr
Quoting Dmitry Baryshkov (2022-12-15 10:46:42)
> On 15/12/2022 20:32, Kuogee Hsieh wrote:
> > if (!aux->cmd_busy)
> > return;
> >
> > if (aux->native)
> > - dp_aux_native_handler(aux, isr);
> > + ret = dp_aux_native_handler(aux, isr);
> > else
Acked-by: Dave Airlie
On Fri, 16 Dec 2022 at 00:20, Christian König
wrote:
>
> Am 25.11.22 um 11:21 schrieb Christian König:
> > TTM is just wrapping core DMA functionality here, remove the mid-layer.
> > No functional change.
>
> Any objections to this guys?
>
> I'm basically just following a s
On Wed, Dec 14, 2022 at 11:37:19PM +0100, Andi Shyti wrote:
> Hi Rodrigo,
>
> On Tue, Dec 13, 2022 at 01:18:48PM +, Vivi, Rodrigo wrote:
> > On Tue, 2022-12-13 at 00:08 +0100, Andi Shyti wrote:
> > > Hi Rodrigo,
> > >
> > > On Mon, Dec 12, 2022 at 11:55:10AM -0500, Rodrigo Vivi wrote:
> > > >
Le 15/12/2022 à 20:46, Christophe JAILLET a écrit :
Le 15/12/2022 à 17:36, Arnd Bergmann a écrit :
From: Arnd Bergmann
The activity_monitor_external[] array is too big to fit on the
kernel stack, resulting in this warning with clang:
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_7
Le 15/12/2022 à 17:36, Arnd Bergmann a écrit :
From: Arnd Bergmann
The activity_monitor_external[] array is too big to fit on the
kernel stack, resulting in this warning with clang:
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_7_ppt.c:1438:12: error:
stack frame size (1040) exceeds
Am Dienstag, dem 29.11.2022 um 19:17 + schrieb Paul Cercueil:
> Use the RUNTIME_PM_OPS() and pm_ptr() macros to handle the
> .runtime_suspend/.runtime_resume callbacks.
>
> These macros allow the suspend and resume functions to be automatically
> dropped by the compiler when CONFIG_PM is disab
Hello Linus
On Thu, Dec 15, 2022 at 9:42 AM Linus Walleij wrote:
>
> Hi Christophe,
>
> thanks for your patch!
>
> On Wed, Dec 14, 2022 at 12:01 PM Christophe Branchereau
> wrote:
>
> > Add the orisetech ota5601a ic driver
> >
> > For now it only supports the focaltech gpt3 3" 640x480 ips panel
HW allows arbitrary PL1 limits to be set but silently clamps these values
to "typical but not guaranteed" min/max values in pkg_power_sku
register. Follow the same pattern for sysfs, allow arbitrary PL1 limits to
be set but display clamped values when read, so that users see PL1 limits
HW is likely
From: Chris Morgan
Add helper function to find DSI host for devices where DSI panel is not
a minor of a DSI bus (such as the Samsung AMS495QA01 panel or the
official Raspberry Pi touchscreen display).
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
Reviewed-by: Linus Walleij
---
d
From: Chris Morgan
Support Magnachip D53E6EA8966 based panels such as the Samsung
AMS495QA01 panel as found on the Anbernic RG503. Note this driver
supports only the AMS495QA01 today which receives video signals via DSI,
however it receives commands via 3-wire SPI using DBI.
Signed-off-by: Chris
From: Chris Morgan
Add documentation for Samsung AMS495QA01 panel (with Magnachip
D53E6EA8966 controller IC).
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
---
.../display/panel/samsung,ams495qa01.yaml | 57 +++
1 file changed, 57 insertions(+)
create mode 10
From: Chris Morgan
Add Samsung AMS495QA01 panel to RG503.
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
---
.../dts/rockchip/rk3566-anbernic-rg503.dts| 55 +++
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dt
From: Chris Morgan
Add the Magnachip D53E6EA8966 panel IC controller for display panels
such as the Samsung AMS495QA01 panel as found on the Anbernic RG503.
This panel uses DSI to receive video signals, but 3-wire SPI to receive
command signals using DBI.
Changes since V5:
- Reverted dt binding
On Thu, 15 Dec 2022, Ashutosh Dixit wrote:
> HW allows arbitrary PL1 limits to be set but silently clamps these values
> to "typical but not guaranteed" min/max values in pkg_power_sku
> register. Follow the same pattern for sysfs, allow arbitrary PL1 limits to
> be set but display clamped values
Applied. Thanks!
Alex
On Thu, Dec 15, 2022 at 11:46 AM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> The .set_odm_combine callback pointer was added twice, causing
> a harmless -Wextra warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_optc.c:258:36: error:
> initialized f
On 15/12/2022 20:32, Kuogee Hsieh wrote:
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr st
Applied. Thanks!
Alex
On Thu, Dec 15, 2022 at 11:37 AM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> The activity_monitor_external[] array is too big to fit on the
> kernel stack, resulting in this warning with clang:
>
> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_7_ppt.c:1438:1
HW allows arbitrary PL1 limits to be set but silently clamps these values
to "typical but not guaranteed" min/max values in pkg_power_sku
register. Follow the same pattern for sysfs, allow arbitrary PL1 limits to
be set but display clamped values when read.
Signed-off-by: Ashutosh Dixit
---
driv
There are 3 possible interrupt sources are handled by DP controller,
HPDstatus, Controller state changes and Aux read/write transaction.
At every irq, DP controller have to check isr status of every interrupt
sources and service the interrupt if its isr status bits shows interrupts
are pending. The
The pull request you sent on Thu, 15 Dec 2022 08:34:00 +0100:
> http://git.kernel.org/pub/scm/linux/kernel/git/deller/linux-fbdev.git
> tags/fbdev-for-6.2-rc1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/9fa4abc9ad2a18410a7087e6cea15ad1ffb172c6
Thank you!
--
Deet
On 12/15/22 17:37, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> The dp_retrieve_lttpr_cap() return type changed from 'bool'
> to 'enum dc_status', so now the early 'return' uses the wrong
> type:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c: In function
> 'dp_retrieve_lttpr_
On 12/15/22 18:42, Michel Dänzer wrote:
> On 12/15/22 18:33, Alex Deucher wrote:
>> On Thu, Dec 15, 2022 at 4:17 AM Pekka Paalanen wrote:
>>>
>>> On Wed, 14 Dec 2022 10:46:55 -0500
>>> Alex Deucher wrote:
>>>
On Wed, Dec 14, 2022 at 4:01 AM Pekka Paalanen wrote:
>
> On Tue, 13 Dec 2
On 12/15/22 18:33, Alex Deucher wrote:
> On Thu, Dec 15, 2022 at 4:17 AM Pekka Paalanen wrote:
>>
>> On Wed, 14 Dec 2022 10:46:55 -0500
>> Alex Deucher wrote:
>>
>>> On Wed, Dec 14, 2022 at 4:01 AM Pekka Paalanen wrote:
On Tue, 13 Dec 2022 18:20:59 +0100
Michel Dänzer wrote:
On Thu, Dec 15, 2022 at 4:17 AM Pekka Paalanen wrote:
>
> On Wed, 14 Dec 2022 10:46:55 -0500
> Alex Deucher wrote:
>
> > On Wed, Dec 14, 2022 at 4:01 AM Pekka Paalanen wrote:
> > >
> > > On Tue, 13 Dec 2022 18:20:59 +0100
> > > Michel Dänzer wrote:
> > >
> > > > On 12/12/22 19:21, Harry Wentlan
On Thu, Dec 15, 2022 at 4:07 AM Michel Dänzer
wrote:
>
> On 12/14/22 16:46, Alex Deucher wrote:
> > On Wed, Dec 14, 2022 at 4:01 AM Pekka Paalanen wrote:
> >> On Tue, 13 Dec 2022 18:20:59 +0100
> >> Michel Dänzer wrote:
> >>> On 12/12/22 19:21, Harry Wentland wrote:
> This will let us pass
On 12/14/2022 6:59 PM, Abhinav Kumar wrote:
Hi Stephen
On 12/14/2022 4:29 PM, Stephen Boyd wrote:
Quoting Doug Anderson (2022-12-14 16:14:42)
Hi,
On Wed, Dec 14, 2022 at 3:46 PM Abhinav Kumar
wrote:
Hi Doug
On 12/14/2022 2:29 PM, Doug Anderson wrote:
Hi,
On Wed, Dec 14, 2022 at 1:21
The detected status of a connector should be ignored when a connector is
forced as hinted in the commit d50ba256b5f1 ("drm/kms: start
adding command line interface using fb."). One negative side effect of
not ignoring this is observed on the RCar3 SoCs which use the dw-hdmi
driver. It continues exe
On 12/14/2022 4:38 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-12-14 14:56:23)
On 12/13/2022 3:06 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-12-13 13:44:05)
Add both data-lanes and link-frequencies property into endpoint
Why do we care? Please tell us why it's important.
Any
From: Arnd Bergmann
The dsi_irq_stats structure is a little too big to fit on the
stack of a 32-bit task, depending on the specific gcc options:
fbdev/omap2/omapfb/dss/dsi.c: In function 'dsi_dump_dsidev_irqs':
fbdev/omap2/omapfb/dss/dsi.c:1621:1: error: the frame size of 1064 bytes is
larger t
From: Arnd Bergmann
The .set_odm_combine callback pointer was added twice, causing
a harmless -Wextra warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_optc.c:258:36: error:
initialized field overwritten [-Werror=override-init]
258 | .set_odm_combine = optc314_se
From: Arnd Bergmann
The dp_retrieve_lttpr_cap() return type changed from 'bool'
to 'enum dc_status', so now the early 'return' uses the wrong
type:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c: In function
'dp_retrieve_lttpr_cap':
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_l
From: Arnd Bergmann
The activity_monitor_external[] array is too big to fit on the
kernel stack, resulting in this warning with clang:
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_7_ppt.c:1438:12: error:
stack frame size (1040) exceeds limit (1024) in
'smu_v13_0_7_get_power_profile_m
From: Arnd Bergmann
The check_reserve_boundaries function uses a lot of kernel stack,
and it gets inlined by clang, which makes __drm_test_mm_reserve
use even more of it, to the point of hitting the warning limit:
drivers/gpu/drm/tests/drm_mm_test.c:344:12: error: stack frame size (1048)
exceed
On Thu, Dec 15, 2022 at 08:44:56AM -0600, Chris Morgan wrote:
> On Thu, Dec 15, 2022 at 09:47:19AM +0100, Linus Walleij wrote:
> > On Wed, Dec 14, 2022 at 7:06 PM Chris Morgan wrote:
> >
> > > From: Chris Morgan
> > >
> > > Add documentation for Magnachip D53E6EA8966 based panels such as the
> >
When a device has multiple power domains, dev->power_domain is left
empty during probe. That didn't cause any issue so far because we are
freeloading on smmu driver's vote on cx gdsc. Instead of that, create
a device_link between cx genpd device and gmu device to keep a vote from
gpu driver.
Befor
As per the recommended recovery sequence of adreno gpu, cx gdsc should
collapse at hardware before it is turned back ON. This helps to clear
out the stale states in hardware before it is reinitialized. Use the
genpd notifier along with the newly introduced
dev_pm_genpd_synced_poweroff() api to ensu
Remove the unused 'reset' interface which was supposed to help to ensure
that cx gdsc has collapsed during gpu recovery. This is was not enabled
so far due to missing gpucc driver support. Similar functionality using
genpd framework will be implemented in the upcoming patch.
Signed-off-by: Akhil P
Add support for the newly added 'synced_poweroff' genpd flag. This allows
some clients (like adreno gpu driver) to request gdsc driver to ensure
a votable gdsc (like gpucc cx gdsc) has collapsed at hardware.
Signed-off-by: Akhil P Oommen
---
drivers/clk/qcom/gdsc.c | 11 ++-
1 file chan
From: Ulf Hansson
Some genpd providers doesn't ensure that it has turned off at hardware.
This is fine until the consumer really requires during some special
scenarios that the power domain collapse at hardware before it is
turned ON again.
An example is the reset sequence of Adreno GPU which re
s rebased on top of linux-next (20221215) since the changes span
multiple drivers.
[1] https://patchwork.freedesktop.org/series/107507/
Akhil P Oommen (4):
clk: qcom: gdsc: Support 'synced_poweroff' genpd flag
drm/msm/a6xx: Vote for cx gdsc from gpu driver
drm/msm/a6xx: Remove cx g
On Thu, Dec 15, 2022 at 09:47:19AM +0100, Linus Walleij wrote:
> On Wed, Dec 14, 2022 at 7:06 PM Chris Morgan wrote:
>
> > From: Chris Morgan
> >
> > Add documentation for Magnachip D53E6EA8966 based panels such as the
> > Samsung AMS495QA01 panel.
> >
> > Signed-off-by: Chris Morgan
> > Signed
Am 25.11.22 um 11:21 schrieb Christian König:
TTM is just wrapping core DMA functionality here, remove the mid-layer.
No functional change.
Any objections to this guys?
I'm basically just following a suggestion from Daniel here and it
already triggered a discussion about the timeout for i915.
On Thu, 3 Nov 2022 17:12:41 +0800, allen wrote:
> This series let driver can read properties from dt to restrict dp output
> bandwidth.
>
> Changes in v3:
> -Rename property name.
>
> Changes in v4:
> -Use data-lanes and link-frequencies instead of
> "ite,dp-output-data-lane-count" and "ite,dp-o
Hi Zhi,
Thanks for your reply and suggestion about fix. I am a little bit busy now.
I will review the code as soon as possible. Also thanks
Joonas for the reminding. We'll try to think out the new fix.
Best regards,
Zheng Wang
Add the check for the return value of dma_alloc_coherent in order to
avoid NULL pointer dereference.
This flaw was found using an experimental static analysis tool we are
developing, APP-Miner, which has not been disclosed.
The allyesconfig build using GCC 9.3.0 shows no new warning. As we
don't
On Wed, Dec 14, 2022 at 12:59:21PM +0100, Uwe Kleine-König wrote:
> From: Marian Cichy
>
> Add support for the LCD Controller found on i.MX21 and i.MX25.
>
> It targets to be a drop in replacement for the imx-fb driver.
>
> Signed-off-by: Marian Cichy
> [ukl: Rebase to v6.1, various smaller fi
On 2022-12-15 06:53, Robin Murphy wrote:
> On 2022-12-15 11:40, Luben Tuikov wrote:
>> On 2022-12-15 06:27, Christian König wrote:
>>> Am 15.12.22 um 11:19 schrieb Luben Tuikov:
On 2022-12-15 04:46, Christian König wrote:
> Am 15.12.22 um 10:08 schrieb Luben Tuikov:
>> On 2022-12-15 03
On 2022-12-15 11:40, Luben Tuikov wrote:
On 2022-12-15 06:27, Christian König wrote:
Am 15.12.22 um 11:19 schrieb Luben Tuikov:
On 2022-12-15 04:46, Christian König wrote:
Am 15.12.22 um 10:08 schrieb Luben Tuikov:
On 2022-12-15 03:07, Christian König wrote:
Am 15.12.22 um 00:08 schrieb Robi
On 2022-12-15 06:27, Christian König wrote:
> Am 15.12.22 um 11:19 schrieb Luben Tuikov:
>> On 2022-12-15 04:46, Christian König wrote:
>>> Am 15.12.22 um 10:08 schrieb Luben Tuikov:
On 2022-12-15 03:07, Christian König wrote:
> Am 15.12.22 um 00:08 schrieb Robin Murphy:
>> On 2022-12-
On Thu, 15 Dec 2022 at 10:23, Frieder Schrempf
wrote:
>
> On 14.12.22 13:59, Jagan Teki wrote:
> > From: Marek Vasut
> >
> > Add extras to support i.MX8M Plus. The main change is the removal of
> > HS/VS/DE signal inversion in the LCDIFv3-DSIM glue logic, otherwise
> > the implementation of this
On Thu, 15 Dec 2022 at 10:22, Frieder Schrempf
wrote:
>
> On 14.12.22 13:59, Jagan Teki wrote:
> > Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC.
> >
> > Add compatible and associated driver_data for it.
> >
> > Reviewed-by: Laurent Pinchart
> > Signed-off-by: Marek Szyprowsk
On Wed, 14 Dec 2022 at 14:01, Paul Cercueil wrote:
>
> Add support for the IT6610 HDMI encoder.
>
> The hardware is very similar, and therefore the driver did not require
> too many changes. Some bits are only available on the IT66121, and
> vice-versa. Also, the IT6610 requires specific polaritie
On 12/15/2022 12:47 PM, Joonas Lahtinen wrote:
> (+ Tvrtko as FYI)
>
> Zhenyu, can you take a look at the patch ASAP.
>
> Regards, Joonas
Thanks so much for the reminding and patch.
Actually I don't think it is proper fix as:
split_2MB_gtt_entry() is going to allocate a new spt structure, which
Am 15.12.22 um 11:19 schrieb Luben Tuikov:
On 2022-12-15 04:46, Christian König wrote:
Am 15.12.22 um 10:08 schrieb Luben Tuikov:
On 2022-12-15 03:07, Christian König wrote:
Am 15.12.22 um 00:08 schrieb Robin Murphy:
On 2022-12-14 22:02, Alex Deucher wrote:
On Wed, Dec 14, 2022 at 4:54 PM Ro
On Wed, 14 Dec 2022 at 14:01, Paul Cercueil wrote:
>
> This will make it easier later to introduce support for new chips in
> this driver.
>
> Signed-off-by: Paul Cercueil
> ---
> drivers/gpu/drm/bridge/ite-it66121.c | 27 +++
> 1 file changed, 15 insertions(+), 12 deleti
On Wed, 14 Dec 2022 at 13:59, Paul Cercueil wrote:
>
> The DDC preamble and target address only need to be set once before
> reading the EDID, even if multiple segments have to be read.
>
> Signed-off-by: Paul Cercueil
> ---
> drivers/gpu/drm/bridge/ite-it66121.c | 28 ---
On Wed, 14 Dec 2022 at 13:59, Paul Cercueil wrote:
>
> The DDC FIFO was cleared before the loop in it66121_get_edid_block(),
> and at the beginning of each iteration; which means that it did not have
> to be cleared before the loop.
>
> Signed-off-by: Paul Cercueil
> ---
> drivers/gpu/drm/bridge
On Wed, 14 Dec 2022 at 13:59, Paul Cercueil wrote:
>
> The DDC error IRQs will fire on the IT6610 every time the FIFO is empty,
> which is not very helpful. To resolve this, we can simply disable them,
> and handle DDC errors in it66121_wait_ddc_ready().
>
> Signed-off-by: Paul Cercueil
> ---
>
On Wed, 14 Dec 2022 at 13:59, Paul Cercueil wrote:
>
> The function it66121_wait_ddc_ready() would previously read the status
> register until "true", which means it never actually polled anything and
> would just read the register once.
>
> Now, it will properly wait until the DDC hardware is rea
On Wed, 14 Dec 2022 at 13:58, Paul Cercueil wrote:
>
> Since all AVI infoframe registers are contiguous in the address space,
> the AVI infoframe can be written in one go with regmap_bulk_write().
>
> Signed-off-by: Paul Cercueil
> ---
> drivers/gpu/drm/bridge/ite-it66121.c | 27 +++-
On Wed, 14 Dec 2022 at 13:58, Paul Cercueil wrote:
>
> Use regmap_noinc_read() instead of reading the data from the DDC FIFO one
> byte at a time.
>
> Signed-off-by: Paul Cercueil
> ---
> drivers/gpu/drm/bridge/ite-it66121.c | 13 ++---
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
On Wed, 14 Dec 2022 at 13:58, Paul Cercueil wrote:
>
> Simplify the code of the driver by using
> devm_regulator_bulk_get_enable(), which will handle powering up the
> regulators, and disabling them on probe error or module removal.
>
> Signed-off-by: Paul Cercueil
> ---
> drivers/gpu/drm/bridge
On Wed, 14 Dec 2022 at 13:58, Paul Cercueil wrote:
>
> Add a new ite,it6610 compatible string to the IT66121 binding
> documentation, since the two chips are very similar.
>
> Signed-off-by: Paul Cercueil
> ---
> .../devicetree/bindings/display/bridge/ite,it66121.yaml | 4 +++-
> 1 file ch
On Wed, Oct 05, 2022 at 01:51:43PM +0300, Jani Nikula wrote:
> Add new function drm_connector_list_iter_filter_begin() to initialize
> connector list iterator with a filter function. Subsequent iteration on
> the list will only return connectors on which the filter function
> returns true.
>
> Cc:
(+ Tvrtko as FYI)
Zhenyu, can you take a look at the patch ASAP.
Regards, Joonas
Quoting Dave Airlie (2022-10-27 08:12:31)
> On Thu, 27 Oct 2022 at 13:26, Zheng Hacker wrote:
> >
> > Dave Airlie 于2022年10月27日周四 08:01写道:
> > >
> > > On Fri, 7 Oct 2022 at 11:38, Zheng Wang wrote:
> > > >
> > > >
On Tue, 15 Nov 2022 19:27:20 +0800, Pin-yen Lin wrote:
> Add caching when EDID is read, and invalidate the cache until the
> bridge detects HPD low or sink count changes on HPD_IRQ.
>
> It takes 1.2s for IT6505 bridge to read a 3-block EDID, and skipping
> one EDID read would be a notable differen
Hi Chris,
looks good to me, just very minor nitpicks:
On Wed, Dec 14, 2022 at 7:06 PM Chris Morgan wrote:
>
> From: Chris Morgan
>
> Support Magnachip D53E6EA8966 based panels such as the Samsung
> AMS495QA01 panel as found on the Anbernic RG503. Note this driver
> supports only the AMS495QA01
On Wed, Dec 14, 2022 at 7:06 PM Chris Morgan wrote:
> From: Chris Morgan
>
> Add helper function to find DSI host for devices where DSI panel is not
> a minor of a DSI bus (such as the Samsung AMS495QA01 panel or the
> official Raspberry Pi touchscreen display).
>
> Signed-off-by: Chris Morgan
On Thu, 15 Dec 2022 at 09:36, Pin-yen Lin wrote:
>
> Hi Robert,
>
> Thanks for the review.
>
> I didn't see this patch on drm-misc-next, but my another patch merged
> instead:
> https://cgit.freedesktop.org/drm/drm-misc/commit/?id=5eb9a4314053bda7642643f70f49a2b415920812
>
> Did something go wron
On Wed, 14 Dec 2022 at 04:30, Pin-yen Lin wrote:
>
> Hi all,
>
> Friendly ping on this patch.
>
> Regards,
> Pin-yen
>
> On Wed, Nov 9, 2022 at 5:52 PM Pin-yen Lin wrote:
> >
> > Add a pair of pm_runtime_get_if_in_use and pm_runtime_put_sync in the
> > interrupt handler to make sure the bridge wo
On Tue, 13 Dec 2022 16:03:04 +0100, Robert Foss wrote:
> This fixes PLL being unable to lock, and is derived from an equivalent
> downstream commit.
>
> Available LT9611 documentation does not list this register, neither does
> LT9611UXC (which is a different chip).
>
> This commit has been confi
On 2022-12-15 04:46, Christian König wrote:
> Am 15.12.22 um 10:08 schrieb Luben Tuikov:
>> On 2022-12-15 03:07, Christian König wrote:
>>> Am 15.12.22 um 00:08 schrieb Robin Murphy:
On 2022-12-14 22:02, Alex Deucher wrote:
> On Wed, Dec 14, 2022 at 4:54 PM Robin Murphy
> wrote:
>
Am 15.12.22 um 10:08 schrieb Luben Tuikov:
On 2022-12-15 03:07, Christian König wrote:
Am 15.12.22 um 00:08 schrieb Robin Murphy:
On 2022-12-14 22:02, Alex Deucher wrote:
On Wed, Dec 14, 2022 at 4:54 PM Robin Murphy
wrote:
On 2022-12-12 02:08, Luben Tuikov wrote:
Fix screen corruption on ol
1 - 100 of 121 matches
Mail list logo