On 9/29/22 22:42, Laurent Pinchart wrote:
Hello,
This small patch series improves YUV support in the i.MX8MP LCDIF
driver. After patches 1/4 and 2/4 that fix tiny cosmetic issues, patch
3/4 fixes YUV quantization range for the RGB to YUV conversion. Patch
4/4 addresses the other direction and ad
Hello,
On Fri, Oct 14, 2022 at 03:08:49PM +0100, Dave Stevenson wrote:
> On Thu, 13 Oct 2022 at 13:58, Francesco Dolcini wrote:
> > On Tue, Jun 28, 2022 at 08:18:36PM +0200, Max Krummenacher wrote:
> > > From: Max Krummenacher
> > >
> > > The property is used to set the enum bus_format and infer
The TC358767/TC358867/TC9595 are capable of DSI burst mode, which
is more energy efficient than the non-burst modes. Make use of it.
The TC358767/TC358867/TC9595 are capable of DSI non-continuous clock,
since it sources the internal PLL clock from external clock source.
The DSI non-continuous cloc
The current CLRSIPO count is still marginal and does not work with high
DSI clock rates in burst mode. Increase it further to allow the DSI link
to work at up to 1Gbps lane speed. This returns the counts to defaults
as provided by datasheet.
Fixes: ea6490b02240b ("drm/bridge: tc358767: increase CL
Add extras to support i.MX8M Plus. The main change is the removal of
HS/VS/DE signal inversion in the LCDIFv3-DSIM glue logic, otherwise
the implementation of this IP in i.MX8M Plus is very much compatible
with the i.MX8M Mini/Nano one.
Signed-off-by: Marek Vasut
---
Cc: Adam Ford
Cc: Andrzej Ha
On 10/5/22 17:13, Jagan Teki wrote:
Samsung MIPI DSIM bridge can also be found in i.MX8MM SoC.
Add dt-bingings for it.
v7, v6, v5, v4:
* none
v3:
* collect Rob Acked-by
v2:
* updated comments
v1:
* new patch
Acked-by: Rob Herring
Signed-off-by: Jagan Teki
---
Documentation/devicetree/bi
On 10/5/22 17:13, Jagan Teki wrote:
[...]
@@ -1321,6 +1322,32 @@ static void samsung_dsim_atomic_post_disable(struct
drm_bridge *bridge,
pm_runtime_put_sync(dsi->dev);
}
+#define MAX_INPUT_SEL_FORMATS 1
+
+static u32 *
+samsung_dsim_atomic_get_input_bus_fmts(struct drm_bridge *br
On 10/5/22 17:13, Jagan Teki wrote:
Look like PLL PMS_P offset value varies between platforms that have
Samsung DSIM IP.
However, there is no clear evidence for it as both Exynos and i.MX
8M Mini Application Processor Reference Manual is still referring
the PMS_P offset as 13.
The offset 13 is
On 10/5/22 17:13, Jagan Teki wrote:
In i.MX8M Mini/Nano SoC the DSI Phy requires a MIPI DPHY bit
8M Plus too.
to reset in order to activate the PHY and that can be done via
upstream i.MX8M blk-ctrl driver.
So, mark the phy get as optional.
Reviewed-by: Marek Vasut
On 10/5/22 17:13, Jagan Teki wrote:
The child devices in MIPI DSI can be binding with OF-graph
and also via child nodes.
The OF-graph interface represents the child devices via
remote and associated endpoint numbers like
dsi {
compatible = "fsl,imx8mm-mipi-dsim";
ports {
port@0
On 10/5/22 17:13, Jagan Teki wrote:
Samsung MIPI DSIM controller is common DSI IP that can be used in various
SoCs like Exynos, i.MX8M Mini/Nano.
In order to access this DSI controller between various platform SoCs,
the ideal way to incorporate this in the drm stack is via the drm bridge
driver.
On 10/5/22 17:13, Jagan Teki wrote:
[...]
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c
b/drivers/gpu/drm/bridge/samsung-dsim.c
index f714e49c1eab..f5cd80641cea 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1601,6 +1601,10 @@ static con
On 10/5/22 17:13, Jagan Teki wrote:
[...]
+static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = {
+ .reg_ofs = exynos5433_reg_ofs,
+ .plltmr_reg = 0xa0,
+ .has_clklane_stop = 1,
+ .num_clks = 2,
+ .max_freq = 2100,
+ .wait_for_reset = 0,
+
On 10/5/22 17:13, Jagan Teki wrote:
Look like an explicit fixing up of mode_flags is required for DSIM IP
present in i.MX8M Mini/Nano SoCs.
At least the LCDIF + DSIM needs active low sync polarities in order
to correlate the correct sync flags of the surrounding components in
the chain to make s
Hello,
On Fri, Oct 14, 2022 at 03:28:31AM +, allen.c...@ite.com.tw wrote:
> On Friday, October 14, 2022 3:20 AM, Rob Herring wrote:
> > On Thu, Oct 13, 2022 at 02:05:45PM +0300, Laurent Pinchart wrote:
> > > On Thu, Oct 13, 2022 at 06:51:13PM +0800, allen wrote:
> > > > From: allen chen
> > >
Hi Yuan,
Thank you for the patch.
On Fri, Oct 14, 2022 at 02:48:10AM +, Yuan Can wrote:
> After commit 64ff18911878, struct csc_coef_rgb2yuv is not used any more
> and can be removed as well.
>
> Fixes: 64ff18911878 ("drm/omap: Enable COLOR_ENCODING and COLOR_RANGE
> properties for planes")
On Sat, Oct 15, 2022 at 08:26:48PM +0300, Laurent Pinchart wrote:
> Hi Maxime and Joerg,
>
> Thank you for the patch.
>
> On Thu, Oct 13, 2022 at 11:56:49AM +0200, Maxime Ripard wrote:
> > From: Joerg Quinten
> >
> > The VC4 DPI output can support multiple BGR666 variants, but they were
> > nev
Hi Maxime and Chris,
Thank you for the patch.
On Thu, Oct 13, 2022 at 11:56:48AM +0200, Maxime Ripard wrote:
> From: Chris Morgan
>
> The RGB565 format with padding over 24 bits
> (MEDIA_BUS_FMT_RGB565_1X24_CPADHI) is supported by the vc4 DPI
> controller as "mode 3". This is what the Geekworm
Hi Maxime and Joerg,
Thank you for the patch.
On Thu, Oct 13, 2022 at 11:56:49AM +0200, Maxime Ripard wrote:
> From: Joerg Quinten
>
> The VC4 DPI output can support multiple BGR666 variants, but they were
> never added to the driver. Let's add the the support for those formats.
>
> Signed-off
Hi Maxime and Dave,
Thank you for the patch.
On Thu, Oct 13, 2022 at 11:56:51AM +0200, Maxime Ripard wrote:
> From: Dave Stevenson
>
> The mapping is incorrect for RGB565_1X16 as it should be
> DPI_FORMAT_18BIT_666_RGB_1 instead of DPI_FORMAT_18BIT_666_RGB_3.
The driver includes the following
Hi Maxime (and Dave),
Thank you for the patch.
On Thu, Oct 13, 2022 at 11:56:50AM +0200, Maxime Ripard wrote:
> From: Dave Stevenson
>
> DPI hasn't really been used up until now, so the default has
> been meaningless.
> In theory we should be able to pass the desired format for the
> adjacent b
Hi Maxime,
Thank you for the patch.
On Thu, Oct 13, 2022 at 11:56:46AM +0200, Maxime Ripard wrote:
> From: Joerg Quinten
>
> Add the BGR666 format MEDIA_BUS_FMT_BGR666_1X18 supported by the
> RaspberryPi.
>
> Signed-off-by: Joerg Quinten
> Signed-off-by: Maxime Ripard
> ---
> include/uapi/l
Den 13.10.2022 15.18, skrev Maxime Ripard:
> drm_connector_pick_cmdline_mode() is in charge of finding a proper
> drm_display_mode from the definition we got in the video= command line
> argument.
>
> Let's add some unit tests to make sure we're not getting any regressions
> there.
>
> Signed-
On Fri, 14 Oct 2022 15:51:04 -0500
Rob Herring wrote:
> There's no reason to have "status" properties in examples. "okay" is the
> default, and "disabled" turns off some schema checks ('required'
> specifically).
>
> A meta-schema check for this is pending, so hopefully the last time to
> fix th
https://bugzilla.kernel.org/show_bug.cgi?id=214425
--- Comment #4 from Rafael Ristovski (rafael.ristov...@gmail.com) ---
For what its worth, the following horrible incantation managed to release 2+GB
of TTM buffers on one of my machines, after I purposefully ran a VRAM intensive
game:
> for i in {
Hi Laurent,
> Subject: Re: [PATCH v8 0/3] Add RZ/G2L DSI driver
>
> Hi Biju,
>
> On Sat, Oct 15, 2022 at 01:11:20PM +, Biju Das wrote:
> > Gentle ping.
>
> I've reviewed v8, everything looks fine. I've applied the patches to
> my tree ([1]) for v6.2.
Thanks,
Biju
>
> [1] git://linuxtv.or
Hi Biju,
On Sat, Oct 15, 2022 at 01:11:20PM +, Biju Das wrote:
> Gentle ping.
I've reviewed v8, everything looks fine. I've applied the patches to my
tree ([1]) for v6.2.
[1] git://linuxtv.org/pinchartl/media.git drm/du/next
> > Subject: [PATCH v8 0/3] Add RZ/G2L DSI driver
> >
> > This pa
Hi Biju,
Thank you for the patch.
On Tue, Sep 20, 2022 at 11:55:01AM +0100, Biju Das wrote:
> Enhance device lanes check by reading TXSETR register at probe(),
> and enforced in rzg2l_mipi_dsi_host_attach().
>
> As per HW manual, we can read TXSETR register only after
> DPHY initialization.
>
>
On 14/10/2022 16:51, Rob Herring wrote:
> There's no reason to have "status" properties in examples. "okay" is the
> default, and "disabled" turns off some schema checks ('required'
> specifically).
>
> A meta-schema check for this is pending, so hopefully the last time to
> fix these.
>
> Fix th
Den 13.10.2022 15.18, skrev Maxime Ripard:
> As the number of kunit tests in KMS grows further, we start to have
> multiple test suites that, for example, need to register a mock DRM
> driver to interact with the KMS function they are supposed to test.
>
> Let's add a file meant to provide thos
https://bugzilla.kernel.org/show_bug.cgi?id=214425
--- Comment #3 from Rafael Ristovski (rafael.ristov...@gmail.com) ---
(In reply to Martin Doucha from comment #2)
> (In reply to Rafael Ristovski from comment #1)
> > According to amdgpu devs, this is a feature where the allocated pages are
> > ke
Den 13.10.2022 10.36, skrev Maxime Ripard:
> Hi Noralf,
>
> On Sat, Oct 01, 2022 at 02:52:06PM +0200, Noralf Trønnes wrote:
>> Den 29.09.2022 18.31, skrev Maxime Ripard:
>>> Multiple drivers (meson, vc4, sun4i) define analog TV 525-lines and
>>> 625-lines modes in their drivers.
>>>
>>> Since t
https://bugzilla.kernel.org/show_bug.cgi?id=214425
--- Comment #2 from Martin Doucha (dou...@swarmtech.cz) ---
(In reply to Rafael Ristovski from comment #1)
> According to amdgpu devs, this is a feature where the allocated pages are
> kept around in case they are needed later on. TTM is able to r
https://bugzilla.kernel.org/show_bug.cgi?id=214425
Rafael Ristovski (rafael.ristov...@gmail.com) changed:
What|Removed |Added
CC||rafael.ris
Gentle ping.
Cheers,
Biju
> Subject: [PATCH v8 0/3] Add RZ/G2L DSI driver
>
> This patch series aims to support the MIPI DSI encoder found in the
> RZ/G2L SoC. It currently supports DSI video mode only.
>
> This unit supports MIPI Alliance Specification for Display Serial
> Interface (DSI) Spec
https://bugzilla.kernel.org/show_bug.cgi?id=216119
--- Comment #42 from Harald Judt (h.j...@gmx.at) ---
Created attachment 303004
--> https://bugzilla.kernel.org/attachment.cgi?id=303004&action=edit
dmesg.out
Here is a new dmesg with linux-stable-5.19.11 and amdgpu.dc=0.
There are a couple mor
Dne petek, 14. oktober 2022 ob 09:38:10 CEST je Maxime Ripard napisal(a):
> Hi Jernej,
>
> On Thu, Oct 13, 2022 at 08:23:51PM +0200, Jernej Škrabec wrote:
> > Dne četrtek, 13. oktober 2022 ob 15:19:06 CEST je Maxime Ripard
napisal(a):
> > > Now that the core can deal fine with analog TV modes, le
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