From: Lee Jones
commit e79a2398e1b2d47060474dca291542368183bc0f upstream.
This ensures userspace cannot prematurely clean-up the client before
it is fully initialised which has been proven to cause issues in the
past.
Cc: Felix Kuehling
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui
From: Karol Herbst
commit 38d4e5cf5b08798f093374e53c2f4609d5382dd5 upstream.
Fixes a crash booting on those platforms with nouveau.
Fixes: 4cdd2450bf73 ("drm/nouveau/pmu/gm200-: use alternate falcon reset
sequence")
Cc: Ben Skeggs
Cc: Karol Herbst
Cc: dri-devel@lists.freedesktop.org
Cc: nouv
[Cc: +dri-devel@lists.freedesktop.org, +Daniel Vetter, +Alexander
Deucher, +Greg KH]
Dear Alex,
I am a little confused and upset about how Display Core patches are
handled in the Linux kernel.
Am 25.03.22 um 23:53 schrieb Alex Hung:
From: Martin Leung
git puts a line “This reverts com
From: Thomas Zimmermann
commit 0f525289ff0ddeb380813bd81e0f9bdaaa1c9078 upstream.
OF framebuffers do not have an underlying device in the Linux
device hierarchy. Do a regular unregister call instead of hot
unplugging such a non-existing device. Fixes a NULL dereference.
An example error message
From: Karol Herbst
commit 38d4e5cf5b08798f093374e53c2f4609d5382dd5 upstream.
Fixes a crash booting on those platforms with nouveau.
Fixes: 4cdd2450bf73 ("drm/nouveau/pmu/gm200-: use alternate falcon reset
sequence")
Cc: Ben Skeggs
Cc: Karol Herbst
Cc: dri-devel@lists.freedesktop.org
Cc: nouv
From: Lee Jones
commit e79a2398e1b2d47060474dca291542368183bc0f upstream.
This ensures userspace cannot prematurely clean-up the client before
it is fully initialised which has been proven to cause issues in the
past.
Cc: Felix Kuehling
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui
On 11 Apr 2022, at 13:50, Hans de Goede wrote:
> The problem is we already lack the manpower for a quirk database,
> and even if we ever get the manpower then it would still be good
> to avoid the work necessary to add models to the database where
> the kernel already knows how things work, see be
From: jpawar
Add support for pre_enable and post_enable drm bridge control functions.
Making sure that host to be prepared before panel is powered up,
for the panels like TC358762.
Signed-off-by: jpawar
---
drivers/gpu/drm/bridge/cdns-dsi.c | 26 ++
1 file changed, 26 i
On 4/11/22 14:58, Geert Uytterhoeven wrote:
> As of commit 0fe66f327c464943 ("fbdev/sh_mobile: remove
> sh_mobile_lcdc_display_notify"), there is no longer a need for a foward
> declaration of sh_mobile_lcdc_check_var().
>
> Signed-off-by: Geert Uytterhoeven
applied.
Thanks!
Helge
> ---
> driv
Ping. :)
On 4/8/22 2:07 PM, Zhi Wang wrote:
> Hi Jani:
>
> Thanks so much for the help. Can you generate a new tag on drm-intel-next? I
> noticed that there was one patch moving the DMC related registers into
> display/intel_dmc_regs.h, which is not included in the latest tag on
> drm-intel-ne
> From: Saurabh Sengar
> Sent: Monday, April 11, 2022 9:29 PM
> ...
> Add error message when the size of requested framebuffer is more than
> the allocated size by vmbus mmio region for framebuffer
The line lacks a period, but I guess the maintainer may help fix it for you :-)
> Signed-off-by:
Now that the PHY ops are separated, sort them topologically, with the
common sun8i_hdmi_phy_set_polarity helper at the top. No function
contents are changed in this commit.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 67 --
1 file changed,
Since the driver already needs to support multiple sets of ops, we can
drop the mid-layer used by the A83T and H3 PHYs. They share only a small
amount of code; factor this out as sun8i_hdmi_phy_set_polarity.
For clarity, this commit keeps the existing function order.
Signed-off-by: Samuel Holland
The D1 SoC comes with a new custom HDMI PHY, which does not share any
registers with the existing custom PHY. So it needs a new set of ops.
Instead of providing a flag in the variant structure, provide the ops
themselves.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
Now that the HDMI PHY is using a platform driver, it can use device-
managed resources. Use these, as well as the dev_err_probe helper, to
simplify the probe function and get rid of the remove function.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 100 -
The struct resource is not used for anything else, so we can simplify
the code a bit by using the helper function.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdm
Now that the HDMI PHY is using a platform driver, we can use the usual
helper function for getting the variant structure.
Signed-off-by: Samuel Holland
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 +-
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 11 ++-
2 files changed, 3 insertions(+),
This series prepares the sun8i HDMI PHY driver for supporting the new
custom PHY in the Allwinner D1 SoC. No functional change intended here.
This series was tested on D1 and H3.
Samuel Holland (6):
drm/sun4i: sun8i-hdmi-phy: Use of_device_get_match_data
drm/sun4i: sun8i-hdmi-phy: Use devm_p
Add error message when the size of requested framebuffer is more than
the allocated size by vmbus mmio region for framebuffer
Signed-off-by: Saurabh Sengar
---
v3 -> v4 :
* Shorter error message
* Alignment match for open parenthesis
* Added -> Add (typo fix in commit mess
Now that the various blocks in the D1 display engine pipeline are
supported, we can enable the overall engine.
Acked-by: Jernej Skrabec
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm
D1 has a TCON TOP, so its quirks are similar to those for the R40 TCONs.
While there are some register changes, the part of the TCON TV supported
by the driver matches the R40 quirks, so that quirks structure can be
reused. D1 has the first supported TCON LCD with a TCON TOP, so the TCON
LCD needs
D1 has a TCON TOP with TCON TV0 and DSI, but no TCON TV1. This puts the
DSI clock name at index 1 in clock-output-names. Support this by only
incrementing the index for clocks that are actually supported.
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/gpu/drm/sun4i/sun8i_tcon_
D1 has a display engine with the usual pair of mixers, albeit with
relatively few layers. In fact, D1 appears to be the first SoC to have
a mixer without any UI layers. Add support for these new variants.
Acked-by: Jernej Skrabec
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers
D1 changes the MMIO offsets for the CSC blocks in the first mixer. The
mixers' ccsc property is used as an index into the ccsc_base array. Use
an enumeration to describe this index, and add the new set of offsets.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Use an enumeration for the ccs
D1's mixer 1 has no UI layers, only a single VI layer. That means the
mixer can only be used if the primary plane comes from this VI layer.
Add the code to handle this case.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Use Jernej's patches for mixer mode setting.
drivers/gpu/drm/sun4i/s
From: Jernej Skrabec
Newly introduced mode_set callback in engine structure is a much better
place for setting mixer output size and interlace mode for the following
reasons:
1. Aforementioned properties change only when mode changes, so it's
enough to be set only once per mode set. Currently
From: Jernej Skrabec
Newly introduced mode_set callback in engine structure is a much better
place for setting backend output size and interlace mode for following
reasons:
1. Aforementioned properties change only when mode changes, so it's
enough to be set only once per mode set. Currently it
From: Jernej Skrabec
This optional callback is useful for setting properties which depends
only on current mode. Such properties are width, height and interlaced
output.
These properties are currently set in update layer callback for primary
plane which is less than ideal. More about that in fol
readsb/writesb are unavailable on some architectures. In preparation for
removing the Kconfig architecture dependency, switch to the equivalent
but more portable ioread/write8_rep helpers.
Reported-by: kernel test robot
Signed-off-by: Samuel Holland
---
Changes in v2:
- New patch: I/O helper p
Allwinner D1 is a RISC-V SoC which contains a DE 2.0 engine. Let's
remove the dependency on a specific CPU architecture, so the driver can
be built wherever ARCH_SUNXI is selected.
Acked-by: Jernej Skrabec
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/gpu/drm/sun4i/Kconfig |
commit b4bdc4fbf8d0 ("soc: sunxi: Deal with the MBUS DMA offsets in a
central place") added a platform device notifier that sets the DMA
offset for all of the display engine frontend and backend devices.
The code applying the offset to DMA buffer physical addresses was then
removed from the backen
Allwinner D1 contains a display engine 2.0. It features two mixers, a
TCON TOP (with DSI and HDMI), one TCON LCD, and one TCON TV.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Samuel Holland
---
(no changes since v1)
.../allwinner,sun4i-a10-display-engine.yaml | 1 +
.../display/allwinn
So far, the binding and driver have relied on the fact that the H6
clocks are both a prefix and a subset of the R40 clocks. This allows
them to share the clocks/clock-names items and the clock-output-names
order between the hardware variants.
However, the D1 hardware has TCON TV0 and DSI, but no T
This series adds binding and driver support for Display Engine 2.0
variant found in the Allwinner D1.
So far it has only been tested with HDMI. I will be sending the HDMI
support series separately, because the hardware comes with a brand new
custom HDMI PHY, which requires some refactoring to supp
Quoting Kuogee Hsieh (2022-04-08 14:04:54)
> There is possible circular locking dependency detected on event_mutex
> (see below logs). This is due to set fail safe mode is done at
> dp_panel_read_sink_caps() within event_mutex scope. To break this
> possible circular locking, this patch move settin
Quoting Abhinav Kumar (2022-04-11 17:29:17)
>
>
> On 4/11/2022 5:22 PM, Dmitry Baryshkov wrote:
> > On 12/04/2022 03:21, Stephen Boyd wrote:
> >> Quoting Kuogee Hsieh (2022-04-11 17:08:49)
> >>> - kthread_run(hpd_event_thread, dp_priv, "dp_hpd_handler");
> >>> + dp_priv->ev_tsk = kthrea
On Tue, Apr 12, 2022 at 10:01:20AM +0900, Inki Dae wrote:
> Hi Dan Carpenter.
>
> Same patch[1] was posted so I will pick it up.
>
> [1] https://www.spinics.net/lists/arm-kernel/msg967488.html
>
It's not the same. That one returns -EINVAL and mine returns
-EPROBE_DEFER. I obvoiously thought
On Mon, Apr 11, 2022 at 07:02:19PM +, Dexuan Cui wrote:
> > From: Saurabh Singh Sengar
> > Sent: Monday, April 11, 2022 12:56 AM
> > > >...
> > > > - if (fb->pitches[0] * fb->height > hv->fb_size)
> > > > + if (fb->pitches[0] * fb->height > hv->fb_size) {
> > > > + dr
On Tue-12-04-2022 08:37 am, Murthy, Arun R wrote:
+static int output_bpc_show(struct seq_file *m, void *data) {
Would it be better to have this function name as drm_output_bpc_show()
As we are using DEFINE_SHOW_ATTRIBUTE() to define file_operations, this
function name must be _show(). Otherw
Hi Dmitry,
I love your patch! Perhaps something to improve:
[auto build test WARNING on next-20220411]
[cannot apply to drm/drm-next v5.18-rc2 v5.18-rc1 v5.17 v5.18-rc2]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '-
From: Zack Rusin
Switch to using the TTM resource manager debugfs helpers. It's
exactly the same functionality but the debugfs code is shared with
other drivers.
The TTM resource managers need to stay valid for as long as the
drm debugfs_root is valid.
Signed-off-by: Zack Rusin
Cc: Alex Deuche
From: Zack Rusin
Switch to using the TTM resource manager debugfs helpers. The
functionality is largely the same.
The TTM resource managers need to stay valid for as long as the
drm debugfs_root is valid.
Signed-off-by: Zack Rusin
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc:
From: Zack Rusin
Use the newly added TTM's ability to automatically create debugfs entries
for specified placements. This creates debugfs files that can be read to
get information about various TTM resource managers which are used by
vmwgfx.
Signed-off-by: Zack Rusin
---
drivers/gpu/drm/vmwgfx
From: Zack Rusin
Switch to using the TTM resource manager debugfs helpers. The
functionality is largely the same.
The TTM resource managers need to stay valid for as long as the
drm debugfs_root is valid.
Signed-off-by: Zack Rusin
Cc: Dave Airlie
Cc: Gerd Hoffmann
Cc: Daniel Vetter
Cc: virtu
From: Zack Rusin
Drivers duplicate the code required to add debugfs entries for various
ttm resource managers. To fix it add common TTM resource manager debugfs
code that each driver can reuse.
Specific resource managers can overwrite
ttm_resource_manager_func::debug to get more information from
From: Zack Rusin
v2: Switch to using ttm_resource_manager's directly in the debugfs
callbacks
This series introduces generic TTM resource manager debugfs helpers and
refactors TTM drivers which have been using hand rolled out versions
of those to use the new code.
Zack Rusin (5):
drm/ttm: Add
> -Original Message-
> From: Intel-gfx On Behalf Of
> Bhanuprakash Modem
> Sent: Monday, April 11, 2022 3:21 PM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; amd-
> g...@lists.freedesktop.org; jani.nik...@linux.intel.com;
> ville.syrj...@linux.intel.com; harry.wen
> +static int output_bpc_show(struct seq_file *m, void *data) {
Would it be better to have this function name as drm_output_bpc_show()
Thanks and Regards,
Arun R Murthy
On 4/11/22 10:37 AM, Jernej Škrabec wrote:
> Dne ponedeljek, 11. april 2022 ob 06:34:15 CEST je Samuel Holland napisal(a):
>> commit b4bdc4fbf8d0 ("soc: sunxi: Deal with the MBUS DMA offsets in a
>> central place") added a platform device notifier that sets the DMA
>> offset for all of the display
Fix a copypasta error, which resulted in checking repeatedly if the
primary_composer->map[0] was null, instead of checking each
plane_composer while composing planes.
Signed-off-by: Tales Lelo da Aparecida
---
drivers/gpu/drm/vkms/vkms_composer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
Hello, I'm interested in collaborating with VKMS, please let me know if there's
anything that I could better.
Tales Lelo da Aparecida (1):
drm/vkms: check plane_composer->map[0] before using it
drivers/gpu/drm/vkms/vkms_composer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.35
Hi Sean,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on v5.18-rc2 next-20220411]
[cannot apply to drm/drm-next drm-intel/for-linux-next robh/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And
On Mon, Apr 11, 2022 at 3:27 AM Patrik Jakobsson
wrote:
>
> On Sun, Apr 10, 2022 at 10:05 PM James Hilliard
> wrote:
> >
> > On Sun, Apr 10, 2022 at 1:52 PM Patrik Jakobsson
> > wrote:
> > >
> > > On Sun, Apr 10, 2022 at 9:40 PM James Hilliard
> > > wrote:
> > > >
> > > > On Sun, Apr 10, 2022 a
Extracted from various sources such EMGD releases.
Signed-off-by: James Hilliard
---
drivers/gpu/drm/gma500/psb_intel_reg.h | 212 +
1 file changed, 107 insertions(+), 105 deletions(-)
diff --git a/drivers/gpu/drm/gma500/psb_intel_reg.h
b/drivers/gpu/drm/gma500/psb_inte
On 3/21/2022 2:14 PM, Lucas De Marchi wrote:
On Thu, Mar 03, 2022 at 11:30:10PM +0530, Balasubramani Vivekanandan
wrote:
memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
by the implementation in drm_cache.c.
Updated to use the functions provided by drm_cache.c.
v2: Chec
Hi Dan Carpenter.
Same patch[1] was posted so I will pick it up.
[1] https://www.spinics.net/lists/arm-kernel/msg967488.html
Thanks,
Inki Dae
22. 4. 8. 19:21에 Dan Carpenter 이(가) 쓴 글:
> The of_drm_find_bridge() does not return error pointers, it returns
> NULL on error.
>
> Fixes: dd8b6803bc49
From: Leo Ruan
[ Upstream commit 070a88fd4a03f921b73a2059e97d55faaa447dab ]
This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the
From: QintaoShen
[ Upstream commit ebbb7bb9e80305820dc2328a371c1b35679f2667 ]
As the kmalloc_array() may return null, the 'event_waiters[i].wait' would lead
to null-pointer dereference.
Therefore, it is better to check the return value of kmalloc_array() to avoid
this confusion.
Signed-off-by
From: Leo Ruan
[ Upstream commit 070a88fd4a03f921b73a2059e97d55faaa447dab ]
This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the
From: QintaoShen
[ Upstream commit ebbb7bb9e80305820dc2328a371c1b35679f2667 ]
As the kmalloc_array() may return null, the 'event_waiters[i].wait' would lead
to null-pointer dereference.
Therefore, it is better to check the return value of kmalloc_array() to avoid
this confusion.
Signed-off-by
From: Aurabindo Pillai
[ Upstream commit c5c948aa894a831f96fccd025e47186b1ee41615 ]
[Why&How] Add a dedicated AMDGPU specific ID for use with
newer ASICs that support USB-C output
Signed-off-by: Aurabindo Pillai
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Roman Li
[ Upstream commit f4346fb3edf7720db3f7f5e1cab1f667cd024280 ]
[Why]
On resume we do link detection for all non-MST connectors.
MST is handled separately. However the condition for telling
if connector is on mst branch is not enough for mst hub case.
Link detection for mst branch li
From: Leo Ruan
[ Upstream commit 070a88fd4a03f921b73a2059e97d55faaa447dab ]
This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the
From: QintaoShen
[ Upstream commit ebbb7bb9e80305820dc2328a371c1b35679f2667 ]
As the kmalloc_array() may return null, the 'event_waiters[i].wait' would lead
to null-pointer dereference.
Therefore, it is better to check the return value of kmalloc_array() to avoid
this confusion.
Signed-off-by
From: Aurabindo Pillai
[ Upstream commit c5c948aa894a831f96fccd025e47186b1ee41615 ]
[Why&How] Add a dedicated AMDGPU specific ID for use with
newer ASICs that support USB-C output
Signed-off-by: Aurabindo Pillai
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Roman Li
[ Upstream commit f4346fb3edf7720db3f7f5e1cab1f667cd024280 ]
[Why]
On resume we do link detection for all non-MST connectors.
MST is handled separately. However the condition for telling
if connector is on mst branch is not enough for mst hub case.
Link detection for mst branch li
From: Leo Ruan
[ Upstream commit 070a88fd4a03f921b73a2059e97d55faaa447dab ]
This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the
From: QintaoShen
[ Upstream commit ebbb7bb9e80305820dc2328a371c1b35679f2667 ]
As the kmalloc_array() may return null, the 'event_waiters[i].wait' would lead
to null-pointer dereference.
Therefore, it is better to check the return value of kmalloc_array() to avoid
this confusion.
Signed-off-by
From: Tushar Patel
[ Upstream commit b7dfbd2e601f3fee545bc158feceba4f340fe7cf ]
Compute-only GPUs have more than 8 VMIDs allocated to KFD. Fix
this by passing correct number of VMIDs to HWS
v2: squash in warning fix (Alex)
Signed-off-by: Tushar Patel
Reviewed-by: Felix Kuehling
Signed-off-by
From: "Leo (Hanghong) Ma"
[ Upstream commit c9fbf6435162ed5fb7201d1d4adf6585c6a8c327 ]
[Why & How]
The latest HDMI SPEC has updated the VTEM packet structure,
so change the VTEM Infopacket defined in the driver side to align
with the SPEC.
Reviewed-by: Chris Park
Acked-by: Alex Hung
Signed-of
From: Charlene Liu
[ Upstream commit 5e8a71cf13bc9184fee915b2220be71b4c6cac74 ]
[why]
for the case edid change only changed audio format.
driver still need to update stream.
Reviewed-by: Alvin Lee
Reviewed-by: Aric Cyr
Acked-by: Alex Hung
Signed-off-by: Charlene Liu
Tested-by: Daniel Wheele
From: Aurabindo Pillai
[ Upstream commit c5c948aa894a831f96fccd025e47186b1ee41615 ]
[Why&How] Add a dedicated AMDGPU specific ID for use with
newer ASICs that support USB-C output
Signed-off-by: Aurabindo Pillai
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Roman Li
[ Upstream commit f4346fb3edf7720db3f7f5e1cab1f667cd024280 ]
[Why]
On resume we do link detection for all non-MST connectors.
MST is handled separately. However the condition for telling
if connector is on mst branch is not enough for mst hub case.
Link detection for mst branch li
From: Martin Leung
[ Upstream commit b2075fce104b88b789c15ef1ed2b91dc94198e26 ]
why and how:
causes failure on install on certain machines
Reviewed-by: George Shen
Acked-by: Alex Hung
Signed-off-by: Martin Leung
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Lev
From: Leo Ruan
[ Upstream commit 070a88fd4a03f921b73a2059e97d55faaa447dab ]
This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the
From: QintaoShen
[ Upstream commit ebbb7bb9e80305820dc2328a371c1b35679f2667 ]
As the kmalloc_array() may return null, the 'event_waiters[i].wait' would lead
to null-pointer dereference.
Therefore, it is better to check the return value of kmalloc_array() to avoid
this confusion.
Signed-off-by
From: Tianci Yin
[ Upstream commit 6ea239adc2a712eb318f04f5c29b018ba65ea38a ]
Prior to disabling dpg, VCN need unpausing dpg mode, or VCN will hang in
S3 resuming.
Reviewed-by: James Zhu
Signed-off-by: Tianci Yin
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/am
From: Tushar Patel
[ Upstream commit b7dfbd2e601f3fee545bc158feceba4f340fe7cf ]
Compute-only GPUs have more than 8 VMIDs allocated to KFD. Fix
this by passing correct number of VMIDs to HWS
v2: squash in warning fix (Alex)
Signed-off-by: Tushar Patel
Reviewed-by: Felix Kuehling
Signed-off-by
From: "Leo (Hanghong) Ma"
[ Upstream commit c9fbf6435162ed5fb7201d1d4adf6585c6a8c327 ]
[Why & How]
The latest HDMI SPEC has updated the VTEM packet structure,
so change the VTEM Infopacket defined in the driver side to align
with the SPEC.
Reviewed-by: Chris Park
Acked-by: Alex Hung
Signed-of
From: Chiawen Huang
[ Upstream commit 7d56a154e22ffb3613fdebf83ec34d5225a22993 ]
[Why]
disable/enable leads FEC mismatch between hw/sw FEC state.
[How]
check FEC status to fastboot on/off.
Reviewed-by: Anthony Koo
Acked-by: Alex Hung
Signed-off-by: Chiawen Huang
Tested-by: Daniel Wheeler
S
From: Charlene Liu
[ Upstream commit 5e8a71cf13bc9184fee915b2220be71b4c6cac74 ]
[why]
for the case edid change only changed audio format.
driver still need to update stream.
Reviewed-by: Alvin Lee
Reviewed-by: Aric Cyr
Acked-by: Alex Hung
Signed-off-by: Charlene Liu
Tested-by: Daniel Wheele
From: Aurabindo Pillai
[ Upstream commit c5c948aa894a831f96fccd025e47186b1ee41615 ]
[Why&How] Add a dedicated AMDGPU specific ID for use with
newer ASICs that support USB-C output
Signed-off-by: Aurabindo Pillai
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Roman Li
[ Upstream commit f4346fb3edf7720db3f7f5e1cab1f667cd024280 ]
[Why]
On resume we do link detection for all non-MST connectors.
MST is handled separately. However the condition for telling
if connector is on mst branch is not enough for mst hub case.
Link detection for mst branch li
From: Martin Leung
[ Upstream commit b2075fce104b88b789c15ef1ed2b91dc94198e26 ]
why and how:
causes failure on install on certain machines
Reviewed-by: George Shen
Acked-by: Alex Hung
Signed-off-by: Martin Leung
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Lev
From: Roman Li
[ Upstream commit 58e16c752e9540b28a873c44c3bee83e022007c1 ]
[Why]
In init_hw() we call init_pipes() before enabling power gating.
init_pipes() tries to power gate dsc but it may fail because
required force-ons are not released yet.
As a result with dsc config the following errors
From: Leo Ruan
[ Upstream commit 070a88fd4a03f921b73a2059e97d55faaa447dab ]
This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the
From: QintaoShen
[ Upstream commit ebbb7bb9e80305820dc2328a371c1b35679f2667 ]
As the kmalloc_array() may return null, the 'event_waiters[i].wait' would lead
to null-pointer dereference.
Therefore, it is better to check the return value of kmalloc_array() to avoid
this confusion.
Signed-off-by
From: Tianci Yin
[ Upstream commit 6ea239adc2a712eb318f04f5c29b018ba65ea38a ]
Prior to disabling dpg, VCN need unpausing dpg mode, or VCN will hang in
S3 resuming.
Reviewed-by: James Zhu
Signed-off-by: Tianci Yin
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/am
From: Tushar Patel
[ Upstream commit b7dfbd2e601f3fee545bc158feceba4f340fe7cf ]
Compute-only GPUs have more than 8 VMIDs allocated to KFD. Fix
this by passing correct number of VMIDs to HWS
v2: squash in warning fix (Alex)
Signed-off-by: Tushar Patel
Reviewed-by: Felix Kuehling
Signed-off-by
From: "Leo (Hanghong) Ma"
[ Upstream commit c9fbf6435162ed5fb7201d1d4adf6585c6a8c327 ]
[Why & How]
The latest HDMI SPEC has updated the VTEM packet structure,
so change the VTEM Infopacket defined in the driver side to align
with the SPEC.
Reviewed-by: Chris Park
Acked-by: Alex Hung
Signed-of
From: Chiawen Huang
[ Upstream commit 7d56a154e22ffb3613fdebf83ec34d5225a22993 ]
[Why]
disable/enable leads FEC mismatch between hw/sw FEC state.
[How]
check FEC status to fastboot on/off.
Reviewed-by: Anthony Koo
Acked-by: Alex Hung
Signed-off-by: Chiawen Huang
Tested-by: Daniel Wheeler
S
From: Charlene Liu
[ Upstream commit 5e8a71cf13bc9184fee915b2220be71b4c6cac74 ]
[why]
for the case edid change only changed audio format.
driver still need to update stream.
Reviewed-by: Alvin Lee
Reviewed-by: Aric Cyr
Acked-by: Alex Hung
Signed-off-by: Charlene Liu
Tested-by: Daniel Wheele
From: Alex Deucher
[ Upstream commit b818a5d374542ccec73dcfe578a081574029820e ]
If the GPU is passed through to a guest VM, use the PCI
BAR for CPU FB access rather than the physical address of
carve out. The physical address is not valid in a guest.
v2: Fix HDP handing as suggested by Michel
From: Guchun Chen
[ Upstream commit 2d505453f38e18d42ba7d5428aaa17aaa7752c65 ]
Use amdgpu_bo_free_kernel instead of amdgpu_bo_unref to
perform a proper cleanup of PDB bo.
v2: update subject to be more accurate
Signed-off-by: Guchun Chen
Reviewed-by: Christian König
Signed-off-by: Alex Deuche
From: Aurabindo Pillai
[ Upstream commit c5c948aa894a831f96fccd025e47186b1ee41615 ]
[Why&How] Add a dedicated AMDGPU specific ID for use with
newer ASICs that support USB-C output
Signed-off-by: Aurabindo Pillai
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Roman Li
[ Upstream commit f4346fb3edf7720db3f7f5e1cab1f667cd024280 ]
[Why]
On resume we do link detection for all non-MST connectors.
MST is handled separately. However the condition for telling
if connector is on mst branch is not enough for mst hub case.
Link detection for mst branch li
From: Martin Leung
[ Upstream commit b2075fce104b88b789c15ef1ed2b91dc94198e26 ]
why and how:
causes failure on install on certain machines
Reviewed-by: George Shen
Acked-by: Alex Hung
Signed-off-by: Martin Leung
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Lev
From: Roman Li
[ Upstream commit 58e16c752e9540b28a873c44c3bee83e022007c1 ]
[Why]
In init_hw() we call init_pipes() before enabling power gating.
init_pipes() tries to power gate dsc but it may fail because
required force-ons are not released yet.
As a result with dsc config the following errors
From: Chris Park
[ Upstream commit 862a876c3a6372f2fa9d0c6510f1976ac94fc857 ]
[Why]
Once DSC slice cannot fit pixel clock, we incorrectly
reset min slices to 0 and allow max slice to operate,
even when max slice itself cannot fit the pixel clock
properly.
[How]
Change the sequence such that we
From: Leo Ruan
[ Upstream commit 070a88fd4a03f921b73a2059e97d55faaa447dab ]
This commit corrects the printing of the IPU clock error percentage if
it is between -0.1% to -0.9%. For example, if the pixel clock requested
is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -0.8%.
But the
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