> 23.11.2021 10:15, Akhil R пишет:
> > Add support for ACPI based device registration so that the driver can
> > be also enabled through ACPI table.
> >
> > Signed-off-by: Akhil R
> > ---
> > drivers/i2c/busses/i2c-tegra.c | 52
> > --
> > 1 file changed, 4
Hi Marek,
On Mon, Nov 22, 2021 at 9:34 PM Marek Szyprowski
wrote:
>
> On 22.11.2021 16:07, Marek Szyprowski wrote:
> > On 22.11.2021 15:55, Jagan Teki wrote:
> >> On Mon, Nov 22, 2021 at 7:59 PM Jagan Teki
> >> wrote:
> >>> On Mon, Nov 22, 2021 at 7:51 PM Jagan Teki
> >>> wrote:
> On Mon,
https://bugzilla.kernel.org/show_bug.cgi?id=211277
--- Comment #77 from James Zhu (jam...@amd.com) ---
Created attachment 299697
--> https://bugzilla.kernel.org/attachment.cgi?id=299697&action=edit
backport patch for 5.10 stable.
Hi @kolAflash, before I send out them to public for review,. coul
From: Yao Jing
'asm/smp.h' included in 'drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c' is
duplicated. It is clearly included on the 12 line.
Reported-by: Zeal Robot
Signed-off-by: Yao Jing
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
di
From: Lv Ruyi
Both of split and merge are pointers, not arrays.
Reported-by: Zeal Robot
Signed-off-by: Lv Ruyi
---
drivers/gpu/drm/amd/display/dc/dml/dml_wrapper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml_wrapper.c
b/drive
On 10/24/21 1:04 AM, Marek Vasut wrote:
On 10/17/21 7:40 PM, Sam Ravnborg wrote:
Hi Marek,
Hi,
On Sun, Oct 17, 2021 at 07:29:51PM +0200, Marek Vasut wrote:
On 10/17/21 6:49 PM, Sam Ravnborg wrote:
[...]
+ /*
+ * Encoder might sample data on different clock edge than the
display,
On Tue, 23 Nov 2021 19:13:56 +0100, H. Nikolaus Schaller wrote:
> From: Sam Ravnborg
>
> Add DT bindings for the hdmi driver for the Ingenic JZ4780 SoC.
> Based on .txt binding from Zubair Lutfullah Kakakhel
>
> We also add generic ddc-i2c-bus to synopsys,dw-hdmi.yaml
>
> Signed-off-by: Sam Rav
Hello Daniel
Thanks for the summary of the discussion.
On 2021/11/18 22:02, Daniel Stone wrote:
Hi all,
Thanks for this Laurent. Esaki-san, could you please CC dri-devel@ on
discussions like this?
I'm sorry.
I will check using get_maintainer.pl next time.
On Thu, 18 Nov 2021 at 12:32, Laure
https://bugzilla.kernel.org/show_bug.cgi?id=203439
Anish Sapkota (sapkotaanish...@gmail.com) changed:
What|Removed |Added
CC||sapkotaanish..
Hi all,
Today's linux-next merge of the drm-intel-gt tree got a conflict in:
drivers/gpu/drm/i915/i915_pci.c
between commit:
3c542cfa8266 ("drm/i915/dg2: Tile 4 plane format support")
from the drm-intel tree and commit:
a5b7ef27da60 ("drm/i915: Add struct to hold IP version")
from the
On Tue, 2021-11-23 at 14:19 +0100, Rafael J. Wysocki wrote:
> On Wed, Aug 18, 2021 at 8:08 AM Kees Cook
> wrote:
> >
> > In preparation for FORTIFY_SOURCE performing compile-time and run-
> > time
> > field bounds checking for memcpy(), avoid intentionally writing
> > across
> > neighboring field
On Tue 23 Nov 13:17 PST 2021, Akhil P Oommen wrote:
> Capture gmu log in coredump to enhance debugging.
>
> Signed-off-by: Akhil P Oommen
> ---
>
> Changes in v2:
> - Fix kernel test robot's warning about size_t's format specifier
>
> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41
> ++
On 18/11/21 12:32 am, Matthew Auld wrote:
> On 16/11/2021 20:18, Arunpravin wrote:
>> On contiguous allocation, we round up the size
>> to the *next* power of 2, implement a function
>> to free the unused pages after the newly allocate block.
>>
>> v2(Matthew Auld):
>>- replace function name
On 18/11/21 12:09 am, Matthew Auld wrote:
> On 16/11/2021 20:18, Arunpravin wrote:
>> - Make drm_buddy_alloc a single function to handle
>>range allocation and non-range allocation demands
>>
>> - Implemented a new function alloc_range() which allocates
>>the requested power-of-two block
On 11/24/2021 2:47 AM, Akhil P Oommen wrote:
Add a few more gmu buffers to coredump to help debug gmu
issues.
Signed-off-by: Akhil P Oommen
---
(no changes since v1)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 157 +++-
1 file changed, 108 insertions(+), 49 deleti
Add a few more gmu buffers to coredump to help debug gmu
issues.
Signed-off-by: Akhil P Oommen
---
(no changes since v1)
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 157 +++-
1 file changed, 108 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a
Add a module param "force_gpu_coredump" to force coredump on relatively
harmless gpu hw errors.
Signed-off-by: Akhil P Oommen
---
(no changes since v1)
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 33 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 38 ++
Capture gmu log in coredump to enhance debugging.
Signed-off-by: Akhil P Oommen
---
Changes in v2:
- Fix kernel test robot's warning about size_t's format specifier
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41 +
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2
Currently, we boost gpu freq after 25ms of inactivity. This regresses
some of the 30 fps usecases where the workload on gpu (at 33ms internval)
is very small which it can finish at the lowest OPP before the deadline.
Lets increase this inactivity threshold to 50ms (same as the current
devfreq inter
Fix the below smatch warning:
drivers/gpu/drm/msm/adreno/a6xx_gpu.c:1480 a6xx_llc_activate()
error: uninitialized symbol 'gpu_scid'.
Reported-by: Dan Carpenter
Signed-off-by: Akhil P Oommen
---
(no changes since v1)
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 18 +-
Fix the below null pointer dereference in msm_ioctl_gem_submit():
26545.260705: Call trace:
26545.263223:kref_put+0x1c/0x60
26545.266452:msm_ioctl_gem_submit+0x254/0x744
26545.270937:drm_ioctl_kernel+0xa8/0x124
26545.274976:drm_ioctl+0x21c/0x33c
26545.278478:drm_compat_
On Tue 23 Nov 12:54 PST 2021, Abhinav Kumar wrote:
> Hi Bjorn
>
> On 11/23/2021 7:40 AM, Bjorn Andersson wrote:
> > In addition to the other 7xxx INTF interrupt regions, SM8350 has
> > additional INTF regions at 0x0ae37000, 0x0ae38000 and 0x0ae39000, define
> > these. The 7xxx naming scheme of th
Hi Bjorn
On 11/23/2021 7:40 AM, Bjorn Andersson wrote:
In addition to the other 7xxx INTF interrupt regions, SM8350 has
additional INTF regions at 0x0ae37000, 0x0ae38000 and 0x0ae39000, define
these. The 7xxx naming scheme of the bits are kept for consistency.
More than consistency, this is be
Alas no, other than to observe that the issue is not present in 5.13.15,
but is present in 5.14.3; i.e. the last 5.13.x and first 5.14.x kernels
that I compiled myself.
Cheers,
Chris
On Tue, 23 Nov 2021 at 20:14, Alex Deucher wrote:
> On Sun, Nov 21, 2021 at 9:47 AM Chris Rankin wrote:
> >
> >
The 'doorbell_bitmap' bitmap has just been allocated. So we can use the
non-atomic '__set_bit()' function to save a few cycles as no concurrent
access can happen.
Reviewed-by: Felix Kuehling
Signed-off-by: Christophe JAILLET
---
bitmap_set() could certainly also be use, but range checking would
'doorbell_bitmap' and 'queue_slot_bitmap' are bitmaps. So use
'bitmap_zalloc()' to simplify code, improve the semantic and avoid some
open-coded arithmetic in allocator arguments.
Also change the corresponding 'kfree()' into 'bitmap_free()' to keep
consistency.
Reviewed-by: Felix Kuehling
Signed
Hi Paul,
> Am 23.11.2021 um 21:12 schrieb Paul Cercueil :
>
> Hi Nikolaus,
>
> I think if you can fix the last few things I commented on, and I get an ACK
> from Rob for the Device Tree related patches, then it will be ready to merge.
Fine! Especially for finding the NULL regulator risk.
Will
https://bugzilla.kernel.org/show_bug.cgi?id=211277
--- Comment #76 from Alex Deucher (alexdeuc...@gmail.com) ---
(In reply to James Zhu from comment #75)
> (In reply to kolAflash from comment #74)
> > @James Zhu
> >
> > Tested 5.15.2 for over a week and more than 50 standby-wakeups.
> > No proble
On 11/22/21 3:20 AM, Juergen Gross wrote:
On 22.10.21 08:47, Juergen Gross wrote:
Today the non-essential pv devices are hard coded in the xenbus driver
and this list is lacking multiple entries.
This series reworks the detection logic of non-essential devices by
adding a flag for that purpos
There is no need to user boiler plate code to specify a set of base
directories we're going to stuff sysctls under. Simplify this by using
register_sysctl() and specifying the directory path directly.
// pycocci sysctl-subdir-register-sysctl-simplify.cocci PATH
@c1@
expression E1;
identifier subd
From: Xiaoming Ni
There is no need to user boiler plate code to specify a set of base
directories we're going to stuff sysctls under. Simplify this by using
register_sysctl() and specifying the directory path directly.
Move inotify_user sysctl to inotify_user.c while at it to remove clutter
from
There is no need to user boiler plate code to specify a set of base
directories we're going to stuff sysctls under. Simplify this by using
register_sysctl() and specifying the directory path directly.
// pycocci sysctl-subdir-register-sysctl-simplify.cocci drivers/char/hpet.c
@c1@
expression E1;
There is no need to user boiler plate code to specify a set of base
directories we're going to stuff sysctls under. Simplify this by using
register_sysctl() and specifying the directory path directly.
// pycocci sysctl-subdir-register-sysctl-simplify.cocci PATH
@c1@
expression E1;
identifier subd
From: Xiaoming Ni
The kernel/sysctl.c is a kitchen sink where everyone leaves
their dirty dishes, this makes it very difficult to maintain.
To help with this maintenance let's start by moving sysctls to
places where they actually belong. The proc sysctl maintainers
do not want to know what sysct
There is no need to user boiler plate code to specify a set of base
directories we're going to stuff sysctls under. Simplify this by using
register_sysctl() and specifying the directory path directly.
// pycocci sysctl-subdir-register-sysctl-simplify.cocci PATH
@c1@
expression E1;
identifier subd
There is no need to user boiler plate code to specify a set of base
directories we're going to stuff sysctls under. Simplify this by using
register_sysctl() and specifying the directory path directly.
// pycocci sysctl-subdir-register-sysctl-simplify.cocci PATH
@c1@
expression E1;
identifier subd
There is no need to user boiler plate code to specify a set of base
directories we're going to stuff sysctls under. Simplify this by using
register_sysctl() and specifying the directory path directly.
// pycocci sysctl-subdir-register-sysctl-simplify.cocci lib/test_sysctl.c
@c1@
expression E1;
id
This is the 2nd set of kernel/sysctl.c cleanups. The diff stat should
reflect how this is a much better way to deal with theses. Fortunately
coccinelle can be used to ensure correctness for most of these and/or
future merge conflicts.
Note that since this is part of a larger effort to cleanup
kern
On Sun, Nov 21, 2021 at 9:47 AM Chris Rankin wrote:
>
> Hi,
>
> i have found this warning in my vanilla 5.15.4 kernel's dmesg log:
>
> [ 87.687139] [ cut here ]
> [ 87.710799] WARNING: CPU: 1 PID: 1 at
> drivers/gpu/drm/ttm/ttm_bo.c:409 ttm_bo_release+0x1c/0x266 [ttm]
>
Hi Nikolaus,
I think if you can fix the last few things I commented on, and I get an
ACK from Rob for the Device Tree related patches, then it will be ready
to merge.
Cheers,
-Paul
Le mar., nov. 23 2021 at 19:13:53 +0100, H. Nikolaus Schaller
a écrit :
PATCH V8 2021-11-23 19:14:00:
- fix
Hi Nikolaus,
Le mar., nov. 23 2021 at 19:13:59 +0100, H. Nikolaus Schaller
a écrit :
From: Paul Boddie
We need to hook up
* HDMI connector
* HDMI power regulator
* JZ4780_CLK_HDMI @ 27 MHz
* DDC pinmux
* HDMI and LCDC endpoint connections
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikola
Hi Nikolaus,
I keep seeing a few things, sorry.
Le mar., nov. 23 2021 at 19:13:57 +0100, H. Nikolaus Schaller
a écrit :
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for
JZ4780 HDMI support. This requires a new driver, plus device tree and
configuration
On Tue, Nov 23, 2021 at 09:39:25AM +, Tvrtko Ursulin wrote:
>
> On 17/11/2021 22:49, Vinay Belgaumkar wrote:
> > From: Chris Wilson
> >
> > Everytime we come to the end of a virtual engine's context, re-randomise
> > it's siblings[]. As we schedule the siblings' tasklets in the order they
>
On Sun, 2021-10-10 at 17:40 +0530, Animesh Manna wrote:
> As panel replay feature similar to PSR feature of EDP panel, so currently
> utilized existing psr framework for panel replay.
>
> v1: RFC version.
> v2: optimized code, pr_enabled and pr_dpcd variable removed. [Jose]
> v3:
> - code comments
On Sun, 2021-10-10 at 17:40 +0530, Animesh Manna wrote:
> DPCD register definition added to check and enable panel replay
> capability of the sink.
>
> Signed-off-by: Animesh Manna
> ---
> include/drm/drm_dp_helper.h | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/drm/drm
Reviewed-by: Lyude Paul
Will push this to drm-misc in a bit
On Thu, 2021-11-18 at 14:13 +0300, Dan Carpenter wrote:
> The nvkm_acr_lsfw_add() function never returns NULL. It returns error
> pointers on error.
>
> Fixes: 22dcda45a3d1 ("drm/nouveau/acr: implement new subdev to replace
> "secure
On Thu, Nov 18, 2021 at 3:16 AM Dan Carpenter wrote:
>
> The drm_gem_shmem_get_sg_table() function never returns NULL. It returns
> error pointers on error.
>
> Fixes: c66df701e783 ("drm/virtio: switch from ttm to gem shmem helpers")
> Signed-off-by: Dan Carpenter
> ---
> v2: I originally sent t
The preferred way to log connectors is [CONNECTOR:id:name]. Change it in
drm core programs. Also replace obsolete log calls (like DRM_DEBUG_*)
to the new ones (like drm_dbg_*)
Suggested-by: Ville Syrjälä
Signed-off-by: Claudio Suarez
---
drivers/gpu/drm/drm_client_modeset.c | 66 +++
Hi Maxime,
On Mon, Nov 22, 2021 at 7:49 PM Jagan Teki wrote:
>
> Hi Maxime,
>
> On Mon, Nov 22, 2021 at 7:35 PM Maxime Ripard wrote:
> >
> > On Mon, Nov 22, 2021 at 07:18:13PM +0530, Jagan Teki wrote:
> > > Hi Maxime,
> > >
> > > On Mon, Nov 22, 2021 at 3:37 PM Maxime Ripard wrote:
> > > >
> >
From: Paul Boddie
Add support for the LCD controller present on JZ4780 SoCs.
This SoC uses 8-byte descriptors which extend the current
4-byte descriptors used for other Ingenic SoCs.
Tested on MIPS Creator CI20 board.
Signed-off-by: Paul Boddie
Signed-off-by: Ezequiel Garcia
Signed-off-by: H.
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for
JZ4780 HDMI support. This requires a new driver, plus device tree and
configuration modifications.
Here we add Kconfig DRM_INGENIC_DW_HDMI, Makefile and driver code.
Signed-off-by: Paul Boddie
Signed-off-by:
From: Paul Boddie
We need to hook up
* HDMI connector
* HDMI power regulator
* JZ4780_CLK_HDMI @ 27 MHz
* DDC pinmux
* HDMI and LCDC endpoint connections
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/boot/dts/ingenic/ci20.dts | 83 +++--
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for
JZ4780 HDMI support. This requires a new driver, plus device tree and
configuration modifications.
Here we add jz4780 device tree setup.
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
a
After getting the regmap size from the device tree we should
reduce the ranges to the really available registers. This
allows to read only existing registers from the debug fs
and makes the regmap check out-of-bounds access.
For the jz4780 we have done this already.
Suggested-for: Paul Cercueil
From: Sam Ravnborg
Add DT bindings for the hdmi driver for the Ingenic JZ4780 SoC.
Based on .txt binding from Zubair Lutfullah Kakakhel
We also add generic ddc-i2c-bus to synopsys,dw-hdmi.yaml
Signed-off-by: Sam Ravnborg
Signed-off-by: H. Nikolaus Schaller
Cc: Rob Herring
Cc: devicet...@vger
Enable CONFIG options as modules.
Signed-off-by: Ezequiel Garcia
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/configs/ci20_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index ab7ebb0668340..cc69b21585
This changes the way the regmap is allocated to prepare for the
later addition of the JZ4780 which has more registers and bits
than the others.
Therefore we make the regmap as big as the reg property in
the device tree tells.
Suggested-by: Paul Cercueil
Signed-off-by: H. Nikolaus Schaller
---
PATCH V8 2021-11-23 19:14:00:
- fix a bad editing result from patch 2/8 (found by p...@crapouillou.net)
PATCH V7 2021-11-23 18:46:23:
- changed gpio polarity of hdmi_power to 0 (suggested by p...@crapouillou.net)
- fixed LCD1 irq number (bug found by p...@crapouillou.net)
- removed "- 4" for calcu
> Am 23.11.2021 um 19:06 schrieb Paul Cercueil :
>
> Hi Nikolaus,
>
> Le mar., nov. 23 2021 at 18:46:17 +0100, H. Nikolaus Schaller
> a écrit :
>> From: Paul Boddie
>> Add support for the LCD controller present on JZ4780 SoCs.
>> This SoC uses 8-byte descriptors which extend the current
>> 4
Hi Nikolaus,
Le mar., nov. 23 2021 at 18:46:17 +0100, H. Nikolaus Schaller
a écrit :
From: Paul Boddie
Add support for the LCD controller present on JZ4780 SoCs.
This SoC uses 8-byte descriptors which extend the current
4-byte descriptors used for other Ingenic SoCs.
Tested on MIPS Creator
On 11/17/2021 2:49 PM, Vinay Belgaumkar wrote:
From: Chris Wilson
While the power consumption is proportional to the frequency, there is
also a static draw for active gates. The longer we are able to powergate
(rc6), the lower the static draw. Thus there is a sweetspot in the
frequency/power
On 11/17/2021 2:49 PM, Vinay Belgaumkar wrote:
From: Chris Wilson
Currently, we inspect each engine individually and measure the occupancy
of that engine over the last evaluation interval. If that exceeds our
busyness thresholds, we decide to increase the GPU frequency. However,
under a load
Enable CONFIG options as modules.
Signed-off-by: Ezequiel Garcia
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/configs/ci20_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index ab7ebb0668340..cc69b21585
After getting the regmap size from the device tree we should
reduce the ranges to the really available registers. This
allows to read only existing registers from the debug fs
and makes the regmap check out-of-bounds access.
For the jz4780 we have done this already.
Suggested-for: Paul Cercueil
From: Paul Boddie
Add support for the LCD controller present on JZ4780 SoCs.
This SoC uses 8-byte descriptors which extend the current
4-byte descriptors used for other Ingenic SoCs.
Tested on MIPS Creator CI20 board.
Signed-off-by: Paul Boddie
Signed-off-by: Ezequiel Garcia
Signed-off-by: H.
From: Sam Ravnborg
Add DT bindings for the hdmi driver for the Ingenic JZ4780 SoC.
Based on .txt binding from Zubair Lutfullah Kakakhel
We also add generic ddc-i2c-bus to synopsys,dw-hdmi.yaml
Signed-off-by: Sam Ravnborg
Signed-off-by: H. Nikolaus Schaller
Cc: Rob Herring
Cc: devicet...@vger
From: Paul Boddie
We need to hook up
* HDMI connector
* HDMI power regulator
* JZ4780_CLK_HDMI @ 27 MHz
* DDC pinmux
* HDMI and LCDC endpoint connections
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/boot/dts/ingenic/ci20.dts | 83 +++--
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for
JZ4780 HDMI support. This requires a new driver, plus device tree and
configuration modifications.
Here we add jz4780 device tree setup.
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
a
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for
JZ4780 HDMI support. This requires a new driver, plus device tree and
configuration modifications.
Here we add Kconfig DRM_INGENIC_DW_HDMI, Makefile and driver code.
Signed-off-by: Paul Boddie
Signed-off-by:
PATCH V7 2021-11-23 18:46:23:
- changed gpio polarity of hdmi_power to 0 (suggested by p...@crapouillou.net)
- fixed LCD1 irq number (bug found by p...@crapouillou.net)
- removed "- 4" for calculating max_register (suggested by p...@crapouillou.net)
- use unevaluatedPropertes instead of additionalP
This changes the way the regmap is allocated to prepare for the
later addition of the JZ4780 which has more registers and bits
than the others.
Therefore we make the regmap as big as the reg property in
the device tree tells.
Suggested-by: Paul Cercueil
Signed-off-by: H. Nikolaus Schaller
---
The TTM acronym is defined for the first time in the documentation as
"Translation Table Maps". Afterwards, "Translation Table Manager" is
used as definition.
Fix the first definition to avoid confusion.
Signed-off-by: José Expósito
---
Documentation/gpu/drm-mm.rst | 2 +-
1 file changed, 1 ins
Restarting a display unit group can cause a visible flicker on the display.
Particularly when a LVDS display is connected to a Salvator board and an
HDMI display is (re)connected, then there will be 2 visible flickers on the
LVDS display:
1. during atomic_flush (The need_restart flag is set in th
Hi Akhil,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on tegra/for-next]
[also build test ERROR on v5.16-rc2 next-20211123]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as doc
On Tue, 2021-11-23 at 09:17 +, Tvrtko Ursulin wrote:
>
> On 22/11/2021 18:44, Rodrigo Vivi wrote:
> > On Wed, Nov 17, 2021 at 02:49:55PM -0800, Vinay Belgaumkar wrote:
> > > From: Chris Wilson
> > >
> > > While the power consumption is proportional to the frequency,
> > > there is
> > > also
On Mon, Nov 15, 2021 at 01:35:47PM +0200, Andy Shevchenko wrote:
> On Wed, Nov 10, 2021 at 05:39:33PM +0100, Thomas Zimmermann wrote:
> > Am 10.11.21 um 17:34 schrieb Andy Shevchenko:
> > > On Wed, Nov 10, 2021 at 3:55 PM Thomas Zimmermann
> > > wrote:
> > > > Am 10.11.21 um 11:24 schrieb Andy Sh
On Tue, 23 Nov 2021 at 16:39, Bjorn Andersson
wrote:
>
> In addition to the other 7xxx INTF interrupt regions, SM8350 has
> additional INTF regions at 0x0ae37000, 0x0ae38000 and 0x0ae39000, define
> these. The 7xxx naming scheme of the bits are kept for consistency.
>
> Signed-off-by: Bjorn Anders
https://bugzilla.kernel.org/show_bug.cgi?id=211807
--- Comment #16 from zwer...@mail.de ---
(In reply to Alex Deucher from comment #13)
> (In reply to zwerg12 from comment #12)
> > As mentioned before, I get the same error with a monitor connected with DP
> > to a Lenovo ThinkPad USB-C Dock Gen2.
On 11/23/2021 12:36 AM, Rob Clark wrote:
On Mon, Nov 22, 2021 at 10:26 AM Rob Clark wrote:
On Thu, Nov 18, 2021 at 2:21 AM Akhil P Oommen wrote:
Capture gmu log in coredump to enhance debugging.
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41
In addition to the other 7xxx INTF interrupt regions, SM8350 has
additional INTF regions at 0x0ae37000, 0x0ae38000 and 0x0ae39000, define
these. The 7xxx naming scheme of the bits are kept for consistency.
Signed-off-by: Bjorn Andersson
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 18 +++
Hey Martyn,
On Tue, 16 Nov 2021 at 13:28, Martyn Welch wrote:
>
> In the configuration used by the b850v3, the STDP2690 is used to read EDID
> data whilst it's the STDP4028 which can detect when monitors are connected.
>
> This can result in problems at boot with monitors connected when the
> STD
On 2021-09-06 17:38, Uma Shankar wrote:
> This is a RFC proposal for plane color hardware blocks.
> It exposes the property interface to userspace and calls
> out the details or interfaces created and the intended
> purpose.
>
> Credits: Ville Syrjälä
> Signed-off-by: Uma Shankar
> ---
> Doc
On 2021-11-12 03:37, Pekka Paalanen wrote:
> On Thu, 11 Nov 2021 21:58:35 +
> "Shankar, Uma" wrote:
>
>>> -Original Message-
>>> From: Harry Wentland
>>> Sent: Friday, November 12, 2021 2:41 AM
>>> To: Shankar, Uma ; Ville Syrjälä
>>>
>>> Cc: intel-...@lists.freedesktop.org; dri-
23.11.2021 10:15, Akhil R пишет:
> Add support for ACPI based device registration so that the driver
> can be also enabled through ACPI table.
>
> Signed-off-by: Akhil R
> ---
> drivers/i2c/busses/i2c-tegra.c | 52
> --
> 1 file changed, 40 insertions(+),
Not needed any more now we have that inside the framework.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 52 +++--
2 files changed, 6 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/dr
This change adds the dma_resv_usage enum and allows us to specify why a
dma_resv object is queried for its containing fences.
Additional to that a dma_resv_usage_rw() helper function is added to aid
retrieving the fences for a read or write userspace submission.
This is then deployed to the diffe
We have previously done that in the individual drivers but it is
more defensive to move that into the common code.
Dynamic attachments should wait for map operations to complete by themselves.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 18 +++---
This is now handled by the DMA-buf framework in the dma_resv obj.
Signed-off-by: Christian König
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 13 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c| 7 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.c| 11 +++---
drivers/gpu/drm/amd
Audit all the users of dma_resv_add_excl_fence() and make sure they
reserve a shared slot also when only trying to add an exclusive fence.
This is the next step towards handling the exclusive fence like a
shared one.
Signed-off-by: Christian König
---
drivers/dma-buf/st-dma-resv.c
Use dma_resv_get_singleton() here to eventually get more than one write
fence as single fence.
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/dispnv50/wndw.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c
b/
This was added because of the now dropped shared on excl dependency.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 5 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 6 --
2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Use dma_resv_get_singleton() here to eventually get more than one write
fence as single fence.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_gem_atomic_helper.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem_atomic_helper.
So far we had the approach of using a directed acyclic
graph with the dma_resv obj.
This turned out to have many downsides, especially it means
that every single driver and user of this interface needs
to be aware of this restriction when adding fences. If the
rules for the DAG are not followed th
Makes the code a bit more simpler.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 23 +++
1 file changed, 3 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
index be48
Instead of distingting between shared and exclusive fences specify
the fence usage while adding fences.
Rework all drivers to use this interface instead and deprecate the old one.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-resv.c| 389 --
drivers/
Instead use the new dma_resv_get_singleton function.
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index fa73fe57f97b
Drivers should never touch this directly.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-resv.c | 17 +
include/linux/dma-resv.h | 17 -
2 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-res
Get the write fence using dma_resv_for_each_fence instead of accessing
it manually.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/gpu/drm/amd
We can get the excl fence together with the shared ones as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/etnaviv/etnaviv_gem.h| 1 -
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 14 +-
drivers/gpu/drm/etnaviv/etnaviv_sched.c | 10 --
3 files changed
Use dma_resv_wait() instead of extracting the exclusive fence and
waiting on it manually.
Signed-off-by: Christian König
---
drivers/infiniband/core/umem_dmabuf.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/infiniband/core/umem_dmabuf.c
b/drivers/infiniba
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