Hi Maarten,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next
tegra-drm/drm/tegra/for-next airlied/drm-next v5.15-rc6 next-20211021]
[If your patch is applied to the wrong git tree
Hi Maxime,
Thank you for the patch.
I may have written "Add LVDS link companion" property in the subject
line.
On Wed, Sep 29, 2021 at 10:42:30AM +0200, Maxime Ripard wrote:
> The Allwinner SoCs with two TCONs and LVDS output can use both to drive an
> LVDS dual-link. Add a new property to expre
Similar to the virtual frame buffer (vfb) the pv display driver is not
essential for booting the system. Set the respective flag.
Signed-off-by: Juergen Gross
---
drivers/gpu/drm/xen/xen_drm_front.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xen/xen_drm_front.c
b/driver
When booting the xenbus driver will wait for PV devices to have
connected to their backends before continuing. The timeout is different
between essential and non-essential devices.
Non-essential devices are identified by their nodenames directly in the
xenbus driver, which requires to update this
Today the non-essential pv devices are hard coded in the xenbus driver
and this list is lacking multiple entries.
This series reworks the detection logic of non-essential devices by
adding a flag for that purpose to struct xenbus_driver.
Juergen Gross (5):
xen: add "not_essential" flag to struc
On Thu, Oct 21, 2021 at 07:56:11PM +0530, Ramalingam C wrote:
From: Stuart Summers
Add a new platform flag, has_64k_pages, for platforms supporting
base page sizes of 64k.
Signed-off-by: Stuart Summers
Signed-off-by: Ramalingam C
Reviewed-by: Lucas De Marchi
Lucas De Marchi
On Thu, Oct 21, 2021 at 07:56:12PM +0530, Ramalingam C wrote:
From: Matthew Auld
LMEM should be allocated at 64K granularity, since 4K page support will
eventually be dropped for LMEM when using the PPGTT.
this is not for xehpsdv only. So this should probably drop the prefix
and be:
For disc
This patch try to fix memory leak reported by syzbot:
BUG: memory leak
unreferenced object 0x888127338180 (size 64):
comm "syz-executor.6", pid 11434, jiffies 4294961165 (age 15.480s)
hex dump (first 32 bytes):
01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00
Am 22.10.21 um 04:56 schrieb John Stultz:
On Thu, Oct 21, 2021 at 6:49 PM Shuosheng Huang
wrote:
Some built-in modules will failed to use dma-buf heap to allocate
memory if the heap drivers are too late to be initialized.
To fix this issue, move initialization of dma-buf heap drivers in
subs
On 10/21/21 22:37, Matthew Brost wrote:
On Thu, Oct 21, 2021 at 08:15:49AM +0200, Thomas Hellström wrote:
Hi, Matthew,
On Mon, 2021-10-11 at 16:47 -0700, Matthew Brost wrote:
The hangcheck selftest blocks per engine resets by setting magic bits
in
the reset flags. This is incorrect for GuC s
On 10/21/21 23:40, Matthew Brost wrote:
Update live.evict to wait on last request and idle GPU after each loop.
This not only enhances the test to fill the GGTT on each engine class
but also avoid timeouts from igt_flush_test when using GuC submission.
igt_flush_test (idle GPU) can take a long
On 21-10-21, 11:27, Markus Schneider-Pargmann wrote:
> This is a new driver that supports the integrated DisplayPort phy for
> mediatek SoCs, especially the mt8195. The phy is integrated into the
> DisplayPort controller and will be created by the mtk-dp driver. This
> driver expects a struct regma
The pull request you sent on Fri, 22 Oct 2021 06:08:20 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2021-10-22
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/64222515138e43da1fcf288f0289ef1020427b87
Thank you!
--
Deet-doot-dot, I am a bot.
https://k
Hi Maxime,
On Thu, Oct 21, 2021 at 09:48:43AM +0200, Maxime Ripard wrote:
> On Tue, Oct 19, 2021 at 03:02:13PM +0300, Laurent Pinchart wrote:
> > On Wed, Sep 29, 2021 at 10:42:28AM +0200, Maxime Ripard wrote:
> > > of_graph_get_port_by_id doesn't modify the device_node pointer it takes
> > > as ar
Hi Doug,
Thank you for the patch.
On Thu, Oct 21, 2021 at 12:29:01PM -0700, Douglas Anderson wrote:
> Right now, the chaining order of
> pre_enable/enable/disable/post_disable looks like this:
>
> pre_enable: start from connector and move to encoder
> enable: start from encoder and move
On Thu, 21 Oct 2021 19:51:20 +0200 Vlastimil Babka wrote:
> >> Then we have to figure out how to order a fix between DRM and mmotm...
> >
> > That is the question! The problem exists only in the merge of the
> > two. On current DRM side stack_depot_init() exists but it's __init and
> > does not
On Thu, Oct 21, 2021 at 6:49 PM Shuosheng Huang
wrote:
>
> Some built-in modules will failed to use dma-buf heap to allocate
> memory if the heap drivers are too late to be initialized.
> To fix this issue, move initialization of dma-buf heap drivers in
> subsys_initcall() which is more earlier to
Add a delay, configurable via debugs (default 100ms), to disable
scheduling of a context after the pin count goes to zero. Disable
scheduling is somewhat costly operation so the idea is a delay allows
the resubmit something before doing this operation. This delay is only
done if the context isn't c
This will help in an upcoming patch where the live selftest wrappers
are extended to do more.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 +-
drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c| 2 +-
drivers/gpu/drm/i915/gem/selftests/i915_g
Add delay before disabling scheduling on a context. 2nd patch should
explain it quite well.
Signed-off-by: Matthew Brost
Matthew Brost (2):
drm/i915/selftests: Use correct selfest calls for live tests
drm/i915/guc: Add delay to disable scheduling after pin count goes to
zero
drivers/g
If we want to return from for_each_intel_connector_iter(), one
way is calling drm_connector_list_iter_end() before returning
to avoid memleak. The other way is just breaking from the bracket
and then returning after the outside drm_connector_list_iter_end().
Obviously, the second way makes code sma
I got memory leak as follows when doing fault injection test:
WARNING: CPU: 0 PID: 1214 at drm_mode_config_cleanup+0x689/0x890 [drm]
RIP: 0010:drm_mode_config_cleanup+0x689/0x890 [drm]
Call Trace:
? tracer_hardirqs_on+0x33/0x520
? drm_mode_config_reset+0x3f0/0x3f0 [drm]
? trace_event_raw_event_
It isn't safe to scrub for missing G2H or continue with the reset until
all G2H processing is complete. Flush the G2H work queue during reset to
ensure it is done running. No need to call the IRQ handler directly
either as the scrubbing code can deal with any missing G2H.
Signed-off-by: Matthew Br
From: John Harrison
When i915 receives a context reset notification from GuC, it triggers
an error capture before resetting any outstanding requsts of that
context. Unfortunately, the error capture is not a time bound
operation. In certain situations it can take a long time, particularly
when mul
An error capture allocates memory, memory allocations depend on resets,
and resets need to flush the G2H handlers to seal several races. If the
error capture is done from the G2H handler this creates a circular
dependency. To work around this, do a error capture in a work queue
asynchronously from
Rather allocating an error capture in nowait context to break a lockdep
splat [1], do the error capture async compared to the G2H processing.
v2: Fix Docs warning
v3: Rebase, resend for CI
Signed-off-by: Matthew Brost
[1] https://patchwork.freedesktop.org/patch/451415/?series=93704&rev=5
Matth
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/drm_panel_orientation_quirks.c
between commit:
def0c3697287 ("drm: panel-orientation-quirks: Add quirk for Aya Neo 2021")
from the drm-misc-fixes tree and commits:
072e70d52372 ("drm: panel-orientation-q
On 2021-09-30 07:00, Dmitry Baryshkov wrote:
In preparations of virtualizing the dpu_plane rip out debugfs support
from dpu_plane (as it is mostly used to expose plane's pipe registers).
Also move disable_danger file to danger/ debugfs subdir where it
belongs.
Signed-off-by: Dmitry Baryshkov
On 2021-09-30 07:00, Dmitry Baryshkov wrote:
Do not cache hw_pipe's sblk in dpu_plane. Use
pdpu->pipe_hw->cap->sblk directly.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 25 ---
1 file changed, 8 insertions(+
On 2021-09-30 07:00, Dmitry Baryshkov wrote:
Do not cache hw_pipe's features in dpu_plane. Use
pdpu->pipe_hw->cap->features directly.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 +---
1 file changed, 5 insertions(+),
On 2021-09-30 06:59, Dmitry Baryshkov wrote:
Remove struct dpu_hw_pipe_cdp_cfg instance from dpu_plane, it is an
interim configuration structure. Allocate it on stack instead.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 14 +
On 2021-09-30 06:59, Dmitry Baryshkov wrote:
Simplify code surrounding CSC table setup by removing struct
dpu_csc_cfg
pointer from dpu_plane and getting it directly at the CSC setup time.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ss
On Thu, 2021-10-21 at 13:00 +0300, Jani Nikula wrote:
> On Wed, 20 Oct 2021, Khaled Almahallawy > wrote:
> > This series updates DPCD 248h register name and PHY test patterns
> > names to follow DP 2.0 Specs.
> > Also updates the DP PHY CTS codes of the affected drivers (i915,
> > amd, msm)
> > No
On 2021-09-30 06:59, Dmitry Baryshkov wrote:
Scaler and pixel_ext configuration does not contain a long living
state,
it is used only during plane update, so remove these two fiels from
fiels ---> fields
dpu_plane_state and allocate them on stack.
Signed-off-by: Dmitry Baryshkov
While addr
On 2021-09-30 06:59, Dmitry Baryshkov wrote:
struct dpu_hw_pipe_cfg represents an interim state during atomic
update/color fill, so move it out of struct dpu_plane.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 104 ---
On 2021-09-30 06:59, Dmitry Baryshkov wrote:
The stage_cfg is not used outside of _dpu_crtc_blend_setup(), so remove
the temporary config from global struct.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 11 ++-
drivers/gpu
On 2021-09-30 06:59, Dmitry Baryshkov wrote:
Use plane->name instead of artificial pipe_name.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/
On 2021-09-30 06:59, Dmitry Baryshkov wrote:
The pipe_qos_cfg is used only in _dpu_plane_set_qos_ctrl(), so remove
it
from the dpu_plane struct and allocate it on stack when necessary.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
On 2021-09-30 06:59, Dmitry Baryshkov wrote:
LUT levels are setup outside of setup_qos_ctrl, so remove them from the
struct dpu_hw_pipe_qos_cfg.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 15 ---
drivers/gpu/drm/m
Hi Doug,
I see this patch fixes the order for
drm_bridge_chain_pre_enable() and drm_atomic_bridge_chain_post_disable().
For completeness, shouldn't we also fix the order for
drm_atomic_bridge_chain_pre_enable() and drm_bridge_chain_post_disable()?
Surely, if Sam's pending patches will land first
On 2021-10-01 18:27, Dmitry Baryshkov wrote:
Use clk_bulk_* API instead of hand-coding them. Note, this drops
support
for legacy clk naming (e.g. "iface_clk" instead of just "iface"),
however all in-kernel device trees were converted long long ago. The
warning is present there since 2017.
Signe
Update live.evict to wait on last request and idle GPU after each loop.
This not only enhances the test to fill the GGTT on each engine class
but also avoid timeouts from igt_flush_test when using GuC submission.
igt_flush_test (idle GPU) can take a long time with GuC submission if
losts of context
This is a 5.7" 2160x1080 panel found on the Motorola Moto G6.
There may be other smartphones using it, as well.
Signed-off-by: Julian Braha
---
drivers/gpu/drm/panel/Kconfig | 7 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu/drm/panel/panel-tianma-tl057fvxp01
Adds the bindings for the Tianma TL057FVXP01 DSI panel,
found on the Motorola Moto G6.
v2:
Fixed accidental whitespace deletion.
Signed-off-by: Julian Braha
---
.../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/d
On Thu, Oct 21, 2021 at 10:05:40PM +0300, Ville Syrjälä wrote:
On Thu, Oct 21, 2021 at 11:18:47AM -0700, Lucas De Marchi wrote:
We left the definition IS_CANNONLAKE() macro while removing it from the
tree due to having to merge the changes in different branches. Now that
everything is back in sy
Hi Doug,
On Mon, Oct 18, 2021 at 1:43 PM Doug Anderson wrote:
>
> Hi,
>
> On Sat, Oct 16, 2021 at 9:57 AM Philip Chen wrote:
> >
> > Conventionally, panel is listed under the root in the device tree.
> > When userland asks for display mode, ps8640 bridge is responsible
> > for returning EDID whe
Hi Doug,
On Mon, Oct 18, 2021 at 1:43 PM Doug Anderson wrote:
>
> Hi,
>
> On Sat, Oct 16, 2021 at 9:57 AM Philip Chen wrote:
> >
> > @@ -319,81 +345,70 @@ static void ps8640_bridge_poweron(struct ps8640
> > *ps_bridge)
> > */
> > msleep(200);
> >
> > - ret = regmap_read_p
Conventionally, panel is listed under the root of the device tree.
When userland asks for display mode, ps8640 bridge is responsible
for returning EDID when ps8640_bridge_get_edid() is called.
Now enable a new option of listing panel under "aux-bus" of ps8640
bridge node in the device tree. In thi
Fit ps8640 driver into runtime power management framework:
First, break _poweron() to 3 parts: (1) turn on power and wait for
ps8640's internal MCU to finish init (2) check panel HPD (which is
proxied by GPIO9) (3) the other configs. As runtime_resume() can be
called before panel is powered, we on
On Thu, Oct 21, 2021 at 08:15:49AM +0200, Thomas Hellström wrote:
> Hi, Matthew,
>
> On Mon, 2021-10-11 at 16:47 -0700, Matthew Brost wrote:
> > The hangcheck selftest blocks per engine resets by setting magic bits
> > in
> > the reset flags. This is incorrect for GuC submission because if the
> >
Hi Douglas,
> > > void drm_bridge_chain_pre_enable(struct drm_bridge *bridge)
> >
> > If you, or someone else, could r-b or ack the pending patches to remove
> > this function, this part of the patch would no longer be needed.
>
> OK. I will likely be able to take a look next week. Given that I'
Hi Dave, Daniel,
Fixes for 5.15.
The following changes since commit 519d81956ee277b4419c723adfb154603c2565ba:
Linux 5.15-rc6 (2021-10-17 20:00:13 -1000)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-5.15-2021-10-21
for you to fe
Hi,
On Thu, Oct 21, 2021 at 1:21 PM Sam Ravnborg wrote:
>
> Hi Douglas,
>
> On Thu, Oct 21, 2021 at 12:29:01PM -0700, Douglas Anderson wrote:
> > Right now, the chaining order of
> > pre_enable/enable/disable/post_disable looks like this:
> >
> > pre_enable: start from connector and move to enc
Hi Douglas,
On Thu, Oct 21, 2021 at 12:29:01PM -0700, Douglas Anderson wrote:
> Right now, the chaining order of
> pre_enable/enable/disable/post_disable looks like this:
>
> pre_enable: start from connector and move to encoder
> enable: start from encoder and move to connector
> disable:
I forgot to do this properly in
commit 6f11f37459d8f9f74ff1c299c0bedd50b458057a
Author: Daniel Vetter
Date: Fri Jul 23 10:34:55 2021 +0200
drm/plane: remove drm_helper_get_plane_damage_clips
intel-gfx CI didn't spot this because we run each selftest in each own
invocations, which means re
Hi Linus,
Nothing too crazy at the end of the cycle, the kmb modesetting fixes
are probably a bit large but it's not a major driver, and its fixing
monitor doesn't turn on type problems. Otherwise it's just a few minor
patches, one ast regression revert, an msm power stability fix.
Dave.
drm-fix
Right now, the chaining order of
pre_enable/enable/disable/post_disable looks like this:
pre_enable: start from connector and move to encoder
enable: start from encoder and move to connector
disable: start from connector and move to encoder
post_disable: start from encoder and move to
On Thu, Oct 21, 2021 at 11:18:47AM -0700, Lucas De Marchi wrote:
> We left the definition IS_CANNONLAKE() macro while removing it from the
> tree due to having to merge the changes in different branches. Now that
> everything is back in sync and nobody is using IS_CANNONLAKE(), we can
> safely ditc
Quoting Krishna Manikandan (2021-10-20 06:58:52)
> Add DSI controller and PHY nodes for sc7280.
>
> Signed-off-by: Rajeev Nandan
> Signed-off-by: Krishna Manikandan
> Reviewed-by: Matthias Kaehlcke
>
> Changes in v2:
> - Drop flags from interrupts (Stephen Boyd)
> - Rename dsi-opp-table
Quoting Krishna Manikandan (2021-10-20 06:58:53)
> From: Sankeerth Billakanti
>
> Add edp controller and phy DT nodes for sc7280.
>
> Signed-off-by: Sankeerth Billakanti
> Signed-off-by: Krishna Manikandan
>
Some comments below
Reviewed-by: Stephen Boyd
> Changes in v2:
> - Move regulat
Quoting Krishna Manikandan (2021-10-20 06:58:51)
> Add mdss and mdp DT nodes for sc7280.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v2:
> - Rename display dt nodes (Stephen Boyd)
> - Add clock names one per line for readability (Stephen Boyd)
> ---
Reviewed-by: Stephen Boyd
Quoting Krishna Manikandan (2021-10-20 06:58:50)
> MSM Mobile Display Subsystem (MDSS) encapsulates sub-blocks
> like DPU display controller, DSI, EDP etc. Add required DPU
> device tree bindings for SC7280.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v2:
> - Drop target from descriptio
We left the definition IS_CANNONLAKE() macro while removing it from the
tree due to having to merge the changes in different branches. Now that
everything is back in sync and nobody is using IS_CANNONLAKE(), we can
safely ditch it.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv
Last user of PAGE_KERNEL_IO is the i915 driver. While removing it from
there as we seek to bring the driver to other architectures, Daniel
suggested that we could finish the cleanup and remove it altogether,
through the tip tree. So here I'm sending both commits needed for that.
Lucas De Marchi (2
PAGE_KERNEL_IO is only defined for x86 and nowadays is the same as
PAGE_KERNEL. It was different for some time, OR'ing a `_PAGE_IOMAP` flag
in commit be43d72835ba ("x86: add _PAGE_IOMAP pte flag for IO
mappings"). This got removed in commit f955371ca9d3 ("x86: remove the
Xen-specific _PAGE_IOMAP P
PAGE_KERNEL_IO is only defined for x86 and nowadays is the same as
PAGE_KERNEL. It was different for some time, OR'ing a `_PAGE_IOMAP` flag
in commit be43d72835ba ("x86: add _PAGE_IOMAP pte flag for IO
mappings"). This got removed in commit f955371ca9d3 ("x86: remove the
Xen-specific _PAGE_IOMAP P
On Fri, 2021-10-01 at 14:52 -0300, Jason Gunthorpe wrote:
> This is a more complicated conversion because vfio_ccw is sharing the
> vfio_device between both the mdev_device, its vfio_device and the
> css_driver.
>
> The mdev is a singleton, and the reason for this sharing is so the
> extra
> css_d
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Signed-off-by: Maarten Lankhorst
Needs a proper commit message.
Quoting Sankeerth Billakanti (2021-10-20 05:14:10)
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index 62e75dc..9fea49c 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> @@ -1238,9 +1240,21 @@ static int dp_ctrl_link
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Now that freeing objects takes the object lock when destroying the
> backing pages, we can confidently take the object lock even for dead
> objects.
>
> Use this fact to take the object lock in the shrinker, without requiring
> a reference
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> In the next commit, we don't evict when refcount = 0, so we need to
> call drain freed objects, because we want to pin new bo's in the same
> place, causing a test failure.
>
> Furthermore, since each subtest is separated, it's a lot bette
On 10/21/21 10:40, Jani Nikula wrote:
> On Thu, 21 Oct 2021, Vlastimil Babka wrote:
>> This one seems a bit more tricky and I could really use some advice.
>> cd06ab2fd48f adds stackdepot usage to drm_modeset_lock which itself has a
>> number of different users and requiring those to call stack_de
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Signed-off-by: Maarten Lankhorst
Needs a proper commit message.
> ---
> drivers/gpu/drm/i915/i915_gem.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> i915_vma_wait_for_bind needs the vma lock held, fix the caller.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/i915_vma.c | 40 +++--
> 1 file changed, 28 insertions(+), 12 deletions(-)
>
>
Hi Bryant,
On Tue, Oct 19, 2021 at 09:24:33AM -0500, Bryant Mairs wrote:
> Fixes screen orientation for the Aya Neo 2021 handheld gaming console.
>
> Signed-off-by: Bryant Mairs
thanks for your quick response with v2.
Applied to drm-msc-fixes, and should show up in -linus in about two
weeks.
Hi Yang,
On Tue, Oct 19, 2021 at 03:37:26PM +0800, Yang Li wrote:
> Eliminate the following coccicheck warning:
> ./drivers/gpu/drm/panel/panel-novatek-nt35950.c:639:2-3: Unneeded
> semicolon
>
> Reported-by: Abaci Robot
> Fixes: 623a3531e9cf ("drm/panel: Add driver for Novatek NT35950 DSI Drive
On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst
wrote:
>
> Big delta, but boils down to moving set_pages to i915_vma.c, and removing
> the special handling, all callers use the defaults anyway. We only remap
> in ggtt, so default case will fall through.
>
> Because we still don't require locking i
Hi Jiapeng,
On Tue, Oct 19, 2021 at 06:40:29PM +0800, Jiapeng Chong wrote:
> From: chongjiapeng
>
> This symbol is not used outside of panel-novatek-nt35950.c, so marks it
> static.
>
> Fixes the following sparse warning:
>
> drivers/gpu/drm/panel/panel-novatek-nt35950.c:671:33: warning: symbo
Hi John,
On Wed, Oct 20, 2021 at 04:34:27PM +0100, John Keeping wrote:
> Support the "rotation" DT property for ILI9881C based panels.
>
> The first patch is a fix for the binding, then the usual binding update
> followed by the corresponding driver update.
>
> John Keeping (3):
> dt-bindings:
On Wed, Sep 29, 2021 at 05:28:47AM +0200, Karol Herbst wrote:
> Lack of documentation inside Linux here is a bit annoying, but do I
> understand it correctly, that the main (and probably only) difference
> is that kvcalloc checks whether the multiplication overflows and
> returns NULL in this case?
Hi Julian,
On Mon, Oct 18, 2021 at 06:52:21PM -0400, Julian Braha wrote:
> Adds the bindings for the Tianma TL057FVXP01 DSI panel,
> found on the Motorola Moto G6.
>
> v2:
> Fixed accidental whitespace deletion.
>
> Signed-off-by: Julian Braha
Sorry to bother you but I have deleted the origina
On Thu, Oct 21, 2021 at 2:38 PM Jani Nikula wrote:
>
> On Wed, 20 Oct 2021, Thomas Zimmermann wrote:
> > Move a number of files into modules and behind config options.
> >
> > So far, early boot graphics was provided by fbdev. With simpledrm, and
> > possibly other generic DRM drivers, it's now p
On Thu, Oct 21, 2021 at 4:52 AM Gerd Hoffmann wrote:
>
> On Thu, Oct 21, 2021 at 11:55:47AM +0200, Maksym Wezdecki wrote:
> > I get your point. However, we need to make resource_create ioctl,
> > in order to create corresponding resource on the host.
>
> That used to be the case but isn't true any
On Thu, Oct 21, 2021 at 12:41 AM Maxime Ripard wrote:
>
> From: Rob Clark
>
> Switch to the documented order dsi-host vs bridge probe.
>
> Tested-by: Amit Pundir
> Tested-by: Caleb Connolly
> Tested-by: John Stultz
> Signed-off-by: Rob Clark
> Signed-off-by: Maxime Ripard
I guess this shoul
Hi Christian,
On Thu, 21 Oct 2021 at 19:55, Alex Deucher wrote:
> On Thu, Oct 21, 2021 at 10:19 AM Christian König
> wrote:
> >
> > Those members where renamed, update the kerneldoc as well.
> >
> > Signed-off-by: Christian König
>
> Reviewed-by: Alex Deucher
>
LGTM, but perhaps you want to s
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> Call drop_pages with the gem object lock held, instead of the other
> way around. This will allow us to drop the vma bindings with the
> gem object lock held.
>
> We plan to require the object lock for unpinning in the future,
> and this i
On Thu, 21 Oct 2021 at 11:37, Maarten Lankhorst
wrote:
>
> vma->obj and vma->resv are now never NULL, and some checks can be removed.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/gt/intel_context.c | 2 +-
> .../gpu/drm/i915/gt/intel_ring_submission.c | 2 +-
> dri
On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst
wrote:
>
> This allows us to finally get rid of all the assumptions that vma->obj is
> NULL.
>
> Changes since v1:
> - Ensure the mock_ring vma is pinned to prevent a fault.
> - Pin it high to avoid failure in evict_for_vma selftest.
>
> Signed-off-
Hi, Nancy:
Nancy.Lin 於 2021年10月4日 週一 下午2:22寫道：
>
> ETHDR is a part of ovl_adaptor.
> ETHDR is designed for HDR video and graphics conversion in the external
> display path. It handles multiple HDR input types and performs tone
> mapping, color space/color format conversion, and then combine
> dif
On Thu, 21 Oct 2021 at 11:36, Maarten Lankhorst
wrote:
>
> We currently have to special case vma->obj being NULL because
> of gen6 ppgtt and mock_engine. Fix gen6 ppgtt, so we may soon
> be able to remove a few checks. As the object only exists as
> a fake object pointing to ggtt, we have no backi
This reverts commit aae74ff9caa8de9a45ae2e46068c417817392a26,
since it prevents my AMD Milan system from booting, with:
[ 27.189558] BUG: kernel NULL pointer dereference, address:
[ 27.197506] #PF: supervisor write access in kernel mode
[ 27.20] #PF: error_code(0x0002) -
Hi Maxime,
> Let me know what you think,
apply the lot to drm-misc-next. Maybe wait for an r-b or a-b on the kirin
patch but the rest is IMO good to go.
Sam
On Thu, Oct 21, 2021 at 09:39:39AM +0200, Maxime Ripard wrote:
> Commit 24417d5b0c00 ("drm/bridge: ti-sn65dsi83: Implement .detach
> callback") moved the unregistration of the bridge DSI device and bridge
> itself to the detach callback.
>
> While this is correct for the DSI device detach and unre
On Thu, 21 Oct 2021 05:53:31 -0700, Matthew Auld wrote:
>
> wbinvd_on_all_cpus() is only defined on x86 it seems, plus we need to
> include asm/smp.h here.
Reviewed-by: Ashutosh Dixit
> Reported-by: kernel test robot
> Signed-off-by: Matthew Auld
> Cc: Thomas Hellström
> ---
> drivers/gpu/dr
From: Fangzhi Zuo
[Why]
configure/call DC interface for DP2 mst support. This is needed to make DP2
mst work.
[How]
- add encoding type, logging, mst update/reduce payload functions
Use the link encoding to determine the DP type (1.4 or 2.0) and add a
flag to dc_stream_update to determine wheth
On 10/1/21 1:52 PM, Jason Gunthorpe wrote:
Makes the code easier to understand what is memory lifecycle and what is
other stuff.
Reviewed-by: Eric Farman
Signed-off-by: Jason Gunthorpe
Reviewed-by: Matthew Rosato
I get your point. However, we need to make resource_create ioctl,
in order to create corresponding resource on the host.
The concept is:
App |Gallium | Guest kernel What is
happening?
init() ......
glTexImage2
Hi Doug,
Sorry about that, this is the first time I am posting changes upstream and
still getting hold of conventions.
I think I misinterpreted your subject line comment and changed the just title
to include dp-controller. I will correct it in the next version.
sc7280-dp will be added later wh
On 10/1/21 1:52 PM, Jason Gunthorpe wrote:
Since the ccw_io_region was split out of the private the allocation no
longer needs the GFP_DMA. Remove it.
Reported-by: Christoph Hellwig
Fixes: c98e16b2fa12 ("s390/cio: Convert ccw_io_region to pointer")
Signed-off-by: Jason Gunthorpe
Reviewed-by:
Hi, Nancy:
Nancy.Lin 於 2021年10月4日 週一 下午2:21寫道：
>
> Add merge new API.
> 1. Vdosys1 merge1~merge4 support HW mute function, so add unmute API.
> 2. Add merge new advance config API. The original merge API is
>mtk_ddp_comp_funcs function prototype. The API interface parameters
>cannot be mo
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