* Tomi Valkeinen [210226 09:04]:
> Hmm, if I read the code right, TE was not enabled at all before this patch.
> And this patch enables it. So maybe TE has never worked with that panel?
>
> You could try changing the enable_te calls to pass false.
>
> Or with the upstream driver, comment out
>
Move fences that have already signaled should not prevent memory
allocations with no_wait_gpu.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/ttm/ttm_bo.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 3a
When creating a new framebuffer, verify that the bo size associated with
it can handle the fb size.
drm_gem_fb_init_with_funcs implements this check by calculating the
minimum expected size of each plane. amdgpu now uses this function to
initialize its fb as it performs the required checks.
The bu
When creating a new framebuffer, verify that the bo size associated with
it can handle the fb size.
drm_gem_fb_init_with_funcs implements this check by calculating the
minimum expected size of each plane. amdgpu now uses this function to
initialize its fb as it performs the required checks.
The bu
When running the latest kernel on an sc7180 with KASAN I got this
splat:
BUG: KASAN: slab-out-of-bounds in a6xx_gpu_init+0x618/0x644
Read of size 4 at addr ff8088f36100 by task kworker/7:1/58
CPU: 7 PID: 58 Comm: kworker/7:1 Not tainted 5.11.0+ #3
Hardware name: Google Lazor (rev1 - 2)
This series was inspried by a KASAN warning that I got at bootup caused
by the GPU driver on my system interfacing with the nvmem API incorrectly.
I have posted a fix for the GPU driver but looking at this nvmem entry
made me question how the nvmem API was supposed to work. I've proposed
some impr
On 2021-01-22 3:55 p.m., Chen, Xiaogang wrote:
On 1/19/2021 4:29 PM, Grodzovsky, Andrey wrote:
On 1/15/21 2:21 AM, Chen, Xiaogang wrote:
On 1/14/2021 1:24 AM, Grodzovsky, Andrey wrote:
On 1/14/21 12:11 AM, Chen, Xiaogang wrote:
On 1/12/2021 10:54 PM, Grodzovsky, Andrey wrote:
On 1/4/21 1
On Fri, Feb 26, 2021 at 4:42 AM Jiapeng Chong
wrote:
>
> Fix the following coccicheck warnings:
>
> ./drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c:273:16-21: WARNING:
> conversion to bool not needed here.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
Applied. Thanks!
Alex
> --
On Fri, Feb 26, 2021 at 4:17 AM Jiapeng Chong
wrote:
>
> Fix the following coccicheck warnings:
>
> ./drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c:924:47-52:
> WARNING: conversion to bool not needed here.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
Applied. Thanks!
In commit 9fc418430c65 ("drm/msm/dp: unplug interrupt missed after
irq_hpd handler") we dropped a reset of the aux phy during aux transfers
because resetting the phy during active communication caused us to miss
an hpd irq in some cases. Unfortunately, we also dropped the part of the
code that chan
Hi!
> > + struct device *dmadev;
> > + struct drm_gem_object *obj;
> > +
> > + if (!dev_is_usb(dev->dev))
> > + return ERR_PTR(-ENODEV);
> > +
> > + dmadev = usb_intf_get_dma_device(to_usb_interface(dev->dev));
> > + if (drm_WARN_ONCE(dev, !dmadev, "buffer sharing not supporte
https://bugzilla.kernel.org/show_bug.cgi?id=209713
--- Comment #19 from Klaus Mueller (kmuel...@justmail.de) ---
I didn't see any problem any more since 2021-02-14 and linux 5.10.16 with this
patch applied:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git/tree/releases/5.9.1
Hey Parshuram,
This patch looks good to me.
Reviewed-by: Robert Foss
On Fri, 26 Feb 2021 at 17:18, Parshuram Thombare wrote:
>
> This patch enable HDCP in MHDP driver.
>
> Signed-off-by: Parshuram Thombare
> ---
> drivers/gpu/drm/bridge/cadence/Makefile | 2 +-
> .../drm/bridge/cadenc
Include PPC_PMAC in the configs that use aty_ld_lcd() and
aty_st_lcd() implementations so that the PM code may work
correctly for PPC_PMAC.
Suggested-by: Ville Syrjälä
Signed-off-by: Randy Dunlap
Cc: Daniel Vetter
Cc: Nick Desaulniers
Cc: linux-fb...@vger.kernel.org
Cc: dri-devel@lists.freedes
On Fri, Feb 26, 2021 at 05:42:24PM +0530, Kiran Gunda wrote:
> As per the current implementation, after FSC (Full Scale Current)
> and brightness update the sync bits are transitioned from 1 to 0.
This still seems to incorrectly describe the current behaviour.
Surely in most cases (i.e. every tim
On Fri, Feb 26, 2021 at 10:27 PM Maxime Ripard wrote:
>
> Hi,
>
> On Mon, Feb 15, 2021 at 01:11:01AM +0530, Jagan Teki wrote:
> > Use drm_panel_bridge to replace manual panel handling code.
> >
> > This simplifies the driver to allows all components in the
> > display pipeline to be treated as bri
On Fri, Feb 26, 2021 at 05:42:23PM +0530, Kiran Gunda wrote:
> Currently, for WLED5, the FSC (Full scale current) setting is not
> updated properly due to driver toggling the wrong register after
> an FSC update.
>
> On WLED5 we should only toggle the MOD_SYNC bit after a brightness
> update. For
This patch enable HDCP in MHDP driver.
Signed-off-by: Parshuram Thombare
---
drivers/gpu/drm/bridge/cadence/Makefile | 2 +-
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 105 +++-
.../drm/bridge/cadence/cdns-mhdp8546-core.h | 21 +
.../drm/bridge/cadence/cdns-mhdp8546-hdcp.c | 57
Hi,
On Mon, Feb 15, 2021 at 01:11:01AM +0530, Jagan Teki wrote:
> Use drm_panel_bridge to replace manual panel handling code.
>
> This simplifies the driver to allows all components in the
> display pipeline to be treated as bridges, paving the way
> to generic connector handling.
>
> Use drm_brid
This patch series enables HDCP in Cadence MHDP DPI/DP bridge driver.
Parshuram Thombare (2):
dt-bindings: drm/bridge: MHDP8546 bridge binding changes for HDCP
drm: bridge: cdns-mhdp8546: Enable HDCP
.../display/bridge/cdns,mhdp8546.yaml | 20 +-
drivers/gpu/drm/bridge/cadence/Makefi
On Fri, Feb 26, 2021 at 10:26:47AM +0100, Thomas Zimmermann wrote:
> USB devices cannot perform DMA and hence have no dma_mask set in their
> device structure. Therefore importing dmabuf into a USB-based driver
> fails, which breaks joining and mirroring of display in X11.
>
> For USB devices, pic
Add binding changes for HDCP in the MHDP8546 DPI/DP bridge binding.
Signed-off-by: Parshuram Thombare
---
.../display/bridge/cdns,mhdp8546.yaml | 20 +--
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/bridge/cdns,
On 2/26/21 4:12 AM, Ville Syrjälä wrote:
> On Thu, Feb 25, 2021 at 04:05:37PM -0800, Randy Dunlap wrote:
>> Include PPC_PMAC in the configs that use aty_ld_lcd() and
>> aty_st_lcd() implementations so that the PM code may work
>> correctly for PPC_PMAC.
>>
>> Suggested-by: Ville Syrjälä
>> Signed-
Hey Parshuram,
Thanks for submitting this.
This series rebased on upstream-drm-misc/for-linux-next fails dt
binding verification.
$ make dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
On Fri, 26 Feb 2021 at 17:18, Parshuram Thombare wrote:
On 2021-02-26 3:04 a.m., Christian König wrote:
Am 25.02.21 um 22:37 schrieb Andrey Grodzovsky:
Problem: If scheduler is already stopped by the time sched_entity
is released and entity's job_queue not empty I encountred
a hang in drm_sched_entity_flush. This is because
drm_sched_entity_is_id
On Fri, Feb 26, 2021 at 10:26:47AM +0100, Thomas Zimmermann wrote:
> USB devices cannot perform DMA and hence have no dma_mask set in their
> device structure. Therefore importing dmabuf into a USB-based driver
> fails, which breaks joining and mirroring of display in X11.
>
> For USB devices, pic
On Fri, Feb 26, 2021 at 02:51:58PM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 26.02.21 um 14:30 schrieb Daniel Vetter:
> > On Fri, Feb 26, 2021 at 10:19 AM Thomas Zimmermann
> > wrote:
> > >
> > > Hi
> > >
> > > Am 25.02.21 um 11:23 schrieb Daniel Vetter:
> > > > Aside from deleting lots of c
Hi
Am 26.02.21 um 14:30 schrieb Daniel Vetter:
On Fri, Feb 26, 2021 at 10:19 AM Thomas Zimmermann wrote:
Hi
Am 25.02.21 um 11:23 schrieb Daniel Vetter:
Aside from deleting lots of code the real motivation here is to switch
the mmap over to VM_PFNMAP, to be more consistent with what real gpu
Am 26.02.21 um 14:36 schrieb Daniel Vetter:
Somehow this got forgotten when I applied the patch in
commit e2c406ea0b0d398a4afda5702957064cc74f8c25
Author: Daniel Vetter
Date: Tue Jan 12 09:43:54 2021 +0100
drm/arc: Inline arcpgu_crtc.c
Fixes: e2c406ea0b0d ("drm/arc: Inline arcpgu_crt
On Thu, Feb 25, 2021 at 05:49:11PM +0100, Maxime Ripard wrote:
> On Mon, Feb 22, 2021 at 11:06:43AM +0100, Daniel Vetter wrote:
> > Some of them have gaps, or fields we don't clear. Native ioctl code
> > does full copies plus zero-extends on size mismatch, so nothing can
> > leak. But compat is mor
Somehow this got forgotten when I applied the patch in
commit e2c406ea0b0d398a4afda5702957064cc74f8c25
Author: Daniel Vetter
Date: Tue Jan 12 09:43:54 2021 +0100
drm/arc: Inline arcpgu_crtc.c
Fixes: e2c406ea0b0d ("drm/arc: Inline arcpgu_crtc.c")
Cc: Thomas Zimmermann
Cc: Eugeniy Paltsev
On Fri, Feb 26, 2021 at 10:19 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 25.02.21 um 11:23 schrieb Daniel Vetter:
> > Aside from deleting lots of code the real motivation here is to switch
> > the mmap over to VM_PFNMAP, to be more consistent with what real gpu
> > drivers do. They're all VM_PFNMP,
On Fri, Feb 26, 2021 at 10:41 AM Thomas Hellström (Intel)
wrote:
>
>
> On 2/25/21 4:49 PM, Daniel Vetter wrote:
> > On Thu, Feb 25, 2021 at 11:44 AM Daniel Vetter wrote:
> >> On Thu, Feb 25, 2021 at 11:28:31AM +0100, Christian König wrote:
> >>> Am 24.02.21 um 10:31 schrieb Daniel Vetter:
>
Hey Liu,
With the below nit straightened out, feel free to add my r-b.
Reviewed-by: Robert Foss
On Thu, 18 Feb 2021 at 04:58, Liu Ying wrote:
>
> This patch adds a drm bridge driver for i.MX8qm/qxp pixel combiner.
> The pixel combiner takes two output streams from a single display
> controller
Hi Maxime,
Il 17/02/2021 12:03, Maxime Ripard ha scritto:
Hi,
On Wed, Feb 10, 2021 at 05:22:37PM +0100, Marjan Pascolo wrote:
On Allwinner SoC interrupt debounce can be controlled by two oscillator
(32KHz and 24MHz) and a prescale divider.
Oscillator and prescale divider are set through
device
Hey Liu,
This patch looks good to me.
Reviewed-by: Robert Foss
On Thu, 18 Feb 2021 at 04:56, Liu Ying wrote:
>
> This patch adds documentations for RGB666_1X30_CPADLO, RGB888_1X30_CPADLO,
> RGB666_1X36_CPADLO and RGB888_1X36_CPADLO bus formats used by i.MX8qm/qxp
> pixel combiner. The RGB pixe
Den 25.02.2021 22.37, skrev Peter Stuge:
> Noralf Trønnes wrote:
>>> I forgot, but I have a two-tone (black/red) e-ink display here, and I
>>> also have a 3-bpp RGB TFT display.
>>
>> I've been anticipating the need for more formats, but I didn't want to
>> add them without having a user. Otherwi
As per the current implementation, after FSC (Full Scale Current)
and brightness update the sync bits are transitioned from 1 to 0.
But, the FSC and brightness sync takes place during a 0 to 1
transition of the sync bits. So the hardware team recommends a
clear-then-set approach in order to guarant
Currently, for WLED5, the FSC (Full scale current) setting is not
updated properly due to driver toggling the wrong register after
an FSC update.
On WLED5 we should only toggle the MOD_SYNC bit after a brightness
update. For an FSC update we need to toggle the SYNC bits instead.
Fix it by adoptin
This patch series has the following two WLED fixes
1. As per the current implementation, for WLED5, after
the FSC (Full Scale Current) update the driver is incorrectly
toggling the MOD_SYNC register instead of toggling the SYNC register.
The patch 1/2 fixes this by toggling the SYNC re
On Thu, Feb 25, 2021 at 04:05:37PM -0800, Randy Dunlap wrote:
> Include PPC_PMAC in the configs that use aty_ld_lcd() and
> aty_st_lcd() implementations so that the PM code may work
> correctly for PPC_PMAC.
>
> Suggested-by: Ville Syrjälä
> Signed-off-by: Randy Dunlap
> Cc: Daniel Vetter
> Cc:
Den 20.02.2021 18.27, skrev Noralf Trønnes:
>
>
> Den 19.02.2021 22.42, skrev Peter Stuge:
>>
>> More generally it's not very typical in USB to report the data size
>> separately from the data itself, if reporting size explicitly at all.
>>
>> Sizes can be part of the data structure itself (li
Hey Liu,
This patch looks good to me
Reviewed-by: Robert Foss
On Thu, 18 Feb 2021 at 04:56, Liu Ying wrote:
>
> This patch adds RGB666_1X30_CPADLO, RGB888_1X30_CPADLO, RGB666_1X36_CPADLO
> and RGB888_1X36_CPADLO bus formats used by i.MX8qm/qxp pixel combiner.
> The RGB pixels with padding low p
Hey Liu,
Thanks for submitting this series.
This patch looks good to me.
Reviewed-by: Robert Foss
On Thu, 18 Feb 2021 at 04:56, Liu Ying wrote:
>
> This patch allows LVDS PHYs to be configured through
> the generic functions and through a custom structure
> added to the generic union.
>
> The
Den 26.02.2021 10.26, skrev Thomas Zimmermann:
> USB devices cannot perform DMA and hence have no dma_mask set in their
> device structure. Therefore importing dmabuf into a USB-based driver
> fails, which breaks joining and mirroring of display in X11.
>
> For USB devices, pick the associated U
On Fri, Feb 26, 2021 at 11:29:05AM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 26.02.21 um 11:19 schrieb Greg KH:
> > On Fri, Feb 26, 2021 at 10:26:47AM +0100, Thomas Zimmermann wrote:
> > > USB devices cannot perform DMA and hence have no dma_mask set in their
> > > device structure. Therefore im
Hi
Am 26.02.21 um 11:19 schrieb Greg KH:
On Fri, Feb 26, 2021 at 10:26:47AM +0100, Thomas Zimmermann wrote:
USB devices cannot perform DMA and hence have no dma_mask set in their
device structure. Therefore importing dmabuf into a USB-based driver
fails, which breaks joining and mirroring of di
On Fri, Feb 26, 2021 at 10:26:47AM +0100, Thomas Zimmermann wrote:
> USB devices cannot perform DMA and hence have no dma_mask set in their
> device structure. Therefore importing dmabuf into a USB-based driver
> fails, which breaks joining and mirroring of display in X11.
>
> For USB devices, pic
On Fri, Feb 26, 2021 at 10:26:47AM +0100, Thomas Zimmermann wrote:
> USB devices cannot perform DMA and hence have no dma_mask set in their
> device structure. Therefore importing dmabuf into a USB-based driver
> fails, which breaks joining and mirroring of display in X11.
>
> For USB devices, pic
Fix the following sparse warning:
drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c:53:1: warning: symbol
'tu102_fifo_runlist' was not declared. Should it be static?
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c | 2 +-
1 file changed
Fix the following sparse warning:
drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c:50:1: warning: symbol
'tu102_mc_intr_unarm' was not declared. Should it be static?
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c | 2 +-
1 file changed, 1
Fix the following coccicheck warnings:
./drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c:273:16-21: WARNING:
conversion to bool not needed here.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 3 +--
1 file changed, 1 insertion(+), 2 dele
On 2/25/21 4:49 PM, Daniel Vetter wrote:
On Thu, Feb 25, 2021 at 11:44 AM Daniel Vetter wrote:
On Thu, Feb 25, 2021 at 11:28:31AM +0100, Christian König wrote:
Am 24.02.21 um 10:31 schrieb Daniel Vetter:
On Wed, Feb 24, 2021 at 10:16 AM Thomas Hellström (Intel)
wrote:
On 2/24/21 9:45 AM, D
USB devices cannot perform DMA and hence have no dma_mask set in their
device structure. Therefore importing dmabuf into a USB-based driver
fails, which breaks joining and mirroring of display in X11.
For USB devices, pick the associated USB controller as attachment device.
This allows the DRM imp
Hi
Am 25.02.21 um 11:23 schrieb Daniel Vetter:
Aside from deleting lots of code the real motivation here is to switch
the mmap over to VM_PFNMAP, to be more consistent with what real gpu
drivers do. They're all VM_PFNMP, which means get_user_pages doesn't
work, and even if you try and there's a
Fix the following coccicheck warnings:
./drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c:924:47-52:
WARNING: conversion to bool not needed here.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
1 file changed, 1 i
On 25/02/2021 14:46, Tony Lindgren wrote:
* Tomi Valkeinen [210222 08:47]:
On 18/02/2021 07:57, Tony Lindgren wrote:
Oh cool that you have those running again/still :) In this case there
is no te-gpios if that might make a difference.
No, GPIO TE is not used on OMAP4 SDP either.
OK
So th
Hi
Am 25.02.21 um 10:53 schrieb Pavel Machek:
Hi!
This is in -next, but I get same behaviour on 5.11; and no, udl does
Thanks for reporting. We are in the process of fixing the issue. The latest
patch is at [1].
Thank you, that fixes the DMA issue, and I can use the udl.
...for a while.
Am Mi., 24. Feb. 2021 um 16:55 Uhr schrieb Lucas Stach :
>
> From: Sascha Hauer
>
> This is the 3D GPU found on the i.MX8MP SoC.
>
Can you provide some information about where you have taken these
values (galcore version,
database entry name)?
> Signed-off-by: Sascha Hauer
> Signed-off-by: Lucas
On Fri, Feb 26, 2021 at 08:59:50AM +0100, Thomas Zimmermann wrote:
> Greg, do you have comments on this patch?
I'll defer to Alan's comments so far, I would like to see that
addressed.
thanks,
greg k-h
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On Thu, Feb 4, 2021 at 1:07 PM Emil Velikov wrote:
>
> Do send a patch, unless someone shouts against it, I'll be happy to
> push it and churn the whole copy to drm/mesa game.
>
> Thanks
> Emil
Hi Emil,
Were you still planning on pushing the patch? I sent a v2 on Feb 8.
Thanks,
James
__
Am 25.02.21 um 22:37 schrieb Andrey Grodzovsky:
Problem: If scheduler is already stopped by the time sched_entity
is released and entity's job_queue not empty I encountred
a hang in drm_sched_entity_flush. This is because drm_sched_entity_is_idle
never becomes false.
Fix: In drm_sched_fini det
Am 25.02.21 um 22:27 schrieb Andrey Grodzovsky:
On 2021-02-25 1:42 p.m., Christian König wrote:
Am 25.02.21 um 17:03 schrieb Andrey Grodzovsky:
On 2021-02-25 2:53 a.m., Christian König wrote:
Am 24.02.21 um 16:13 schrieb Andrey Grodzovsky:
Ping
Sorry, I've been on vacation this week.
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