[Why]
Driver cannot change amdgpu framebuffer (afb) format while doing
page flip. Force system doing so will cause ioctl error, and result in
breaking several functionalities including FreeSync.
If afb format is forced to change during page flip, following message
will appear in dmesg.log:
"[drm:
Hi,
This patch should fix the issue:
https://patchwork.freedesktop.org/patch/410754/?series=85303&rev=1
Thanks
On 12/29, R, Bindu wrote:
>[AMD Official Use Only - Internal Distribution Only]
>
>++Siqueira.
>Regards,
>Bindu
>
>══
From: Wesley Chalmers
The stack variable "val" is potentially unpopulate it, so initialize it
with the value 0xf (indicating an invalid mux).
Cc: Alex Deucher
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Nicholas Kazlauskas
Cc: Hersen Wu
Cc: Dave Airlie
Cc: Josip Pavic
Cc: Bindu Ramamurthy
Si
On Mon, 21 Dec 2020 16:46:59 -0700
Rob Herring wrote:
> *-supply properties are always a single phandle, so binding schemas
> don't need a type $ref nor 'maxItems'.
>
> A meta-schema check for this is pending once these existing cases are
> fixed.
>
> Cc: Jonathan Cameron
> Cc: Dmitry Torokhov
During startup of Raspberry Pi 4 there seems to be a race between
VC4 probing and Pulseaudio trying to open its PCM device:
ASoC: error at snd_soc_dai_startup on fef05700.hdmi: -19
Avoid these errors by returning EPROBE_DEFER in this situation.
Signed-off-by: Stefan Wahren
---
drivers/gpu/
[AMD Official Use Only - Internal Distribution Only]
++Siqueira.
Regards,
Bindu
From: Alex Deucher
Sent: Tuesday, December 29, 2020 10:07 AM
To: Linus Torvalds ; Wentland, Harry
; Kazlauskas, Nicholas ;
Wu, Hersen
Cc: Dave Airlie ; Pavic, Josip ; R,
Bindu ; D
Hi, Yongqiang:
Yongqiang Niu 於 2020年12月28日 週一 下午4:37寫道：
>
> This patch add component RDMA4
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Yongqiang Niu
> ---
> include/linux/soc/mediatek/mtk-mmsys.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/linux/soc/mediatek/mtk-mmsys.
Hi, Yongqiang:
Yongqiang Niu 於 2020年12月28日 週一 下午4:37寫道：
>
> This patch add component OVL_2L2
Reviewed-by: Chun-Kuang Hu
>
> Signed-off-by: Yongqiang Niu
> ---
> include/linux/soc/mediatek/mtk-mmsys.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/linux/soc/mediatek/mtk-mmsy
Hi, Jitao:
Jitao Shi 於 2020年12月25日 週五 下午4:30寫道：
>
> The interrupt trigger is already set by OF. When do devm_request_irq()
> in driver, please use IRQF_TRIGGER_NONE and don't specify trigger type
> again.
>
> Change-Id: Ie59d7bd9a44a130420890b169cc2e6fee3ad7633
I remove change-id and apply this
[AMD Public Use]
It looks like the driver is not able to access the firmware for some reason.
Please make sure it is available in your initrd or compiled into the kernel
depending on your config.
Alex
From: amd-gfx on behalf of Mikhail
Gavrilov
Sent: Sunday
On Thu, Dec 24, 2020 at 5:28 PM Linus Torvalds
wrote:
>
> On Wed, Dec 23, 2020 at 6:29 PM Dave Airlie wrote:
> >
> > Xmas eve pull request present. Just some fixes that trickled in this
> > past week. Mostly amdgpu fixes, with a dma-buf/mips build fix and some
> > misc komeda fixes.
>
> Well, I a
[AMD Public Use]
I don't know if these fixes related to modifiers make sense in the pre-modifier
code base. Bas, Nick?
Alex
From: amd-gfx on behalf of Sasha Levin
Sent: Tuesday, December 22, 2020 9:16 PM
To: linux-ker...@vger.kernel.org ;
sta...@vger.kernel.
Hi Xin Ji,
On Tue, Dec 29, 2020 at 02:50:48PM +0800, Xin Ji wrote:
> On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote:
> > On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote:
> > > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add
> > > swing setting for adju
On Wed, 16 Dec 2020 at 23:26, Ard Biesheuvel wrote:
>
> On Wed, 16 Dec 2020 at 19:00, Alex Deucher wrote:
> >
> > On Mon, Dec 14, 2020 at 12:53 PM Ard Biesheuvel wrote:
> > >
> > > This reverts commit c38d444e44badc557cf29fdfdfb823604890ccfa.
> > >
> > > Simply disabling -mgeneral-regs-only left
Hi,
On 12/28/20 7:39 PM, Peter Robinson wrote:
> The info message was showing the mapped address for the framebuffer. To avoid
> security problems, all virtual addresses are converted to __ptrval__, so
> the message has pointless information:
>
> simple-framebuffer 3ea9b000.framebuffer: framebuff
Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS.
Tested-by: Nicolas Chauvet
Acked-by: Georgi Djakov
Signed-off-by: Dmitry Osipenko
---
drivers/mem
The MSM DRM driver depends on the availability of the ARM LPAE io-pgtable
format code to work properly. In preparation for having the io-pgtable
formats as modules, add a "pre" dependency with MODULE_SOFTDEP() to
ensure that the io-pgtable-arm format module is loaded before loading
the MSM DRM driv
The goal of the Generic Kernel Image (GKI) effort is to have a common
kernel image that works across multiple Android devices. This involves
generating a kernel image that has core features integrated into it,
while SoC specific functionality can be added to the kernel for the
device as a module.
On Mon, Dec 28, 2020 at 05:08:56PM +0200, Laurent Pinchart wrote:
> Hi Xin Ji,
>
> Thank you for the patch.
>
> On Fri, Dec 25, 2020 at 07:01:09PM +0800, Xin Ji wrote:
> > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add
> > swing setting for adjusting DP tx PHY swing
> >
> >
The Panfrost DRM driver depends on the availability of the ARM LPAE
io-pgtable format code to work properly. In preparation for having the
io-pgtable formats as modules, add a "pre" dependency with
MODULE_SOFTDEP() to ensure that the io-pgtable-arm format module is loaded
before loading the Panfros
Display controller (DC) performs isochronous memory transfers, and thus,
has a requirement for a minimum memory bandwidth that shall be fulfilled,
otherwise framebuffer data can't be fetched fast enough and this results
in a DC's data-FIFO underflow that follows by a visual corruption.
The Memory
On Sun, Dec 27, 2020 at 09:56:21AM -0700, Rob Herring wrote:
> On Fri, 25 Dec 2020 19:01:09 +0800, Xin Ji wrote:
> > Add DPI flag for distinguish MIPI input signal type, DSI or DPI. Add
> > swing setting for adjusting DP tx PHY swing
> >
> > Signed-off-by: Xin Ji
> > ---
> > .../bindings/display
EMC driver will become mandatory after turning it into interconnect
provider because interconnect users, like display controller driver, will
fail to probe using newer device-trees that have interconnect properties.
Thus make EMC driver to probe even if timings are missing in device-tree.
Tested-b
The SMMU driver depends on the availability of the ARM LPAE
io-pgtable format code to work properly. In preparation
for having the io-pgtable formats as modules, add a "pre"
dependency with MODULE_SOFTDEP() to ensure that the ARM LPAE
io-pgtable format module is loaded before loading the ARM SMMU
d
Fixes coccicheck warnings:
drivers/gpu/drm/msm/dp/dp_link.c:848:5-8: Unneeded variable: "ret".
Return "0" on line 880
Signed-off-by: Tian Tao
---
drivers/gpu/drm/msm/dp/dp_link.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu
It's useful to know the total number of underflow events and currently
the debug stats are getting reset each time CRTC is being disabled. Let's
account the overall number of events that doesn't get a reset.
Tested-by: Peter Geis
Tested-by: Nicolas Chauvet
Signed-off-by: Dmitry Osipenko
---
dr
28.12.2020 09:22, Viresh Kumar пишет:
> On 24-12-20, 16:00, Dmitry Osipenko wrote:
>> In a device driver I want to set PD to the lowest performance state by
>> removing the performance vote when dev_pm_opp_set_rate(dev, 0) is
>> invoked by the driver.
>>
>> The OPP core already does this, but if OP
spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().
Signed-off-by: Zheng Yongjun
---
drivers/gpu/drm/gma500/power.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/gma500/power.c b/drivers/gpu/drm
In preparation for modularizing io-pgtable formats, add support
for reference counting the io-pgtable format modules to ensure
that the modules are not unloaded while they are in use.
Signed-off-by: Isaac J. Manjarres
---
drivers/iommu/io-pgtable-arm-v7s.c | 1 +
drivers/iommu/io-pgtable-arm.c
The SMMUv3 driver depends on the availability of the ARM LPAE io-pgtable
format code to work properly. In preparation for having the io-pgtable
formats as modules, add a "pre" dependency with MODULE_SOFTDEP() to
ensure that the io-pgtable-arm format module is loaded before loading
the ARM SMMUv3 dr
Using drmm_mode_config_init() sets up managed release of modesetting
resources.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/qxl/qxl_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/qxl/qxl_display.c
b/drivers/gpu/drm/qxl/qxl_display.c
index 012b
The info message was showing the mapped address for the framebuffer. To avoid
security problems, all virtual addresses are converted to __ptrval__, so
the message has pointless information:
simple-framebuffer 3ea9b000.framebuffer: framebuffer at 0x3ea9b000, 0x12c000
bytes, mapped to 0x(ptrval
On Tue, 2020-12-29 at 00:38 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月28日 週一 下午4:38寫道：
> >
> > Use function call for setting mmsys ovl mout register
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> > drivers/soc/mediatek/mmsys/mtk-mmsys.c | 20
>
Add interconnect support to Tegra124 EMC and display controller drivers.
Changelog:
v12: - This is a re-send of the remaining v11 patches [1] that didn't make
into v5.11 kernel. No code changes.
[1] https://lore.kernel.org/lkml/20201203192439.16177-1-dig...@gmail.com/
Dmitry Osipe
get_pages is only called in a locked context. Add a WARN_ON to make sure
it stays that way.
Signed-off-by: Iskren Chernev
---
drivers/gpu/drm/msm/msm_gem.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index
Add modularization support to the Tegra124 EMC driver, which now can be
compiled as a loadable kernel module.
Note that EMC clock must be registered at clk-init time, otherwise PLLM
will be disabled as unused clock at boot time if EMC driver is compiled
as a module. Hence add a prepare/complete ca
Now that everything is in place for modular io-pgtable formats,
allow the ARM LPAE and ARMV7S io-pgtable formats to be built
as modules, and allow the io-pgtable framework to be enabled,
without having to explicitly enable an io-pgtable format.
Signed-off-by: Isaac J. Manjarres
---
drivers/iommu
The crash was caused by locking an uninitialized lock during init of
drm_gem_object. The lock changed in the breaking commit, but the init
was not moved accordingly.
8<--- cut here ---
Unable to handle kernel NULL pointer dereference at virtual address
pgd = (ptrval)
[] *pgd=0
The io-pgtable code constructs an array of init functions for each
page table format at compile time. This is not ideal, as it prevents
io-pgtable formats from being built as kernel modules.
In preparation for modularizing the io-pgtable formats, switch to a
dynamic registration scheme, where each
Using the managed function simplifies the error handling. After
unloading the driver, the PCI device should now get disabled as
well.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/drm_pci.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gp
On Tue, 2020-12-29 at 00:38 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu 於 2020年12月28日 週一 下午4:38寫道：
> >
> > Use function call for setting mmsys ovl mout register
> >
> > Signed-off-by: Yongqiang Niu
> > ---
> > drivers/soc/mediatek/mmsys/mtk-mmsys.c | 20
>
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/core/dc.c:1543:12-19: WARNING: Comparison
to bool
drivers/gpu/drm/amd/display/dc/core/dc.c:1496:14-42: WARNING: Comparison
to bool
drivers/gpu/drm/amd/display/dc/core/dc.c:971:15-48: WARNING: Comparison
to bool
drivers/gpu/drm/amd/display/dc/
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