On Mon, Sep 21, 2020 at 5:16 PM Rob Clark wrote:
>
> On Mon, Sep 21, 2020 at 2:21 AM Daniel Vetter wrote:
> >
> > On Sat, Sep 19, 2020 at 12:37:23PM -0700, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > The android userspace treats the display pipeline as a realtime problem.
> > > And arguab
Hi
Am 21.09.20 um 16:48 schrieb Christian König:
> Implement in the driver instead since it is the only user of that function.
Maybe merge this patch with patch 10.
Best regards
Thomas
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 42
Hi
Am 21.09.20 um 16:48 schrieb Christian König:
> Stop using TTM_PL_FLAG_NO_EVICT.
>
> Signed-off-by: Christian König
Acked-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/drm_gem_vram_helper.c | 37 +++
> include/drm/drm_gem_vram_helper.h | 3 ---
> 2 files chang
Hi Alex,
On 22.09.2020 01:15, Alex Goins wrote:
> Tested-by: Alex Goins
>
> This change fixes a regression with drm_prime_sg_to_page_addr_arrays() and
> AMDGPU in v5.9.
Thanks for testing!
> Commit 39913934 similarly revamped AMDGPU to use sgtable helper functions.
> When
> it changed from dma
On Mon, Sep 21, 2020 at 04:48:52PM +0200, Christian König wrote:
> Stop using TTM_PL_FLAG_NO_EVICT.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/qxl/qxl_debugfs.c | 2 +-
> drivers/gpu/drm/qxl/qxl_drv.h | 1 -
> drivers/gpu/drm/qxl/qxl_ioctl.c | 4 +--
> drivers/gpu/drm/
Hi Robin,
As Marek said, he posted same patch[1] before so I merged it instead of you.
I totally forgot to merge it. :( Sorry for confusing.
[1]
https://lore.kernel.org/dri-devel/20200707110827.3760-1-m.szyprow...@samsung.com/
Thanks,
Inki Dae
20. 9. 4. 오전 5:51에 Robin Murphy 이(가) 쓴 글:
> Since
https://bugzilla.kernel.org/show_bug.cgi?id=209345
--- Comment #6 from Alexander von Gluck (kallis...@unixzen.com) ---
Created attachment 292557
--> https://bugzilla.kernel.org/attachment.cgi?id=292557&action=edit
tesla k80 patch
--
You are receiving this mail because:
You are watching the ass
https://bugzilla.kernel.org/show_bug.cgi?id=209345
--- Comment #5 from Alexander von Gluck (kallis...@unixzen.com) ---
[ 2208.130049] nouveau: version magic '5.8.10 SMP mod_unload ' should be
'5.8.10-200.fc32.x86_64 SMP mod_unload '
[ 2460.923164] ACPI Warning: \_SB.PCI0.GFX0._DSM: Argument #4 typ
Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/i915/selftests/mock_gem_device.c
between commit:
9f9f4101fc98 ("drm/i915/selftests: Push the fake iommu device from the stack
to data")
from the drm-intel tree and commit:
cd01269d11a3 ("drm/i915/s
On Mon, Sep 21, 2020 at 10:30:57PM +0100, Will Deacon wrote:
> On Sat, Sep 05, 2020 at 01:04:06PM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > NOTE: I have re-ordered the series, and propose that we could merge this
> > series in the following order:
> >
> >1) 01-11 - merge
https://bugzilla.kernel.org/show_bug.cgi?id=209345
--- Comment #4 from Alexander von Gluck (kallis...@unixzen.com) ---
Physical K80 board in my possession. They go for cheap now-a-days on ebay :-)
Memory size (GDDR5): 24GB
CUDA cores: 4992
Number Of GPUs: 2x GK120 GPUs
I'll try adding the nvf2
On Mon, Sep 21, 2020 at 2:31 PM Will Deacon wrote:
>
> On Sat, Sep 05, 2020 at 01:04:06PM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > NOTE: I have re-ordered the series, and propose that we could merge this
> > series in the following order:
> >
> >1) 01-11 - merge via drm /
https://bugzilla.kernel.org/show_bug.cgi?id=209345
Ilia Mirkin (imir...@alum.mit.edu) changed:
What|Removed |Added
CC||imir...@alum.mit.edu
https://bugzilla.kernel.org/show_bug.cgi?id=209345
--- Comment #2 from Alexander von Gluck (kallis...@unixzen.com) ---
Created attachment 292555
--> https://bugzilla.kernel.org/attachment.cgi?id=292555&action=edit
nvidia thunderbolt 3 attachment
logs from attachment
--
You are receiving this
https://bugzilla.kernel.org/show_bug.cgi?id=209345
--- Comment #1 from Alexander von Gluck (kallis...@unixzen.com) ---
lspci -vvn
08:00.0 0302: 10de:102d (rev ff) (prog-if ff)
!!! Unknown header type 7f
Kernel driver in use: nouveau
Kernel modules: nouveau
09:00.0 0302: 1
https://bugzilla.kernel.org/show_bug.cgi?id=209345
Bug ID: 209345
Summary: [nouveau] unknown chipset (0f22d0a1) (nVidia Tesla
K80)
Product: Drivers
Version: 2.5
Kernel Version: 5.8.9
Hardware: x86-64
OS:
Tested-by: Alex Goins
This change fixes a regression with drm_prime_sg_to_page_addr_arrays() and
AMDGPU in v5.9.
Commit 39913934 similarly revamped AMDGPU to use sgtable helper functions. When
it changed from dma_map_sg_attrs() to dma_map_sgtable(), as a side effect it
started correctly updating
So if I understand this correctly, it sounds like that some Pixelbooks boot up
with DP_EDP_BACKLIGHT_BRIGHTNESS_MSB set to a non-zero value, without the
panel actually having DPCD backlight controls enabled?
If I'm understanding that correctly, then this patch looks good to me:
Reviewed-by: Lyude
On Mon, Sep 21, 2020 at 10:53:23PM +0100, Robin Murphy wrote:
> On 2020-09-21 18:57, Will Deacon wrote:
> > On Wed, Sep 16, 2020 at 12:51:05AM +0100, Robin Murphy wrote:
> > > Midgard GPUs have ACE-Lite master interfaces which allows systems to
> > > integrate them in an I/O-coherent manner. It see
On Mon, Sep 21, 2020 at 11:03:49PM +0100, Robin Murphy wrote:
> On 2020-09-21 19:03, Will Deacon wrote:
> > On Fri, Sep 11, 2020 at 07:57:18PM +0530, Sai Prakash Ranjan wrote:
> > > Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the
> > > attributes set in TCR for the page table walker when
> >
On 2020-09-21 19:03, Will Deacon wrote:
On Fri, Sep 11, 2020 at 07:57:18PM +0530, Sai Prakash Ranjan wrote:
Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the
attributes set in TCR for the page table walker when
using system cache.
I wonder if the panfrost folks can reuse this for the issu
On 2020-09-21 18:57, Will Deacon wrote:
On Wed, Sep 16, 2020 at 12:51:05AM +0100, Robin Murphy wrote:
Midgard GPUs have ACE-Lite master interfaces which allows systems to
integrate them in an I/O-coherent manner. It seems that from the GPU's
viewpoint, the rest of the system is its outer shareab
On Tue, Sep 15, 2020 at 3:10 AM Peter Collingbourne wrote:
> On Tue, Jun 9, 2020 at 1:08 PM Linus Walleij wrote:
> >
> > All the functionality in this driver has been reimplemented
> > in the new DRM driver in drivers/gpu/drm/pl111/* and all
> > the boards using it have been migrated to use the D
On Sat, Sep 05, 2020 at 01:04:06PM -0700, Rob Clark wrote:
> From: Rob Clark
>
> NOTE: I have re-ordered the series, and propose that we could merge this
> series in the following order:
>
>1) 01-11 - merge via drm / msm-next
>2) 12-15 - merge via iommu, no dependency on ms
Hi!
> Milo Kim's email in TI bounces with permanent error (550: Invalid
> recipient). Last email from him on LKML was in 2017. Move Milo Kim to
> credits and remove the separate driver entries for:
>
> - TI LP855x backlight driver,
> - TI LP8727 charger driver,
> - TI LP8788 MFD (ADC, LEDs,
Milo Kim's email in TI bounces with permanent error (550: Invalid
recipient). Last email from him on LKML was in 2017. Move Milo Kim to
credits and remove the separate driver entries for:
- TI LP855x backlight driver,
- TI LP8727 charger driver,
- TI LP8788 MFD (ADC, LEDs, charger and regulat
On 9/18/20 12:37 PM, Christoph Hellwig wrote:
>
> +static int gnttab_apply(pte_t *pte, unsigned long addr, void *data)
> +{
> + pte_t ***p = data;
> +
> + **p = pte;
> + (*p)++;
> + return 0;
> +}
> +
> static int arch_gnttab_valloc(struct gnttab_vm_area *area, unsigned
> nr_fr
On Wed, Sep 16, 2020 at 3:22 PM Jason Yan wrote:
> This eliminates the following sparse warning:
>
> drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c:217:15: warning: symbol
> 'vint_table' was not declared. Should it be static?
>
> While at it, make the table const as it is never modified.
>
> Repor
On Sat, Sep 19, 2020 at 06:39:06PM +0100, Matthew Wilcox wrote:
> On Sat, Sep 19, 2020 at 10:18:54AM -0700, Linus Torvalds wrote:
> > On Sat, Sep 19, 2020 at 2:50 AM Thomas Gleixner wrote:
> > >
> > > this provides a preemptible variant of kmap_atomic & related
> > > interfaces. This is achieved b
Applied with fixed up whitespace.
Thanks,
Alex
On Tue, Sep 15, 2020 at 3:45 AM Christian König
wrote:
>
> Am 15.09.20 um 09:18 schrieb Sudheesh Mavila:
> > SMU10_UMD_PSTATE_PEAK_FCLK value should not be used to set the DPM.
> >
> > Change suggested by evan.q...@amd.com
>
> Can't say
On Mon, Sep 21, 2020 at 9:14 AM Bernard Zhao wrote:
>
> Static function dal_ddc_i2c_payloads_destroy is only called
> in dal_ddc_service_query_ddc_data, the parameter is &payloads
> , there is no point NULL risk, so no need to check.
> This change is to make the code run a bit fast.
>
How about j
Applied. Thanks!
Alex
On Mon, Sep 21, 2020 at 9:14 AM Liu Shixin wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Liu Shixin
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc
Applied. Thanks!
Alex
On Mon, Sep 21, 2020 at 9:14 AM Liu Shixin wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Liu Shixin
> ---
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/sws
Applied. Thanks!
Alex
On Mon, Sep 21, 2020 at 9:14 AM Qinglang Miao wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Qinglang Miao
> ---
> drivers/gpu/drm/amd/amdgpu/cik_ih.c | 7 +--
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 ++
> 2 files changed, 3 insertions(
Applied. Thanks!
Alex
On Mon, Sep 21, 2020 at 9:14 AM Qinglang Miao wrote:
>
> Simplify the return expression.
>
> Signed-off-by: Qinglang Miao
> ---
> drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amd
https://bugzilla.kernel.org/show_bug.cgi?id=207901
--- Comment #30 from Lyude Paul (ly...@redhat.com) ---
Hi! Sorry for the long wait, I got distracted with some other work that needed
to be done. Also, sorry for making you buy that adapter since it looks like
things aren't working still. So I too
On Mon, Sep 21, 2020 at 08:17:08PM +0200, Christoph Hellwig wrote:
> On Mon, Sep 21, 2020 at 10:42:56AM -0700, Minchan Kim wrote:
> > IIRC, the problem was runtime pte popluating needs GFP_KERNEL but
> > zs_map_object API runs under non-preemtible section.
>
> Make sense.
>
> > > - area->vm = all
On Mon, 21 Sep 2020, Lyude Paul wrote:
> On Tue, 2020-09-01 at 21:01 +0300, Jani Nikula wrote:
>> I guess we can try without the change, and fix later if we hit issues.
>
> I'm fine with the change if it doesn't break things btw - just as long as
> we're making sure that we don't zero things out b
On Tue, 2020-09-01 at 21:01 +0300, Jani Nikula wrote:
> On Tue, 01 Sep 2020, Lyude Paul wrote:
> > On Tue, 2020-09-01 at 15:32 +0300, Jani Nikula wrote:
> > > In the future, we'll be needing more of the extended receiver capability
> > > field starting at DPCD address 0x2200. (Specifically, we'll
Hi, sorry I lost track of this until just now. Comments down below:
On Fri, 2020-09-11 at 11:44 +0800, Koba Ko wrote:
> As per DP-1.3, First check DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT.
> If DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is 1, read the DP_DP13_DPCD_REV to
> get the faster capability.
> I
On Fri, Sep 11, 2020 at 07:57:18PM +0530, Sai Prakash Ranjan wrote:
> Add a quirk IO_PGTABLE_QUIRK_SYS_CACHE to override the
> attributes set in TCR for the page table walker when
> using system cache.
I wonder if the panfrost folks can reuse this for the issue discussed
over at:
https://lore.ker
On Wed, Sep 16, 2020 at 12:51:05AM +0100, Robin Murphy wrote:
> Midgard GPUs have ACE-Lite master interfaces which allows systems to
> integrate them in an I/O-coherent manner. It seems that from the GPU's
> viewpoint, the rest of the system is its outer shareable domain, and so
> even when snoop s
On Fri, Sep 18, 2020 at 06:37:19PM +0200, Christoph Hellwig wrote:
> There is no obvious reason why zsmalloc needs to pre-fault the PTEs
> given that it later uses map_kernel_range to just like vmap().
IIRC, the problem was runtime pte popluating needs GFP_KERNEL but
zs_map_object API runs under n
Hi,
On 21/09/2020 16:10, Qinglang Miao wrote:
> Simplify the return expression.
>
> Signed-off-by: Qinglang Miao
> ---
> drivers/gpu/drm/omapdrm/dss/hdmi_pll.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
> b/drivers/gpu
Hi Guido,
On Mon, Sep 21, 2020 at 1:56 PM Guido Günther wrote:
>
> We need to reset both for the panel to show an image.
There is a typo in "resets" in the Subject line.
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedeskt
Don't dereference mode which was just NULL checked.
Signed-off-by: Guido Günther
Reported-by: Dan Carpenter
---
drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
b/drivers/gpu/dr
We need to reset both for the panel to show an image.
Signed-off-by: Guido Günther
---
.../bindings/display/panel/mantix,mlaf057we51-x.yaml | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml
The mantix panel needs two reset lines (RESX and TP_RSTN) deasserted to
output an image. Only deasserting RESX is not enough and the display
will stay blank. Deassert in prepare() and assert in unprepare() to keep
device held in reset when off.
Signed-off-by: Guido Günther
---
.../gpu/drm/panel/
Posting as RFC since I'm not sure how to handle the bindings, please see below.
The first patch in this series fixes dereferencing a NULL mode in the error
path. The second one extends the resets to not only reset RESX but also TP_RSTN
since otherwise the display will stay completely blank. I did
On 08/07/2020 01:01, Chun-Kuang Hu wrote:
Hi, Dennis:
Dennis YC Hsieh 於 2020年7月7日 週二 下午11:47寫道：
No need to clear event again since event always clear before wait.
This fix depend on patch:
"soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api"
Acked-by: Chun-Kuang Hu
Pushed no
On 09/07/2020 04:39, Bibby Hsieh wrote:
Hi, Dennis,
Thanks for this patch.
It's better to send another tree for this patch.
Because this tree is only for soc/mediatek.
Please do not forget to add the dependency information.
Normally you are right. This time I took this patch as well into
On Mon, Sep 21, 2020 at 12:39 AM Thomas Gleixner wrote:
>
> If a task is migrated to a different CPU then the mapping address will
> change which will explode in colourful ways.
Heh.
Right you are.
Maybe we really *could* call this new kmap functionality something
like "kmap_percpu()" (or maybe
On Mon, Sep 21, 2020 at 9:10 AM Qais Yousef wrote:
>
> On 09/19/20 12:37, Rob Clark wrote:
> > From: Rob Clark
> >
> > The android userspace treats the display pipeline as a realtime problem.
> > And arguably, if your goal is to not miss frame deadlines (ie. vblank),
> > it is. (See https://lwn.
On 07/07/2020 17:45, Dennis YC Hsieh wrote:
Add clear parameter to let client decide if
event should be clear to 0 after GCE receive it.
Change since v2:
- Keep behavior in drm crtc driver and
separate bug fix code into another patch.
This, should go...
Signed-off-by: Dennis YC Hsieh
On Mon, Sep 21, 2020 at 8:16 AM Rob Clark wrote:
>
> On Mon, Sep 21, 2020 at 2:21 AM Daniel Vetter wrote:
> >
> > On Sat, Sep 19, 2020 at 12:37:23PM -0700, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > The android userspace treats the display pipeline as a realtime problem.
> > > And arguab
On 07/07/2020 17:45, Dennis YC Hsieh wrote:
add write_s function in cmdq helper functions which
writes a constant value to address with large dma
access support.
Signed-off-by: Dennis YC Hsieh
Now pushed to v5.9-next/soc
Thanks!
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 14 ++
On 07/07/2020 17:45, Dennis YC Hsieh wrote:
add write_s_mask function in cmdq helper functions which
writes value contains in internal register to address
with mask and large dma access support.
Signed-off-by: Dennis YC Hsieh
Now pushed to v5.9-next/soc
Thanks!
---
drivers/soc/mediate
On 07/07/2020 17:45, Dennis YC Hsieh wrote:
add write_s_mask_value function in cmdq helper functions which
writes a constant value to address with mask and large dma
access support.
Signed-off-by: Dennis YC Hsieh
Now pushed to v5.9-next/soc
Thanks!
---
drivers/soc/mediatek/mtk-cmdq-he
On 07/07/2020 17:45, Dennis YC Hsieh wrote:
Add read_s function in cmdq helper functions which support read value from
register or dma physical address into gce internal register.
Signed-off-by: Dennis YC Hsieh
Now pushed to v5.9-next/soc
Thanks!
---
drivers/soc/mediatek/mtk-cmdq-help
On 07/07/2020 17:45, Dennis YC Hsieh wrote:
add write_s function in cmdq helper functions which
writes value contains in internal register to address
with large dma access support.
Signed-off-by: Dennis YC Hsieh
Now pushed to v5.9-next/soc
Thanks!
---
drivers/soc/mediatek/mtk-cmdq-help
On 07/07/2020 17:45, Dennis YC Hsieh wrote:
Add address shift when compose jump instruction
to compatible with 35bit format.
Change since v1:
- Rename cmdq_mbox_shift() to cmdq_get_shift_pa().
Signed-off-by: Dennis YC Hsieh
Now pushed to v5.9-next/soc
Thanks!
---
drivers/soc/mediatek
On 21/09/2020 17:32, Chun-Kuang Hu wrote:
Hi, Matthias:
Matthias Brugger 於 2020年9月21日 週一 下午4:53寫道：
On 21/09/2020 01:42, Chun-Kuang Hu wrote:
For each client driver, its timeout handler need to dump hardware register
or its state machine information, so remove timeout handler in helper
fu
On Mon, Sep 21, 2020 at 8:27 AM Akhil P Oommen wrote:
>
> Leave the inuse count intact on map failure to keep the accounting
> accurate.
>
> Signed-off-by: Akhil P Oommen
> ---
> drivers/gpu/drm/msm/msm_gem_vma.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers
On Mon, Sep 21, 2020 at 8:27 AM Akhil P Oommen wrote:
>
> In the case where we have a back-to-back submission that shares the same
> BO, this BO will be prematurely moved to inactive_list while retiring the
> first submit. But it will be still part of the second submit which is
> being processed b
Hi, Matthias:
Matthias Brugger 於 2020年9月21日 週一 下午4:53寫道：
>
>
>
> On 21/09/2020 01:42, Chun-Kuang Hu wrote:
> > For each client driver, its timeout handler need to dump hardware register
> > or its state machine information, so remove timeout handler in helper
> > function and let client driver im
Leave the inuse count intact on map failure to keep the accounting
accurate.
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/msm_gem_vma.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c
b/drivers/gpu/drm/msm/msm_gem_vma.c
index 80a
In the case where we have a back-to-back submission that shares the same
BO, this BO will be prematurely moved to inactive_list while retiring the
first submit. But it will be still part of the second submit which is
being processed by the GPU. Now, if the shrinker happens to be triggered at
this p
On Mon, Sep 21, 2020 at 8:16 AM Rob Clark wrote:
>
> On Mon, Sep 21, 2020 at 2:21 AM Daniel Vetter wrote:
> >
> > On Sat, Sep 19, 2020 at 12:37:23PM -0700, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > The android userspace treats the display pipeline as a realtime problem.
> > > And arguab
On Mon, Sep 21, 2020 at 2:21 AM Daniel Vetter wrote:
>
> On Sat, Sep 19, 2020 at 12:37:23PM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > The android userspace treats the display pipeline as a realtime problem.
> > And arguably, if your goal is to not miss frame deadlines (ie. vblank),
> >
Hi,
On 04/09/2019 23:20, Ilia Mirkin wrote:
>> Implement CTM color management property for OMAP CRTC using DSS
>> overlay manager's Color Phase Rotation matrix. The CPR matrix does not
>> exactly match the CTM property documentation. On DSS the CPR matrix is
>> applied after gamma
On Mon, Sep 21, 2020 at 2:23 AM Daniel Vetter wrote:
>
> On Sat, Sep 19, 2020 at 12:37:25PM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > This will allow us to more easily switch scheduling rules based on what
> > userspace wants.
> >
> > Signed-off-by: Rob Clark
>
> I still think switchin
Just some dead code cleanup.
Signed-off-by: Christian König
---
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h| 1 -
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 30 --
2 files changed, 31 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
b/drivers/gpu/drm/vmwgfx/
Implement in the driver instead since it is the only user of that function.
Signed-off-by: Christian König
---
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 42 ++
drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c | 6 ++--
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h| 4 +++
driver
Hi guys,
The TTM_PL_FLAG_NO_EVICT flag was never a placement flag to begin with. Instead
it affects LRU and eviction handling.
So clean this up and provide the common logic of pinning/unpinning a buffer
object instead.
Since this affects basically all the driver using TTM please comment and/or
As an alternative to the placement flag add a
pin count to the ttm buffer object.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 9 ++---
drivers/gpu/drm/ttm/ttm_bo_util.c | 2 +-
include/drm/ttm/ttm_bo_api.h | 24
3 files changed, 31 i
Stop using TTM_PL_FLAG_NO_EVICT.
Signed-off-by: Christian König
---
drivers/gpu/drm/qxl/qxl_debugfs.c | 2 +-
drivers/gpu/drm/qxl/qxl_drv.h | 1 -
drivers/gpu/drm/qxl/qxl_ioctl.c | 4 +--
drivers/gpu/drm/qxl/qxl_object.c | 44 +--
drivers/gpu/drm/qxl/qxl_obj
Stop using TTM_PL_FLAG_NO_EVICT.
Signed-off-by: Christian König
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 5 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 8 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 5 ++-
driv
Not used any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 40
include/drm/ttm/ttm_bo_api.h | 24 --
2 files changed, 64 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index
Stop using TTM_PL_FLAG_NO_EVICT.
Signed-off-by: Christian König
---
drivers/gpu/drm/vmwgfx/vmwgfx_blit.c | 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 48 +++---
drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c| 4 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c| 2 +-
Not used any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c| 11 +++
include/drm/ttm/ttm_placement.h | 1 -
2 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 1a4b25083326..5737b3fae
Stop using TTM_PL_FLAG_NO_EVICT.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_gem_vram_helper.c | 37 +++
include/drm/drm_gem_vram_helper.h | 3 ---
2 files changed, 9 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c
b/dri
Stop using TTM_PL_FLAG_NO_EVICT.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon.h | 1 -
drivers/gpu/drm/radeon/radeon_display.c | 9 ++
drivers/gpu/drm/radeon/radeon_object.c | 37 ++---
drivers/gpu/drm/radeon/radeon_object.h | 2 +-
driver
Stop using TTM_PL_FLAG_NO_EVICT.
Signed-off-by: Christian König
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 48 +++---
drivers/gpu/drm/nouveau/nouveau_bo.h | 3 --
drivers/gpu/drm/nouveau/nouveau_chan.c | 2 +-
3 files changed, 13 insertions(+), 40 deletions(-)
diff --g
On 2020-09-21 4:40 p.m., Sasha Levin wrote:
From: Michel Dänzer
[ Upstream commit 2f228aab21bbc74e90e267a721215ec8be51daf7 ]
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence drivers must not consult @active in their various
* &dr
From: Jun Lei
[ Upstream commit c4790a8894232f39c25c7c546c06efe074e63384 ]
[why]
Recent characterization shows increased stutter latencies on some SKUs,
leading to underflow.
[how]
Update SOC params to account for this worst case latency.
Signed-off-by: Jun Lei
Acked-by: Aurabindo Pillai
Sig
From: Bhawanpreet Lakha
[ Upstream commit 4cdd7b332ed139b1e37faeb82409a14490adb644 ]
[Why]
Previously we were only calling add_topology when hdcp was being enabled.
Now we call add_topology by default so the ERROR messages are printed if
the firmware is not loaded.
This error message is not rel
From: Jun Lei
[ Upstream commit c4790a8894232f39c25c7c546c06efe074e63384 ]
[why]
Recent characterization shows increased stutter latencies on some SKUs,
leading to underflow.
[how]
Update SOC params to account for this worst case latency.
Signed-off-by: Jun Lei
Acked-by: Aurabindo Pillai
Sig
From: Dennis Li
[ Upstream commit 087d764159996ae378b08c0fdd557537adfd6899 ]
In the resume stage of GPU recovery, start_cpsch will call pm_init
which set pm->allocated as false, cause the next pm_release_ib has
no chance to release ib memory.
Add pm_release_ib in stop_cpsch which will be called
From: Dennis Li
[ Upstream commit 087d764159996ae378b08c0fdd557537adfd6899 ]
In the resume stage of GPU recovery, start_cpsch will call pm_init
which set pm->allocated as false, cause the next pm_release_ib has
no chance to release ib memory.
Add pm_release_ib in stop_cpsch which will be called
From: Bhawanpreet Lakha
[ Upstream commit 875d369d8f75275d30e59421602d9366426abff7 ]
[Why]
DTM topology updates happens by default now. This results in DTM
warnings when hdcp is not even being enabled. This spams the dmesg
and doesn't effect normal display functionality so it is better to log it
From: Michel Dänzer
[ Upstream commit 2f228aab21bbc74e90e267a721215ec8be51daf7 ]
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence drivers must not consult @active in their various
* &drm_mode_config_funcs.atomic_check callback to rej
From: Dennis Li
[ Upstream commit 087d764159996ae378b08c0fdd557537adfd6899 ]
In the resume stage of GPU recovery, start_cpsch will call pm_init
which set pm->allocated as false, cause the next pm_release_ib has
no chance to release ib memory.
Add pm_release_ib in stop_cpsch which will be called
From: Michel Dänzer
[ Upstream commit 2f228aab21bbc74e90e267a721215ec8be51daf7 ]
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence drivers must not consult @active in their various
* &drm_mode_config_funcs.atomic_check callback to rej
Am 21.09.20 um 16:25 schrieb Thomas Zimmermann:
Commit 7053e0eab473 ("drm/vram-helper: stop using TTM placement flags")
cleared the BO placement flags if top-down placement had been selected.
Hence, BOs that were supposed to go into VRAM are now placed in a default
location in system memory.
Try
Hello,
On Mon, Sep 21, 2020 at 11:21:54AM +0200, Daniel Vetter wrote:
> The part I don't like about this is that it all feels rather hacked
> together, and if we add more stuff (or there's some different thing in the
> system that also needs rt scheduling) then it doesn't compose.
>
> So question
First off, I think you all did a fantastic job. I felt that things
ran very smoothly and, as far as the talks themselves go, I think it
went almost as smoothly as an in-person XDC. I'm really quite
impressed. I do have a couple pieces of more nuanced feedback:
1. I think we were maybe a bit to
Hi
Am 17.09.20 um 14:32 schrieb Christian König:
> Am 17.09.20 um 14:29 schrieb Thomas Zimmermann:
>> Hi Christian
>>
>> Am 17.09.20 um 13:12 schrieb Christian König:
>>> Hi Thomas,
>>>
>>> Am 17.09.20 um 12:51 schrieb Thomas Zimmermann:
Hi
Am 24.06.20 um 20:26 schrieb Nirmoy Das:
>
Commit 7053e0eab473 ("drm/vram-helper: stop using TTM placement flags")
cleared the BO placement flags if top-down placement had been selected.
Hence, BOs that were supposed to go into VRAM are now placed in a default
location in system memory.
Trying to scanout the incorrectly pinned BO results i
On Mon, 2020-09-21 at 21:10 +0800, Qinglang Miao wrote:
> Simplify the return expression.
>
> Signed-off-by: Qinglang Miao
> ---
> drivers/gpu/drm/panfrost/panfrost_device.c | 8 +---
> 1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_device.
Hi Bernard,
On Mon, 2020-09-21 at 19:11 +0800, Bernard wrote:
> This change will speed-up a bit these ipu_idmac_get &
> ipu_idmac_put processing and there is no need to protect
> kzalloc & kfree.
I don't think that will be measurable, the channel lock is very unlikely
to be contended. It might ma
1 - 100 of 163 matches
Mail list logo
