Hi
Am 03.07.20 um 08:44 schrieb Sam Ravnborg:
> Hi Thomas.
>
> On Thu, Jul 02, 2020 at 01:50:15PM +0200, Thomas Zimmermann wrote:
>> This is the first patchset to convert ast to use managed interfaces. These
>> patches address modesetting. I expect that there will be at least one more
>> set of p
Hi Sam
Am 03.07.20 um 08:38 schrieb Sam Ravnborg:
> Hi Thomas.
>
> Just browsing code..
>
> On Thu, Jul 02, 2020 at 01:50:27PM +0200, Thomas Zimmermann wrote:
>> Struct ast_crtc has been cleaned up and it's now a wrapper around the
>> DRM CRTC structure struct drm_crtc. This patch converts the d
Hi
thanks for improving the driver.
Am 02.07.20 um 14:54 schrieb Tian Tao:
> fixed the following warning:
> hibmc_drm_drv.c:296:1-18:WARNING: Assignment of 0/1 to bool variable.
> hibmc_drm_drv.c:301:2-19: WARNING: Assignment of 0/1 to bool variable.
>
> Signed-off-by: Tian Tao
> ---
> drivers
Hi Thomas.
On Thu, Jul 02, 2020 at 01:50:15PM +0200, Thomas Zimmermann wrote:
> This is the first patchset to convert ast to use managed interfaces. These
> patches address modesetting. I expect that there will be at least one more
> set of patches for memory management and one for device structur
Hi Thomas.
Just browsing code..
On Thu, Jul 02, 2020 at 01:50:27PM +0200, Thomas Zimmermann wrote:
> Struct ast_crtc has been cleaned up and it's now a wrapper around the
> DRM CRTC structure struct drm_crtc. This patch converts the driver to
> struct drm_crtc and removes struct ast_crtc.
>
> Si
On 7/2/20 2:14 PM, James Jones wrote:
On 7/2/20 1:22 AM, Daniel Stone wrote:
Hi,
On Wed, 1 Jul 2020 at 20:45, James Jones wrote:
OK, I think I see what's going on. In the Xorg modesetting driver, the
logic is basically:
if (gbm_has_modifiers && DRM_CAP_ADDFB2_MODIFIERS != 0) {
drmModeAd
Hi Ondrej.
> > My bot found errors running 'make dt_binding_check' on your patch:
> >
> > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/nwl-dsi.example.dt.yaml:
> > panel@0: '#address-cells', '#size-cells', 'port@0' do not match any of the
> > regexes: 'pin
Hi Yannick,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.8-rc3 next-20200702]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https
Hi all,
Today's linux-next merge of the kspp tree got a conflict in:
drivers/gpu/drm/drm_edid.c
between commit:
948de84233d3 ("drm : Insert blank lines after declarations.")
from the drm-misc tree and commit:
80b89ab785a4 ("treewide: Remove uninitialized_var() usage")
from the kspp tre
Hi Vinay,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v5.8-rc3 next-20200702]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
Hey Linus,
Pretty usual rc4 pull, two usual amdgpu, i915 pulls, and some misc arm
driver fixes.
The bigger bit is including the asm sources for some GPU shaders that
were contained in the i915 driver, otherwise it's pretty much business
as usual.
Dave.
drm-fixes-2020-07-03:
drm fixes for 5.8-rc4
Hi Tomasz,
On Fri, Jun 19, 2020 at 01:06:55PM +, Tomasz Figa wrote:
> On Fri, May 22, 2020 at 01:52:01AM +0200, Niklas Söderlund wrote:
> > Bayer formats are used with cameras and contain green, red and blue
> > components, with alternating lines of red and green, and blue and green
> > pixels
Hi Emil,
On Thu, May 28, 2020 at 04:36:59PM +0100, Emil Velikov wrote:
> On Fri, 22 May 2020 at 07:56, Niklas Söderlund wrote:
> >
> > Bayer formats are used with cameras and contain green, red and blue
> > components, with alternating lines of red and green, and blue and green
> > pixels in diffe
Hi Sakari,
On Mon, May 25, 2020 at 01:31:43PM +0300, Sakari Ailus wrote:
> On Fri, May 22, 2020 at 01:52:01AM +0200, Niklas Söderlund wrote:
> > Bayer formats are used with cameras and contain green, red and blue
> > components, with alternating lines of red and green, and blue and green
> > pixel
From: Wei Yongjun
Date: Thu, 2 Jul 2020 17:18:10 +0800
> In certain configurations without power management support, gcc report
> the following warning:
>
> drivers/net/ethernet/micrel/ksz884x.c:7182:12: warning:
> 'pcidev_suspend' defined but not used [-Wunused-function]
> 7182 | static int p
On 7/2/20 1:22 AM, Daniel Stone wrote:
Hi,
On Wed, 1 Jul 2020 at 20:45, James Jones wrote:
OK, I think I see what's going on. In the Xorg modesetting driver, the
logic is basically:
if (gbm_has_modifiers && DRM_CAP_ADDFB2_MODIFIERS != 0) {
drmModeAddFB2WithModifiers(..., gbm_bo_get_modif
On Wed, 01 Jul 2020 18:29:17 +0200, Ondrej Jirman wrote:
> Convert Rocktech MIPI DSI panel driver from txt to yaml bindings.
>
> Signed-off-by: Ondrej Jirman
> ---
> .../display/panel/rocktech,jh057n00900.txt| 23 ---
> .../display/panel/rocktech,jh057n00900.yaml | 66 +
On Thu, 2020-07-02 at 17:40 +0300, Ville Syrjälä wrote:
> On Tue, Jun 30, 2020 at 11:42:36PM +, Souza, Jose wrote:
> > On Wed, 2020-05-27 at 16:03 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Apparently EDIDs with multiple DispID ext blocks is a thing, so prepare
> > > fo
https://bugzilla.kernel.org/show_bug.cgi?id=207901
--- Comment #22 from Lyude Paul (ly...@redhat.com) ---
Hi! Sorry this took me a little bit to reply to. So-it looks like we did indeed
fix the i2c timeout issue that I was seeing on your board, so the next
suspicious thing in your log seems to be
Neil Armstrong writes:
> Amlogic uses a proprietary lossless image compression protocol and format
> for their hardware video codec accelerators, either video decoders or
> video input encoders.
>
> It considerably reduces memory bandwidth while writing and reading
> frames in memory.
>
> The und
to drm-next (2020-06-24 15:45:51
+1000)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2020-07-02
for you to fetch changes up to d524b87f77364db096855d7eb714ffacec974ddf:
drm/i915: Update DRIVER_DATE to 202
On Fri, Jun 12, 2020 at 01:41:17PM -0400, Alex Deucher wrote:
> On Fri, Jun 12, 2020 at 1:24 PM Harry Wentland wrote:
> >
> > On 2020-06-12 12:00 p.m., Daniel Vetter wrote:
> > > Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
> > > which means vblank state isn't ill-define
On Thu, Jul 02, 2020 at 04:50:32PM +0200, Christian König wrote:
> Am 02.07.20 um 15:29 schrieb Jason Gunthorpe:
> > On Thu, Jul 02, 2020 at 03:10:00PM +0200, Daniel Vetter wrote:
> > > On Wed, Jul 01, 2020 at 02:15:24PM -0300, Jason Gunthorpe wrote:
> > > > On Wed, Jul 01, 2020 at 05:42:21PM +0200
On Thu, Jul 02, 2020 at 05:11:25PM +0200, Neil Armstrong wrote:
> Hi,
>
> On 02/07/2020 16:15, Daniel Vetter wrote:
> > On Thu, Jul 2, 2020 at 3:34 PM Neil Armstrong
> > wrote:
> >>
> >> On 02/07/2020 15:18, Daniel Vetter wrote:
> >>> On Thu, Jul 02, 2020 at 09:23:11AM +, Simon Ser wrote:
>
On Thu, Jul 02, 2020 at 06:53:32PM +0530, Suraj Upadhyay wrote:
> Resolve checkpatch issues for missing blank lines after declarations.
> Issues found in multiple files with checkpatch.pl.
>
> Signed-off-by: Suraj Upadhyay
> ---
> Contributor comments : Hii developers, I am a new contributor to l
This patch adds registration of a child platform device for the exynos
interconnect driver. It is assumed that the interconnect provider will
only be needed when #interconnect-cells property is present in the bus
DT node, hence the child device will be created only when such a property
is present.
This patch adds interconnect support to exynos-mixer. The mixer works
the same as before when CONFIG_INTERCONNECT is 'n'.
For proper operation of the video mixer block we need to ensure the
interconnect busses like DMC or LEFTBUS provide enough bandwidth so
as to avoid DMA buffer underruns in the
This patch adds a generic interconnect driver for Exynos SoCs in order
to provide interconnect functionality for each "samsung,exynos-bus"
compatible device.
The SoC topology is a graph (or more specifically, a tree) and its
edges are specified using the 'samsung,interconnect-parent' in the
DT. Du
From: Artur Świgoń
This patch adds an 'interconnects' property to Exynos4412 DTS in order to
declare the interconnect path used by the mixer. Please note that the
'interconnect-names' property is not needed when there is only one path in
'interconnects', in which case calling of_icc_get() with a
This patch adds the following properties for Exynos4412 interconnect
bus nodes:
- samsung,interconnect-parent: to declare connections between
nodes in order to guarantee PM QoS requirements between nodes,
- #interconnect-cells: required by the interconnect framework,
- bus-width: the bus widt
Add documentation for new optional properties in the exynos bus nodes:
samsung,interconnect-parent, #interconnect-cells, bus-width.
These properties allow to specify the SoC interconnect structure which
then allows the interconnect consumer devices to request specific
bandwidth requirements.
Signe
This patchset adds interconnect API support for the Exynos SoC "samsung,
exynos-bus" compatible devices, which already have their corresponding
exynos-bus driver in the devfreq subsystem. Complementing the devfreq
driver with an interconnect functionality allows to ensure the QoS
requirements of d
Hi Vinay,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v5.8-rc3 next-20200702]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
Hi,
On 02/07/2020 16:15, Daniel Vetter wrote:
> On Thu, Jul 2, 2020 at 3:34 PM Neil Armstrong wrote:
>>
>> On 02/07/2020 15:18, Daniel Vetter wrote:
>>> On Thu, Jul 02, 2020 at 09:23:11AM +, Simon Ser wrote:
On Thursday, July 2, 2020 9:47 AM, Neil Armstrong
wrote:
> Final
Am 02.07.20 um 15:29 schrieb Jason Gunthorpe:
On Thu, Jul 02, 2020 at 03:10:00PM +0200, Daniel Vetter wrote:
On Wed, Jul 01, 2020 at 02:15:24PM -0300, Jason Gunthorpe wrote:
On Wed, Jul 01, 2020 at 05:42:21PM +0200, Daniel Vetter wrote:
All you need is the ability to stop wait for ongoing acce
On 2020-06-30 at 12:48:34 -0400, Sean Paul wrote:
> On Tue, Jun 30, 2020 at 10:21 AM Anshuman Gupta
> wrote:
> >
> > On 2020-06-23 at 21:29:05 +0530, Sean Paul wrote:
> > Hi Sean,
> > I am new to DP MST stuff, I am looking to DP MST spec DP v1.2a.
> > I have looked the entire series, i will take u
On Tue, Jun 30, 2020 at 11:42:36PM +, Souza, Jose wrote:
> On Wed, 2020-05-27 at 16:03 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Apparently EDIDs with multiple DispID ext blocks is a thing, so prepare
> > for iterating through multiple ext blocks of the same type by
> > pass
On 02.07.2020 14:33, Georgi Djakov wrote:
> On 7/2/20 15:01, Sylwester Nawrocki wrote:
>> On 01.07.2020 14:50, Georgi Djakov wrote:
>>> On 5/29/20 19:31, Sylwester Nawrocki wrote:
+static int exynos_generic_icc_remove(struct platform_device *pdev)
+{
+ struct exynos_icc_priv *priv
On 14.05.2020 13:30, Vincent Whitchurch wrote:
> If adv7511's devm_clk_get() for the cec clock returns -EPROBE_DEFER, we
> end up in an infinite probe loop. This happens:
>
> (1) adv7511's probe is called.
>
> (2) adv7511's probe adds some secondary i2c devices which bind to the
> dummy dr
On Thu, Jul 2, 2020 at 3:34 PM Neil Armstrong wrote:
>
> On 02/07/2020 15:18, Daniel Vetter wrote:
> > On Thu, Jul 02, 2020 at 09:23:11AM +, Simon Ser wrote:
> >> On Thursday, July 2, 2020 9:47 AM, Neil Armstrong
> >> wrote:
> >>
> >>> Finally is also adds the Scatter Memory layout, meaning
Hi Daniel
Am 02.07.20 um 15:16 schrieb Daniel Vetter:
> On Thu, Jul 02, 2020 at 09:21:54AM +0800, Tian Tao wrote:
>> using the new API drmm_kzalloc() instead of devm_kzalloc()
>>
>> Signed-off-by: Tian Tao
>> ---
>> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 3 ++-
>> 1 file changed, 2 in
/sys/kernel/debug/devices_deferred property contains list of deferred devices.
This list does not contain reason why the driver deferred probe, the patch
improves it.
The natural place to set the reason is dev_err_probe function introduced
recently, ie. if dev_err_probe will be called with -EPROBE_
On 02/07/2020 15:18, Daniel Vetter wrote:
> On Thu, Jul 02, 2020 at 09:23:11AM +, Simon Ser wrote:
>> On Thursday, July 2, 2020 9:47 AM, Neil Armstrong
>> wrote:
>>
>>> Finally is also adds the Scatter Memory layout, meaning the header contains
>>> IOMMU
>>> references to the compressed fram
On Thu, Jul 02, 2020 at 09:23:11AM +, Simon Ser wrote:
> On Thursday, July 2, 2020 9:47 AM, Neil Armstrong
> wrote:
>
> > Finally is also adds the Scatter Memory layout, meaning the header contains
> > IOMMU
> > references to the compressed frames content to optimize memory access
> > and l
On Thu, Jul 02, 2020 at 09:21:54AM +0800, Tian Tao wrote:
> using the new API drmm_kzalloc() instead of devm_kzalloc()
>
> Signed-off-by: Tian Tao
> ---
> drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/h
On Wed, Jul 01, 2020 at 03:31:34PM +, Sidong Yang wrote:
> there is an error when igt test is run continuously. vkms_atomic_commit_tail()
> need to call drm_atomic_helper_wait_for_vblanks() for give up ownership of
> vblank events. without this code, next atomic commit will not enable vblank
>
On Wed, Jul 01, 2020 at 02:15:24PM -0300, Jason Gunthorpe wrote:
> On Wed, Jul 01, 2020 at 05:42:21PM +0200, Daniel Vetter wrote:
> > > >> All you need is the ability to stop wait for ongoing accesses to end
> > > >> and
> > > >> make sure that new ones grab a new mapping.
> > > > Swap and flush i
Am 25.06.20 um 15:59 schrieb Daniel Vetter:
On Thu, Jun 25, 2020 at 3:23 PM Lionel Landwerlin
wrote:
On 25/06/2020 16:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2020-06-25 13:34:43)
There was probably a misunderstand on how the dma-fence-chain is
supposed to work or what dma_fence_cha
On 2/29/20 11:16 PM, Marek Vasut wrote:
> Add missing pm_runtime_get_sync() into ltdc_crtc_atomic_enable() to
> match pm_runtime_put_sync() in ltdc_crtc_atomic_disable(), otherwise
> the LTDC might suspend via runtime PM, disable clock, and then fail
> to resume later on.
>
> The test which trig
On 7/1/20 2:04 PM, Yannick Fertre wrote:
> It is not necessary to suspend or stop the ltdc clocks
> to modify the pixel clock.
>
> Signed-off-by: Yannick Fertre
> ---
> drivers/gpu/drm/stm/ltdc.c | 16
> 1 file changed, 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/stm/
On 7/1/20 3:22 AM, Dmitry Osipenko wrote:
30.06.2020 13:26, Mikko Perttunen пишет:
On 6/29/20 10:42 PM, Dmitry Osipenko wrote:
Secondly, I suppose neither GPU, nor DLA could wait on a host1x sync
point, correct? Or are they integrated with Host1x HW?
They can access syncpoints directly. (Th
Hi Georgi,
On 01.07.2020 14:50, Georgi Djakov wrote:
> Thanks for the patch and apologies for the delayed reply.
Thanks, no problem. It's actually just in time as I put that patchset
aside for a while and was just about to post an update.
> On 5/29/20 19:31, Sylwester Nawrocki wrote:
>> This pa
Cursor image and checksum go hand in hand. Update both in the same
place. The helper cannot fail, so remove the return type.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_cursor.c | 24 +---
1 file changed, 5 insertions(+), 19 deletions(-)
diff --git a/drivers
Struct ast_crtc has been cleaned up and it's now a wrapper around the
DRM CRTC structure struct drm_crtc. This patch converts the driver to
struct drm_crtc and removes struct ast_crtc.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_drv.h | 5 -
drivers/gpu/drm/ast/ast_mode.c
Register a release function to finalize cursors. The _fini() function
gets un-exported from the source file.
The function ast_mode_fini() is now empty and will be removed by a
later patch.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_cursor.c | 38 ++-
As the inverse to ast_cursor_show(), ast_cursor_hide() disables the
HW cursor.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_cursor.c | 5 +
drivers/gpu/drm/ast/ast_drv.h| 1 +
drivers/gpu/drm/ast/ast_mode.c | 2 +-
3 files changed, 7 insertions(+), 1 deletion(-)
diff -
This is the first patchset to convert ast to use managed interfaces. These
patches address modesetting. I expect that there will be at least one more
set of patches for memory management and one for device structures.
Patches 1 to 11 tackle HW cursor handling. The overall point is to get
cursor su
Using drmm_mode_config_init() sets up managed release of modesetting
resources. The existing modesetting's finalizer is empty, so remove it.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_drv.h | 1 -
drivers/gpu/drm/ast/ast_main.c | 6 +++---
drivers/gpu/drm/ast/ast_mode.c | 4 --
There's modesetting init code in ast_main.c. Move it to ast_mode.c and
merge it with the modesetting init code in ast_mode_init(). The result
is ast_mode_config_init(), which initalizes the whole modesetting.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_drv.h | 2 +-
drivers/gp
The cursor helpers reserve buffer objects in VRAM and update their
content. So although tied to modesetting, cursor helpers are more
of a memory manager. The modesetting's cursor plane requires this
functionality, so initialize cursors before modesetting.
While at it, also add an error check for a
Updating the image in a cursor's HW BO requires a mapping of the BO's
buffer in the kernel's address space. Cursor image updates can happen
frequently and create CPU overhead.
As cursor HW BOs are small and never move, they are now map exactly
once during the initialization and the mapping is used
The ast_cursor_show() helper enables the cursor to be displayed. No need
to repeat that operation in the plane's atomic-update function.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_mode.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/d
Removes some typecasting.
v2:
* use to_ast_private() instead of struct drm_device.dev_private
Signed-off-by: Thomas Zimmermann
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/ast/ast_cursor.c | 7 +++
drivers/gpu/drm/ast/ast_drv.h| 4 ++--
drivers/gpu/drm/ast/ast_mode.c | 6 --
The new helper ast_cursor_page_flip() switches the cursor's front and
back BOs. This simplifies the cursor plane's update helper.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_cursor.c | 20 +++-
drivers/gpu/drm/ast/ast_drv.h| 2 +-
drivers/gpu/drm/ast/ast_mod
The cursor manipulation functions are unrelated to modesetting. Move
them into their own file.
Signed-off-by: Thomas Zimmermann
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/ast/Makefile | 3 +-
drivers/gpu/drm/ast/ast_cursor.c | 218 +++
drivers/gpu/drm/ast/ast_d
Having a cursor move function is misleading, as it actually enables the
cursor's image for displaying. So rename it to ast_cursor_show(). It's
semantics is to show a cursor at the specified location on the screen.
The displayed cursor is always the image in the cursor front BO.
This change also si
The new helper ast_cursor_blit() updates a cursor's backbuffer HW
BO from a framebuffer structure. The cursor plane's prepare_fb()
function now uses the new interface.
Pinning and mapping of BOs is done automatically by the helper. This
includes the source BO, which was not pinned by the original
Hi Sam
Am 24.06.20 um 08:24 schrieb Thomas Zimmermann:
> Hi Sam
>
> Am 23.06.20 um 18:55 schrieb Sam Ravnborg:
>> Hi Thomas.
>>
>> On Tue, Jun 23, 2020 at 10:18:48AM +0200, Thomas Zimmermann wrote:
>>> The cursor manipulation functions are unrelated to modesetting. Move
>>> them into their own fi
On Thu, Jul 2, 2020 at 1:27 PM Laurent Pinchart
wrote:
>
> Hi Daniel,
>
> Thank you for the patch.
>
> On Fri, Jun 12, 2020 at 06:00:49PM +0200, Daniel Vetter wrote:
> > Only when vblanks are supported ofc.
> >
> > Some drivers do this already, but most unfortunately missed it. This
> > opens up b
Hi Daniel,
Thank you for the patch.
On Fri, Jun 12, 2020 at 06:00:49PM +0200, Daniel Vetter wrote:
> Only when vblanks are supported ofc.
>
> Some drivers do this already, but most unfortunately missed it. This
> opens up bugs after driver load, before the crtc is enabled for the
> first time. s
The new field 'dma_range_map' in struct device is used to facilitate the
use of single or multiple offsets between mapping regions of cpu addrs and
dma addrs. It subsumes the role of "dev->dma_pfn_offset" which was only
capable of holding a single uniform offset and had no region bounds
checking.
On 26/06/2020 13:01, Andrzej Hajda wrote:
During probe every time driver gets resource it should usually check for
error printk some message if it is not -EPROBE_DEFER and return the error.
This pattern is simple but requires adding few lines after any resource
acquisition code, as a result it
Patchset Summary:
Enhance a PCIe host controller driver. Because of its unusual design
we are foced to change dev->dma_pfn_offset into a more general role
allowing multiple offsets. See the 'v1' notes below for more info.
v6:
Commit "device core: Introduce DMA range map":
-- of_dma_get
Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Signed-off-by: Rajendra Nayak
Reviewed-by: Matthias Kaehlcke
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 49
Changes in v2
- Patch 2: Dropped dsi_link_clk_set_rate_6g_v2 and dsi_link_clk_disable_6g_v2
as suggested by Matthias
These patches add DVFS support for DPU and DSI.
These patches have no other dependency. Patch 1 and 2 will need to be merged in
via the MSM DRM tree.
DT patches will need to land
On some qualcomm platforms DPU needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.
Signed-off-by: Rajendra Nayak
Reviewed-by: Rob Clark
Revie
On SDM845 and SC7180 DSI needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.
dev_pm_opp_set_rate() is designed to be equivalent to clk_set_rate
Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Signed-off-by: Rajendra Nayak
Reviewed-by: Matthias Kaehlcke
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 59
https://bugzilla.kernel.org/show_bug.cgi?id=208413
--- Comment #1 from ghutzr...@gmail.com ---
Created attachment 290065
--> https://bugzilla.kernel.org/attachment.cgi?id=290065&action=edit
other dmesg from hang
--
You are receiving this mail because:
You are watching the assignee of the bug.
https://bugzilla.kernel.org/show_bug.cgi?id=208413
Bug ID: 208413
Summary: amdgpu driver crash
Product: Drivers
Version: 2.5
Kernel Version: 5.8
Hardware: All
OS: Linux
Tree: Mainline
Status: NEW
Hi,
On 30/06/2020 23:27, Anitha Chrisanthus wrote:
> This is a new DRM driver for Intel's KeemBay SOC.
> The SoC couples an ARM Cortex A53 CPU with an Intel
> Movidius VPU.
>
> This driver is tested with the KMB EVM board which is the refernce baord
> for Keem Bay SOC. The SOC's display pipeline
https://bugzilla.kernel.org/show_bug.cgi?id=208411
Bug ID: 208411
Summary: GPU reset end with ret = -110
Product: Drivers
Version: 2.5
Kernel Version: Mainline 5.7.6
Hardware: x86-64
OS: Linux
Tree: Mainline
Thanks!
Am 02.07.20 um 10:54 schrieb Tian Tao:
> code refactoring for hibmc_drv_vdac.c, no actual function changes.
>
> v2:
> remove the debug message.
>
> v3:
> embedding connector and encoder in struct hibmc_drm_private.
>
> Signed-off-by: Tian Tao
Reviewed-by: Thomas Zimmermann
Maybe oth
On Thu, 2020-07-02 at 11:41 +0200, Daniel Vetter wrote:
> On Wed, Jun 24, 2020 at 9:25 AM Daniel Vetter wrote:
> > On Fri, Jun 12, 2020 at 06:00:51PM +0200, Daniel Vetter wrote:
> > > Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
> > > which means vblank state isn't ill-d
On 7/1/20 2:14 PM, Yannick FERTRE wrote:
>
>
> On 3/9/20 12:57 PM, Marek Vasut wrote:
>> On 3/9/20 11:35 AM, Yannick FERTRE wrote:
>>> Hello Marek,
>>
>> Hi,
>>
>> (please stop top-posting)
>>
>>> Thank for your patch. Pm_runtime_put_sync is also done into function
>>> ltdc_crtc_mode_fixup.
>>
On Wed, Jun 24, 2020 at 9:25 AM Daniel Vetter wrote:
>
> On Fri, Jun 12, 2020 at 06:00:51PM +0200, Daniel Vetter wrote:
> > Now also comes with the added benefit of doing a drm_crtc_vblank_off(),
> > which means vblank state isn't ill-defined and fail-y at driver load
> > before the first modeset
On Thursday, July 2, 2020 9:47 AM, Neil Armstrong
wrote:
> Finally is also adds the Scatter Memory layout, meaning the header contains
> IOMMU
> references to the compressed frames content to optimize memory access
> and layout.
>
> In this mode, only the header memory address is needed, thus t
On 7/1/2020 9:57 PM, Matthias Kaehlcke wrote:
On Tue, Jun 30, 2020 at 05:26:14PM +0530, Rajendra Nayak wrote:
On SDM845 DSI needs to express a perforamnce state
nit: performance
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework
On 20/06/2020 17:57, Martin Blumenstingl wrote:
> The burst length is configured in VIU_OSD1_FIFO_CTRL_STAT[31] and
> VIU_OSD1_FIFO_CTRL_STAT[11:10]. The public S905D3 datasheet describes
> this as:
> - 0x0 = up to 24 per burst
> - 0x1 = up to 32 per burst
> - 0x2 = up to 48 per burst
> - 0x3 = up
Am 02.07.20 um 10:26 schrieb Lionel Landwerlin:
On 25/06/2020 15:43, Christian König wrote:
Am 25.06.20 um 14:34 schrieb Lionel Landwerlin:
This reverts commit 5de376bb434f80a13138f0ebedc8351ab73d8b0d.
This change breaks synchronization of a timeline.
dma_fence_chain_find_seqno() might be a bi
Thanks! Applied to drm-misc-next
Best regards
Thomas
Am 02.07.20 um 09:49 schrieb Tian Tao:
> using the new API drmm_kzalloc() instead of devm_kzalloc()
>
> v3:
> still fixed include statements sorted alphabetically.
>
> v2:
> keep the DRM include statements sorted alphabetically.
>
> Signed-o
On 25/06/2020 15:43, Christian König wrote:
Am 25.06.20 um 14:34 schrieb Lionel Landwerlin:
This reverts commit 5de376bb434f80a13138f0ebedc8351ab73d8b0d.
This change breaks synchronization of a timeline.
dma_fence_chain_find_seqno() might be a bit of a confusing name but
this function is not tr
Hi,
On Wed, 1 Jul 2020 at 20:45, James Jones wrote:
> OK, I think I see what's going on. In the Xorg modesetting driver, the
> logic is basically:
>
> if (gbm_has_modifiers && DRM_CAP_ADDFB2_MODIFIERS != 0) {
>drmModeAddFB2WithModifiers(..., gbm_bo_get_modifier(bo->gbm));
> } else {
>drm
Hi Emil.
Long overdue feedback, I did not find time to go back to this patch-set
until now.
On Tue, Jun 02, 2020 at 03:04:39PM +0100, Emil Velikov wrote:
> Hi Sam,
>
> On Mon, 1 Jun 2020 at 07:52, Sam Ravnborg wrote:
> >
> > v3:
> > - Dropped video patch that was reviewd and thus applied
> >
On Wed, 1 Jul 2020 12:45:48 -0700
James Jones wrote:
> OK, I think I see what's going on. In the Xorg modesetting driver, the
> logic is basically:
>
> if (gbm_has_modifiers && DRM_CAP_ADDFB2_MODIFIERS != 0) {
>drmModeAddFB2WithModifiers(..., gbm_bo_get_modifier(bo->gbm));
> } else {
>
Hi Dave and Daniel,
here's the PR for the current drm-misc-fixes.
Best regards
Thomas
drm-misc-fixes-2020-07-02:
* dma-buf: fix a use-after-free bug
* sun4i: remove HPD polling
The following changes since commit dc5bdb68b5b369d5bc7d1de96fa64cc1737a6320:
drm/fb-helper: Fix vt restore (2020-
Since the VD1 Amlogic FBC decoder is now configured by the overlay driver,
commit the right registers to decode the Amlogic FBC frame.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_crtc.c | 118 +
1 file changed, 88 insertions(
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use
read the FBC header as Scatter Memory layout reference.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_overlay.c | 53 ++-
1 file changed, 35 insertions(+), 18 del
Add the registers of the VPU VD1 Amlogic FBC decoder module, and routing
register.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_registers.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/meson/meson_registers.
Setup the Amlogic FBC decoder for the VD1 video overlay plane to use
a different superblock size for the Memory Saving mode.
Tested-by: Kevin Hilman
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_overlay.c | 25 +++--
1 file changed, 23 insertions(+), 2 deleti
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