We forgot one call site directly using drm->dev_private.
This leads to a crash like this:
8<--- cut here ---
Unable to handle kernel NULL pointer dereference at virtual address 0918
pgd = (ptrval)
[0918] *pgd=
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 1 Co
The following bug appeared in the MCDE driver/display
initialization during the recent merge window.
First the place we call drm_fbdev_generic_setup() in the
wrong place: this needs to be called AFTER calling
drm_dev_register() else we get this splat:
[ cut here ]
WARNING
Hello Andy,
On Fri, Jun 12, 2020 at 02:57:32PM +0300, Andy Shevchenko wrote:
> On Fri, Jun 12, 2020 at 12:12:42AM +0200, Uwe Kleine-König wrote:
> > I didn't follow the complete discussion but note that the general rule
> > is:
> >
> > round period down to the next possible implementable peri
On 6/12/20 11:00 AM, Daniel Vetter wrote:
The atomic helpers try really hard to not lose track of things,
duplicating enabled tracking in the driver is at best confusing.
Double-enabling or disabling is a bug in atomic helpers.
In the fb_dirty function we can just assume that the fb always exist
Hi Kamlesh,
I love your patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on drm-intel/for-linux-next linus/master v5.7
next-20200613]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also
Am 13.06.20 um 14:28 schrieb Xiyu Yang:
ttm_bo_vm_fault_reserved() invokes dma_fence_get(), which returns a
reference of the specified dma_fence object to "moving" with increased
refcnt.
When ttm_bo_vm_fault_reserved() returns, local variable "moving" becomes
invalid, so the refcount should be d
On 09/06/2020 18:26, Tomi Valkeinen wrote:
On 09/06/2020 18:19, Tony Lindgren wrote:
But there's an extra runtime PM reference (dev.power.usage_count) that seems
to come out of nowhere. So when omap_drm_suspend is finished, there's still
usage_count of 1, and dispc never suspends fully.
Hmm
Den 12.06.2020 18.00, skrev Daniel Vetter:
> Same patch as the mipi-dbi one, atomic tracks this for us already, we
> just have to check the right thing.
>
> Signed-off-by: Daniel Vetter
> Cc: "Noralf Trønnes"
> ---
Reviewed-by: Noralf Trønnes
___
d
Den 12.06.2020 18.00, skrev Daniel Vetter:
> The atomic helpers try really hard to not lose track of things,
> duplicating enabled tracking in the driver is at best confusing.
> Double-enabling or disabling is a bug in atomic helpers.
>
> In the fb_dirty function we can just assume that the fb a
On Fri, Jun 5, 2020 at 1:07 PM Álvaro Fernández Rojas wrote:
>
> MTD_OPS_AUTO_OOB is writting OOB with ECC enabled, which changes all ECC bytes
> from an erased page to 0x00 when JFFS2 cleanmarkers are added with mtd-utils.
> | BBI | JFFS2 | ECC | JFFS2 | Spare |
> 0800
Make the necessary changes to the DP driver to use the qmp phy from the
common phy framework instead of rolling our own in the drm subsystem.
This also removes the PLL code and adds proper includes so things build.
Cc: Jeykumar Sankaran
Cc: Chandan Uddaraju
Cc: Vara Reddy
Cc: Tanmay Shah
Cc: B
Both patches are Reviewed-by: Alyssa Rosenzweig
On Thu, Jun 11, 2020 at 10:58:43AM +0200, Tomeu Vizoso wrote:
> Bifrost devices do support the flush reduction feature, so on first job
> submit we were trying to read the register while still powered off.
>
> If the GPU is powered off, the feature
The vc4_crtc_data structure is currently storing data related to both the
general CRTC information needed by the rest of the vc4 driver (like HVS
output and available FIFOs) and some related to the pixelvalve attached to
that CRTC. Let's split this into two structures so that we can reuse the
CRTC
Hi,
On 18/5/20 19:39, Enric Balletbo i Serra wrote:
> The reason for this resend is because I forget to add some bridge
> maintainers. So adding them and collect the actual tags.
>
> The mtk-dpi driver still uses the drm_encoder API which is now somewhat
> deprecated. We started to move all the M
On Fri, Jun 12, 2020 at 12:12:42AM +0200, Uwe Kleine-König wrote:
> On Mon, Jun 08, 2020 at 01:07:12PM +0200, Hans de Goede wrote:
> > On 6/8/20 5:50 AM, Andy Shevchenko wrote:
> > > On Sun, Jun 07, 2020 at 08:18:28PM +0200, Hans de Goede wrote:
> > > > When the user requests a high enough period n
Quoting Douglas Anderson (2020-06-08 10:48:34)
> This fixes a kernel doc warning due to a typo:
> warning: Function parameter or member 'ln_polrs' not described in
> 'ti_sn_bridge'
>
> Fixes: 5bebaeadb30e ("drm/bridge: ti-sn65dsi86: Implement lane reordering +
> polarity")
> Signed-off-by: Dou
Quoting Douglas Anderson (2020-06-08 10:48:33)
> When building we were getting an error:
>
> warning: cannot understand function prototype:
> 'const unsigned int ti_sn_bridge_dp_rate_lut[] = '
>
> Arrays aren't supposed to be marked with "/**" kerneldoc comments. Fix.
>
> Fixes: a095f15c0
> Function msm_gpu_crashstate_capture maybe called for several
> times, and then the state->bos is a potential memleak. Also
> the state->pos maybe alloc failed, but now without any handle.
> This change is to fix some potential memleak and add error
> handle when alloc failed.
I suggest to improv
We'll need the HVS to be bound before the HVS for the upcoming reworks, but
it needs to happen before the PV are bound so that the code to set the
possible_crtcs field works properly on the TXP. Move it right between the
two devices.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_drv.c
The CRTC in vc4 is backed by two devices, the HVS that does the composition
and the PixelValve that does the timing generation.
The writeback is kind of a special case since it doesn't have an associated
pixelvalve but goes straight from the HVS to the TXP. Therefore, it makes
sense to move out th
Add the CDTech Electronics displays S070PWS19HP-FC21 (7.0" WSVGA) and
S070SWV29HG-DC44 (7.0" WVGA) to the panel-simple compatible list.
Signed-off-by: Matthias Schiffer
---
v2: no changes
.../devicetree/bindings/display/panel/panel-simple.yaml | 4
1 file changed, 4 insertions(+)
d
Hi,
On Fri, Jun 12, 2020 at 06:10:05PM +0300, Laurent Pinchart wrote:
> On Fri, Jun 12, 2020 at 05:00:32PM +0200, Jacopo Mondi wrote:
> > On Tue, Jun 09, 2020 at 04:29:59PM +0200, Eugeniu Rosca wrote:
> > > On Sun, Jun 07, 2020 at 05:41:58AM +0300, Laurent Pinchart wrote:
> > > > Note that the CMM
Add the Tianma Micro-electronics TM070JVHG33 7.0" WXGA display to the
panel-simple compatible list.
Signed-off-by: Matthias Schiffer
---
v2: no changes
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree
The upcoming patches to turn the TXP into a full-blown CRTC will have the
same CRTC initialisation code, so let's move it into a separate, public,
function so that we can reuse it later on.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 87 +++
Hi Kamal,
> El 12 jun 2020, a las 20:47, Kamal Dasu escribió:
>
> On Fri, Jun 5, 2020 at 1:07 PM Álvaro Fernández Rojas
> wrote:
>>
>> MTD_OPS_AUTO_OOB is writting OOB with ECC enabled, which changes all ECC
>> bytes
>> from an erased page to 0x00 when JFFS2 cleanmarkers are added with mtd-u
On Thu, 2020-06-11 at 14:42 +0200, Matthias Schiffer wrote:
> Add the CDTech Electronics displays S070PWS19HP-FC21 (7.0" WSVGA) and
> S070SWV29HG-DC44 (7.0" WVGA) to the panel-simple compatible list.
>
> Signed-off-by: Matthias Schiffer
> ---
>
> v2: no changes
Oops, it seems I held my git send
From: Michael Krummsdorf
Add support for the CDTech Electronics displays S070PWS19HP-FC21
(7.0" WSVGA) and S070SWV29HG-DC44 (7.0" WVGA) to panel-simple.
Signed-off-by: Michael Krummsdorf
Signed-off-by: Matthias Schiffer
---
v2:
- removed vrefresh
- added connector_type
drivers/gpu/drm/panel
In function is_support_sw_smu, remove unnecessary conversion
to bool return, this change is to make the code a bit readable.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerpla
In fucntin msm_submitqueue_create, the queue is a local
variable, in return -EINVAL branch, queue didn`t add to ctx`s
list yet, and also didn`t kfree, this maybe bring in potential
memleak.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/msm/msm_submitqueue.c | 4 +++-
1 file changed, 3 insertio
Let's support debugging function to show exporter
detail information. The exporter don't need to manage
the lists for debugging because all dmabuf list are
managed on dmabuf framework.
That supports to walk the dmabuf list and show the
detailed information for exporter by passed function
implement
On 6/11/20 10:37 AM, Dmitry Baryshkov wrote:
On 26/05/2020 06:22, Jonathan Marek wrote:
This brings up basic video mode functionality for SM8150 DPU. Command
mode
and dual mixer/intf configurations are not working, future patches will
address this. Scaler functionality and multiple planes is al
13.06.2020 00:23, kernel test robot пишет:
> Hi Dmitry,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on linus/master]
> [also build test WARNING on next-20200612]
> [cannot apply to tegra/for-next robh/for-next v5.7]
> [if your patch is applied to the wrong gi
The TXP driver is the only place where we need to set the txp_armed flag,
so let's move the function in the TXP driver.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 7 ---
drivers/gpu/drm/vc4/vc4_drv.h | 1 -
drivers/gpu/drm/vc4/vc4_txp.c |
> In fucntin msm_submitqueue_create, the queue is a local
> variable, in return -EINVAL branch, queue didn`t add to ctx`s
> list yet, and also didn`t kfree, this maybe bring in potential
> memleak.
I suggest to improve also this change description.
How do you think about a wording variant like the
The TXP so far has been leveraging the PixelValve infrastructure in the
driver, that was really two things: the interaction with DRM's CRTC
concept, the setup of the underlying pixelvalve and the setup of the shared
HVS, the pixelvalve part being irrelevant to the TXP since it accesses the
HVS dire
Let's support debugging function to show exporter
detail information. The exporter don't need to manage
the lists for debugging because all dmabuf list are
managed on dmabuf framework.
That supports to walk the dmabuf list and show the
detailed information for exporter by passed function
implement
Add the CDTech Electronics displays S070PWS19HP-FC21 (7.0" WSVGA) and
S070SWV29HG-DC44 (7.0" WVGA) to the panel-simple compatible list.
Signed-off-by: Matthias Schiffer
---
v2: no changes
.../devicetree/bindings/display/panel/panel-simple.yaml | 4
1 file changed, 4 insertions(+)
d
Now the __iommu_map() and __iommu_map_sg() are used only in iommu.c
file, so mark them as static.
Signed-off-by: Baolin Wang
---
drivers/iommu/iommu.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 8584f48..14eca
From: Max Merchel
Add support for the Tianma Micro-electronics TM070JVHG33 7.0" WXGA display
to panel-simple.
Signed-off-by: Max Merchel
Signed-off-by: Matthias Schiffer
---
v2:
- added connector_type
- fixed bus_format
drivers/gpu/drm/panel/panel-simple.c | 15 +++
1 file chang
This patch series is based on v5 of the msm DP driver submission[1]. I
haven't refreshed this to be based on v6, but I can do that soon. In
the v5 patch series review I suggested that the DP PHY and PLL be split
out of the drm driver and moved to the qmp phy driver. This patch series
does that, b
In function mtk_dsi_clk_hs_state, remove unnecessary conversion
to bool return, this change is to make the code a bit readable.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.
Hi,
The first patch masks some functions as static, and the second patch
changes to use the gfp parameter from iommu_ops->map() to allocate
ARM page pages. Any comments are welcome. Thanks.
Changes from v1:
- Fix the building errors when enabling CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST
Baolin Wan
Hi Stefan,
On Sat, Jun 06, 2020 at 10:06:12AM +0200, Stefan Wahren wrote:
> Hi Maxime,
>
> Am 05.06.20 um 16:35 schrieb Maxime Ripard:
> > Hi Stefan,
> >
> > On Wed, Jun 03, 2020 at 07:32:30PM +0200, Stefan Wahren wrote:
> >> Am 02.06.20 um 17:54 schrieb Maxime Ripard:
> >>> On Wed, May 27, 2020
Add the Tianma Micro-electronics TM070JVHG33 7.0" WXGA display to the
panel-simple compatible list.
Signed-off-by: Matthias Schiffer
---
v2: no changes
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree
There exists a sleep-while-atomic bug while accessing the dmabuf->name
under mutex in the dmabuffs_dname(). This is caused from the SELinux
permissions checks on a process where it tries to validate the inherited
files from fork() by traversing them through iterate_fd() (which
traverse files under
There are three err return values in drm_fbdev_generic_setup.
In mxsfb_probe we called this function, but didn`t handle the
return value, this change is to add err handle, maybe make code
a bit more readable.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 4 +++-
1 file chan
Quoting Tanmay Shah (2020-06-11 18:50:25)
> These patches add support for Display-Port driver on SnapDragon
> hardware. It adds
> DP driver and DP PLL driver files along with the needed device-tree
> bindings.
>
> The block diagram of DP driver is shown below:
>
>
> +---
Function msm_gpu_crashstate_capture maybe called for several
times, and then the state->bos is a potential memleak. Also
the state->pos maybe alloc failed, but now without any handle.
This change is to fix some potential memleak and add error
handle when alloc failed.
Signed-off-by: Bernard Zhao
We'll need the CRTC state related functions to be exported so that we can
reuse them for the TXP.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 21 ++---
drivers/gpu/drm/vc4/vc4_drv.h | 10 ++
2 files changed, 20 insertions(+
In function fill_iram_v_2, the ram_table->bright_neg_gain`s
first element [0][0] seems to be missing. This change is just
to make the code a bit readable.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/modules/power/power_helpers.c | 1 +
1 file changed, 1 insertion(+)
diff --git a
From: Kalyan Thota
Request for color processing blocks only if they are
available in the display hw catalog and they are
sufficient in number for the selection.
Signed-off-by: Kalyan Thota
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12
1 file changed, 8 insertions(+), 4 del
Now that the code in vc4_crtc accessing registers is only meant for the
pixelvalve, it doesn't make sense anymore to test whether we're accessing
the TXP or not and we can safely remove those checks.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/vc4/vc4_crtc.c | 29 +
Hi Eric,
On Tue, Jun 02, 2020 at 12:31:37PM -0700, Eric Anholt wrote:
> On Tue, Jun 2, 2020 at 8:02 AM Dave Stevenson
> wrote:
> >
> > Hi Maxime and Eric
> >
> > On Tue, 2 Jun 2020 at 15:12, Maxime Ripard wrote:
> > >
> > > Hi Eric
> > >
> > > On Wed, May 27, 2020 at 09:54:44AM -0700, Eric Anhol
On Thu, Jun 11, 2020 at 10:34:30AM +0200, Daniel Vetter wrote:
> > I still have my doubts about allowing fence waiting from within shrinkers.
> > IMO ideally they should use a trywait approach, in order to allow memory
> > allocation during command submission for drivers that
> > publish fences bef
From: Max Merchel
Add support for the Tianma Micro-electronics TM070JVHG33 7.0" WXGA display
to panel-simple.
Signed-off-by: Max Merchel
Signed-off-by: Matthias Schiffer
---
v2:
- added connector_type
- fixed bus_format
drivers/gpu/drm/panel/panel-simple.c | 15 +++
1 file chang
Quoting Douglas Anderson (2020-06-12 12:30:50)
> The ti_sn_bridge_gpio_set() got the return value of
> regmap_update_bits() but didn't check it. The function can't return
> an error value, but we should at least print a warning if it didn't
> work.
>
> This fixes a compiler warning about setting
18.05.2020 10:36, Dmitry Osipenko пишет:
> 12.05.2020 23:59, Sean Paul пишет:
>> On Thu, Apr 16, 2020 at 7:03 PM Dmitry Osipenko wrote:
>>>
>>> 15.04.2020 00:32, dbasehore . пишет:
On Tue, Apr 14, 2020 at 2:18 PM Dmitry Osipenko wrote:
>
> 14.04.2020 22:32, dbasehore . пишет:
>>
From: Matthias Schiffer
This adds a few panels TQ-Systems uses with various starterkit
mainboards. Device trees actually using these panels will be added with
a later submission.
Matthias Schiffer (2):
dt-bindings: display: simple: add CDTech S070PWS19HP-FC21 and
S070SWV29HG-DC44
dt-bin
The CRTC hooks are called both for the TXP and the pixelvalve, yet some
will read / write the registers as if the device was a pixelvalve, which
won't really work.
Let's make sure we only access those registers if we are running on a
PixelValve.
Reviewed-by: Eric Anholt
Signed-off-by: Maxime Rip
From: Michael Krummsdorf
Add support for the CDTech Electronics displays S070PWS19HP-FC21
(7.0" WSVGA) and S070SWV29HG-DC44 (7.0" WVGA) to panel-simple.
Signed-off-by: Michael Krummsdorf
Signed-off-by: Matthias Schiffer
---
v2:
- removed vrefresh
- added connector_type
drivers/gpu/drm/panel
Hi,
This is another part of the rpi4 HDMI series that got promoted to a
series of its own to try to reduce the main one.
This rework is needed since the bcm2711 used in the rpi4 has a more
complex routing in the HVS that doesn't allow to use a fairly simple
mapping like what was used before.
Sin
From: Kalyan Thota
Request for color processing blocks only if they are
available in the display hw catalog and they are
sufficient in number for the selection.
Changes in v2:
- Include Fixes tag in commit message (Rob Clark)
- Adding the Tested by tag as there are no code
On Wed, Jun 10, 2020 at 09:41:01PM +0200, Daniel Vetter wrote:
> fs_reclaim_acquire/release nicely catch recursion issues when
> allocating GFP_KERNEL memory against shrinkers (which gpu drivers tend
> to use to keep the excessive caches in check). For mmu notifier
> recursions we do have lockdep a
11.06.2020 11:17, Daniel Stone пишет:
> Hi Dmitry,
>
> On Thu, 11 Jun 2020 at 08:54, Dmitry Osipenko wrote:
>> 10.06.2020 14:30, Thierry Reding пишет:
>>> From: Thierry Reding
>>> As of commit 4dc55525b095 ("drm: plane: Verify that no or all planes
>>> have a zpos property") a warning is emitted
* Grygorii Strashko [200611 13:59]:
> I think, suspend might be fixed if all devices, which are now child of
> ti-sysc, will do
> pm_runtime_force_xxx() calls at noirq suspend stage by adding:
>
> SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
>
On 26/05/2020 06:22, Jonathan Marek wrote:
This brings up basic video mode functionality for SM8150 DPU. Command mode
and dual mixer/intf configurations are not working, future patches will
address this. Scaler functionality and multiple planes is also untested.
Signed-off-by: Jonathan Marek
--
Quoting Douglas Anderson (2020-06-08 10:48:32)
> The kernel test robot noted that if "OF" is defined (which is needed
> to select DRM_TI_SN65DSI86 at all) but not OF_GPIO that we'd get
> compile failures because some of the members that we access in "struct
> gpio_chip" are only defined "#if define
Now the ARM page tables are always allocated by GFP_ATOMIC parameter,
but the iommu_ops->map() function has been added a gfp_t parameter by
commit 781ca2de89ba ("iommu: Add gfp parameter to iommu_ops::map"),
thus io_pgtable_ops->map() should use the gfp parameter passed from
iommu_ops->map() to all
Quoting Douglas Anderson (2020-06-08 10:48:35)
> The ti_sn_bridge_gpio_set() got the return value of
> regmap_update_bits() but didn't check it. The function can't return
> an error value, but we should at least print a warning if it didn't
> work.
>
> This fixes a compiler warning about setting
syzbot has found a reproducer for the following crash on:
HEAD commit:435faf5c Merge tag 'riscv-for-linus-5.8-mw0' of git://git...
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=1519d83e10
kernel config: https://syzkaller.appspot.com/x/.config?x=3dbb617
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