https://bugs.freedesktop.org/show_bug.cgi?id=105515
--- Comment #5 from Edward Kigwana ---
With options amdgpu dpm=0 I can at leave get something. If I do not provide any
arguments, the system locks up instantly so without a serial console it is
going to be a a beast to capture that.
If you need
https://bugs.freedesktop.org/show_bug.cgi?id=105515
--- Comment #4 from Edward Kigwana ---
Created attachment 138150
--> https://bugs.freedesktop.org/attachment.cgi?id=138150&action=edit
dmesg
Full dmesg output
--
You are receiving this mail because:
You are the assignee for the bug.
Hi Linus,
i915 has a backlight fix for some panels, a pm and a fencing fix,
along with some GVT fixes.
amdgpu has a backlight fix across suspend/resume, an object
destruction ordering issue fix, and a displayport fix
nouveau has two backlight fixes, and a fix for some lockups.
Pretty quiet week,
On 14 March 2018 at 21:08, Thierry Reding wrote:
> On Tue, Mar 13, 2018 at 11:24:11AM -0500, Gustavo A. R. Silva wrote:
>> In preparation to enabling -Wvla, remove VLA. In this particular
>> case directly use macro NVKM_MSGQUEUE_CMDLINE_SIZE instead of local
>> variable cmdline_size. Also, remove
https://bugs.freedesktop.org/show_bug.cgi?id=105401
Timothy Pearson changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEEDINFO
https://bugs.freedesktop.org/show_bug.cgi?id=105534
Alex Deucher changed:
What|Removed |Added
Resolution|--- |NOTABUG
Status|NEW
From: "Xiong, James"
Previously when a cached MRU buffer was found to be evicted by kernel,
the bucket was emptied. The new implementation purged these buffers that
were freed before the evicted one.
Signed-off-by: Xiong, James
---
intel/intel_bufmgr_gem.c | 29 ++---
1
From: "Xiong, James"
it goes through DRMLIST in a reverse order
Signed-off-by: Xiong, James
---
libdrm_lists.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/libdrm_lists.h b/libdrm_lists.h
index 8926d8d..400c731 100644
--- a/libdrm_lists.h
+++ b/libdrm_lists.h
@@ -101,6 +101,12 @@
From: "Xiong, James"
split drm_intel_gem_bo_alloc_internal, and add a function to
search for a suitable buffer for given size for reuse.
Signed-off-by: Xiong, James
---
intel/intel_bufmgr_gem.c | 141 ---
1 file changed, 73 insertions(+), 68 deletion
From: "Xiong, James"
With gem_reuse enabled, when a buffer size is different than
the sizes of buckets, it is aligned to the next bucket's size,
which means about 25% more memory than the requested is allocated
in the worst senario. For example:
Orignal sizeActual
32KB+1Byte 40KB
.
.
.
From: "Xiong, James"
cached buckets are sorted by size in increasing order, each now
contains cached buffers with different sizes. A buffer with size
>= buckets[n].size and < buckets[n+1].size is put in bucket n
for future reuse.
Signed-off-by: Xiong, James
---
intel/intel_bufmgr_gem.c | 9 +++
From: "Xiong, James"
Previously all cached buffers in a given bucket were same sized,
when reusing, the MRU buffer at the tail was poped out. With the
new implementation, we go through the buffer list in a reverse
order to search for a MRU buffer with a suitable size.
Signed-off-by: Xiong, James
https://bugs.freedesktop.org/show_bug.cgi?id=105018
--- Comment #22 from L.S.S. ---
It seems some of the patches (1, 2, and 4) have entered the 4.16 kernel, from
what I can tell when building the kernel for Manjaro, where these three patches
got rejected, and the exact code changes were found in
On Thu, Mar 15, 2018 at 02:08:51PM -0700, matthew.s.atw...@intel.com wrote:
> From: Matt Atwood
>
> DP_TRAINING_AUX_RD_INTERVAL with DP 1.3 spec changed bit scheeme from 8
> bits to 7 in DPCD 0x000e. The 8th bit is used to identify extended
> receiver capabilities. For panels that use this new fe
https://bugs.freedesktop.org/show_bug.cgi?id=105534
Bug ID: 105534
Summary: amdgpu cannot set 2560x1440@60 mode even though
monitor,gpu and motherboard support it
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
Hi Dave,
Sorry for the last minute and for sending 2 pull requests
in a short time, but we just got a pull request from GVT.
It passes our CI-fast-feedback and the full run is still
running.
Please if we still have time please consider pulling it,
otherwise this will be part of next regular one.
https://bugs.freedesktop.org/show_bug.cgi?id=105533
Bug ID: 105533
Summary: [r600g] Trying UVD causes my system crash and hang on
RV730
Product: Mesa
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (
Quoting Marek Szyprowski (2018-02-20 01:36:03)
> Hi Robin,
>
> On 2018-02-19 17:29, Robin Murphy wrote:
> >
> > Seeing how every subsequent patch ends up with the roughly this same
> > stanza:
> >
> > x = devm_clk_bulk_alloc(dev, num, names);
> > if (IS_ERR(x)
> > return PTR_ERR(x
https://bugs.freedesktop.org/show_bug.cgi?id=105532
--- Comment #1 from Alexander Tsoy ---
Also very often map generation process just hangs or repeat many times
(according to the progress bar).
--
You are receiving this mail because:
You are the assignee for the bug.___
https://bugzilla.kernel.org/show_bug.cgi?id=198123
--- Comment #39 from sh...@tuta.io ---
I booted the stock kernel with nosmp few times. One time - gray, other times -
black. I wonder if the initialization code could be preempted and the race
still occurs on a single CPU. Otherwise, it may be a r
https://bugs.freedesktop.org/show_bug.cgi?id=105532
Bug ID: 105532
Summary: Broken map generation in Northgard game
Product: Mesa
Version: unspecified
Hardware: Other
OS: All
Status: NEW
Severity: normal
From: Matt Atwood
DP_TRAINING_AUX_RD_INTERVAL with DP 1.3 spec changed bit scheeme from 8
bits to 7 in DPCD 0x000e. The 8th bit is used to identify extended
receiver capabilities. For panels that use this new feature wait interval
would be increased by 512 ms, when spec is max 16 ms. This behavio
https://bugzilla.kernel.org/show_bug.cgi?id=199123
--- Comment #6 from david becerra (davidbecerrapor...@gmail.com) ---
(In reply to Harry Wentland from comment #5)
> Created attachment 274755 [details]
> [PATCH] drm/amd/display: Refine disable VGA
>
> The patch Alex posted might not be enough. A
On Thu, Mar 15, 2018 at 9:03 PM, Charles Lohr wrote:
> To try to address both concerns, it feels easiest to do not in-line.
>
> 1) Just for background: The H3, and many other ARM systems use the
> framebuffer for all video access, 3D accelerated as well as X11. If we
> want to permit HMD (headmoun
On Thu, Mar 15, 2018 at 08:03:44PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 15, 2018 at 07:48:02PM +0200, Ville Syrjälä wrote:
> > On Thu, Mar 15, 2018 at 10:42:17AM -0700, Eric Anholt wrote:
> > > Ville Syrjala writes:
> > >
> > > > From: Ville Syrjälä
> > > >
> > > > To make life easier for d
Charles Lohr writes:
> Even if the vive is the only device connected, it will still not permit it
> to be operated. See https://github.com/linux-sunxi/linux-sunxi/issues/291
> for dri with a lot of debugging turned on.
Oh, it's not supposed to do that. I had intended to write the code so
that i
On Thu, Mar 15, 2018 at 4:32 PM, Jani Nikula wrote:
> On Thu, 15 Mar 2018, Daniel Vetter wrote:
>> On Wed, Mar 14, 2018 at 05:11:02PM +0200, Jani Nikula wrote:
>>> Until now, the drm-intel commit access have been handed out ad hoc,
>>> without transparency, consistency, or fairness. With pressure
From: Colin Ian King
There is a missing indentation following an if statement, fix this.
Detected by Coccinelle:
drivers/video/fbdev/aty/mach64_ct.c:183:2-15: code aligned with
following code on line 184
Signed-off-by: Colin Ian King
---
drivers/video/fbdev/aty/mach64_ct.c | 2 +-
1 file chan
From: Fabio Estevam
platform_driver does not need to set the owner field, as this will
be populated by the driver core.
Generated by scripts/coccinelle/api/platform_no_drv_owner.cocci.
Signed-off-by: Fabio Estevam
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 1 -
1 file changed,
On Thu, Mar 15, 2018 at 07:48:02PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 15, 2018 at 10:42:17AM -0700, Eric Anholt wrote:
> > Ville Syrjala writes:
> >
> > > From: Ville Syrjälä
> > >
> > > To make life easier for drivers, let's have the core check that the
> > > requested pixel format is su
https://bugzilla.kernel.org/show_bug.cgi?id=198883
--- Comment #58 from Andrey Grodzovsky (andrey.grodzov...@amd.com) ---
Please try following to see if it helps avoiding the hang =
R600_DEBUG=notiling,norbplus
try with GALLIUM_DDEBUG=flush to see if it makes a difference (flushes after
each dr
On Thu, Mar 15, 2018 at 10:42:17AM -0700, Eric Anholt wrote:
> Ville Syrjala writes:
>
> > From: Ville Syrjälä
> >
> > To make life easier for drivers, let's have the core check that the
> > requested pixel format is supported by at least one plane when creating
> > a new framebuffer.
> >
> > Th
Ville Syrjala writes:
> From: Ville Syrjälä
>
> To make life easier for drivers, let's have the core check that the
> requested pixel format is supported by at least one plane when creating
> a new framebuffer.
>
> This eases the burden on drivers by making sure they'll never get
> requests to c
On Thu, 2018-03-15 at 10:08 -0700, Matthew Wilcox wrote:
> On Thu, Mar 15, 2018 at 09:56:46AM -0700, Joe Perches wrote:
> > I have a patchset that creates a vsprintf extension for
> > print_vma_addr and removes all the uses similar to the
> > print_symbol() removal.
> >
> > This now avoids any pos
From: Ville Syrjälä
Now that blob->data is void* again we don't need to cast it.
v2: Rebase
Signed-off-by: Ville Syrjälä
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_color.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i
https://bugzilla.kernel.org/show_bug.cgi?id=198985
--- Comment #4 from Fredrik (fred...@planet-express.se) ---
I've applied the patch you mentioned above. Is this related or should I open a
new bug?:
[56091.713961]
==
[56091.714058]
On Thu, 2018-03-15 at 10:48 +0100, Geert Uytterhoeven wrote:
> Hi David,
>
> On Thu, Mar 15, 2018 at 10:42 AM, David Howells wrote:
> > Do we have anything left that still implements NOMMU?
>
> Sure: arm, c6x, m68k, microblaze, and sh.
I have a patchset that creates a vsprintf extension for
pr
Hi Arnd,
On Thu, 2018-03-15 at 17:19 +0100, Arnd Bergmann wrote:
> gcc-8 reports that we access an array with a negative index
> in an error case:
>
> drivers/gpu/ipu-v3/ipu-prg.c: In function 'ipu_prg_channel_disable':
> drivers/gpu/ipu-v3/ipu-prg.c:252:43: error: array subscript -22 is below
>
When CONFIG_ACPI is disabled, we never initialize the acpi_table
structure in kfd_create_crat_image_virtual:
drivers/gpu/drm/amd/amdkfd/kfd_crat.c: In function
'kfd_create_crat_image_virtual':
drivers/gpu/drm/amd/amdkfd/kfd_crat.c:888:40: error: 'acpi_table' may be used
uninitialized in this fun
On Wednesday, 2018-03-14 14:48:37 +0900, Seung-Woo Kim wrote:
> There is already condition checking input values between 2 and 4096
> so condition checking 0 is always false. Remove the dead condition.
>
> Signed-off-by: Seung-Woo Kim
Indeed, good catch :)
Reviewed-by: Eric Engestrom
... and p
On Thu, 2018-03-15 at 18:14 +0200, Ville Syrjälä wrote:
> > There's no trade-off in this patch for faster/larger.
> > This patch is simply smaller. Smaller is better.
>
> This feels a bit like saying pink is better than red because it's
> more pink.
Silly. If you can't say smaller total object
The R-Car V3M Eagle board includes a transparent THC63LVD1024 LVDS
decoder, connected to the on-chip LVDS encoder output on one side
and to HDMI encoder ADV7511w on the other one.
As the decoder does not need any configuration it has been so-far
omitted from DTS. Now that a driver is available, de
On 15.03.2018 15:48, Dmitry Osipenko wrote:
> On 15.03.2018 13:27, Thierry Reding wrote:
>> On Thu, Mar 15, 2018 at 04:00:23AM +0300, Dmitry Osipenko wrote:
>>> Simplify opaque format adjustment by removing format checking. There are
>>> only 4 formats that require the adjustment and so this way is
Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel
output converter.
Signed-off-by: Jacopo Mondi
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/Kconfig| 6 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/thc63lvd1024.c | 257 ++
Hello,
this new version fixes comments received from Andrzej and Sergei on the
preceding v3.
Mostly, I cleaned up the mess with the powerdown GPIO names, and I'm now using
pdwn everywhere. The regulator enabling routine has been improved as suggested
by Sergei and Andrzej and I've changed Kconf
Thanks for the review, Chris. Sorry for the late response.
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Chris Wilson
>Sent: Saturday, March 3, 2018 1:46 AM
>To: Xiong, James ; dri-devel@lists.freedesktop.org;
>intel-...@lists.freedes
This way new state takes into account the current state of unaffected
(by the atomic commit) planes.
Signed-off-by: Dmitry Osipenko
---
v2: Dropped unrelated 'cleanup' changes and fixed
s/state->dependent[i]/state->dependent[index]/ typo.
drivers/gpu/drm/tegra/plane.c | 5 ++---
1 file cha
On 03/15/2018 10:42 AM, David Howells wrote:
> Do we have anything left that still implements NOMMU?
>
RISC-V ?
(evil grin :-)
Cheers,
Hannes
--
Dr. Hannes ReineckeTeamlead Storage & Networking
h...@suse.de +49 911 74053 688
SUSE LINUX GmbH, Max
Arnd Bergmann writes:
> A lot of Kconfig symbols have architecture specific dependencies.
> In those cases that depend on architectures we have already removed,
> they can be omitted.
>
> Signed-off-by: Arnd Bergmann
[...]
> drivers/net/wireless/cisco/Kconfig | 2 +-
Acked-by: Kalle Valo
Document Thine THC63LVD1024 LVDS decoder device tree bindings.
Signed-off-by: Jacopo Mondi
Reviewed-by: Andrzej Hajda
---
.../bindings/display/bridge/thine,thc63lvd1024.txt | 66 ++
1 file changed, 66 insertions(+)
create mode 100644
Documentation/devicetree/bindings/displ
On 15.03.2018 15:42, Dmitry Osipenko wrote:
> On 15.03.2018 13:29, Thierry Reding wrote:
>> On Thu, Mar 15, 2018 at 04:00:24AM +0300, Dmitry Osipenko wrote:
>>> Keep old 'dependent' state of unaffected planes, this way new state takes
>>> into account current state of unaffected planes.
>>>
>>> Fix
On 15.03.2018 15:42, Dmitry Osipenko wrote:
> On 15.03.2018 13:29, Thierry Reding wrote:
>> On Thu, Mar 15, 2018 at 04:00:24AM +0300, Dmitry Osipenko wrote:
>>> Keep old 'dependent' state of unaffected planes, this way new state takes
>>> into account current state of unaffected planes.
>>>
>>> Fix
Document Thine THC63LVD1024 LVDS decoder device tree bindings.
Signed-off-by: Jacopo Mondi
---
.../bindings/display/bridge/thine,thc63lvd1024.txt | 63 ++
1 file changed, 63 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024
Hi,
v5 with a few small changes compared to v4 and with Andrzej tag added to
all patches in the series.
I fixed punctuation in the bindings and added a statement to clarify
the chip does not expose any control bus but it is instead configured by input
signals.
Minor changes in the driver, with
The R-Car V3M Eagle board includes a transparent THC63LVD1024 LVDS
decoder, connected to the on-chip LVDS encoder output on one side
and to HDMI encoder ADV7511w on the other one.
As the decoder does not need any configuration it has been so-far
omitted from DTS. Now that a driver is available, de
Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel
output converter.
Signed-off-by: Jacopo Mondi
---
drivers/gpu/drm/bridge/Kconfig| 6 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/thc63lvd1024.c | 255 ++
3
On 15.03.2018 13:27, Thierry Reding wrote:
> On Thu, Mar 15, 2018 at 04:00:23AM +0300, Dmitry Osipenko wrote:
>> Simplify opaque format adjustment by removing format checking. There are
>> only 4 formats that require the adjustment and so this way is less error
>> prone, avoiding mishandling native
On 15.03.2018 13:29, Thierry Reding wrote:
> On Thu, Mar 15, 2018 at 04:00:24AM +0300, Dmitry Osipenko wrote:
>> Keep old 'dependent' state of unaffected planes, this way new state takes
>> into account current state of unaffected planes.
>>
>> Fixes: ebae8d07435a ("drm/tegra: dc: Implement legacy
gcc-8 reports that we access an array with a negative index
in an error case:
drivers/gpu/ipu-v3/ipu-prg.c: In function 'ipu_prg_channel_disable':
drivers/gpu/ipu-v3/ipu-prg.c:252:43: error: array subscript -22 is below array
bounds of 'struct ipu_prg_channel[3]' [-Werror=array-bounds]
This move
On Thu, Mar 15, 2018 at 08:44:05AM -0700, Joe Perches wrote:
> On Thu, 2018-03-15 at 17:37 +0200, Ville Syrjälä wrote:
> > On Thu, Mar 15, 2018 at 08:17:53AM -0700, Joe Perches wrote:
> > > On Thu, 2018-03-15 at 17:05 +0200, Ville Syrjälä wrote:
> > > > On Thu, Mar 15, 2018 at 03:04:52PM +0100, Maa
On Thu, Mar 15, 2018 at 05:24:31PM +0300, Dmitry Osipenko wrote:
> This way new state takes into account the current state of unaffected
> (by the atomic commit) planes.
>
> Signed-off-by: Dmitry Osipenko
> ---
>
> v2: Dropped unrelated 'cleanup' changes and fixed
> s/state->dependent[i]/sta
Hi Andrzej,
thanks for your patience in reviewing this series
On Thu, Mar 15, 2018 at 02:37:00PM +0100, Andrzej Hajda wrote:
> On 15.03.2018 11:56, Jacopo Mondi wrote:
> > Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel
> > output converter.
> >
> > Signed-off-by: Jacopo
On Thu, 2018-03-15 at 17:37 +0200, Ville Syrjälä wrote:
> On Thu, Mar 15, 2018 at 08:17:53AM -0700, Joe Perches wrote:
> > On Thu, 2018-03-15 at 17:05 +0200, Ville Syrjälä wrote:
> > > On Thu, Mar 15, 2018 at 03:04:52PM +0100, Maarten Lankhorst wrote:
> > > > Op 15-03-18 om 14:30 schreef Ville Syrj
On Thu, Mar 15, 2018 at 08:17:53AM -0700, Joe Perches wrote:
> On Thu, 2018-03-15 at 17:05 +0200, Ville Syrjälä wrote:
> > On Thu, Mar 15, 2018 at 03:04:52PM +0100, Maarten Lankhorst wrote:
> > > Op 15-03-18 om 14:30 schreef Ville Syrjälä:
> > > > On Tue, Mar 13, 2018 at 03:02:15PM -0700, Joe Perch
The *.dtb and *.dtb.S files get removed by 'make' during the build process,
and later seem to be missed during the 'modpost' stage:
rm drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7795.dtb
drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7791.dtb
drivers/gpu/drm/rcar-du/rcar_du_of_lvds_r8a7791.dtb.S
dr
On Thu, 15 Mar 2018, Daniel Vetter wrote:
> On Wed, Mar 14, 2018 at 05:11:02PM +0200, Jani Nikula wrote:
>> Until now, the drm-intel commit access have been handed out ad hoc,
>> without transparency, consistency, or fairness. With pressure to add
>> more committers, this is no longer tenable, if
From: Ville Syrjälä
Provide a small helper to convert the blob length in bytes
to the number of LUT entries.
v2: Add kerneldoc (Daniel)
Cc: Daniel Vetter
Signed-off-by: Ville Syrjälä
Reviewed-by: Daniel Vetter
---
include/drm/drm_color_mgmt.h | 12
1 file changed, 12 insertions
From: Ville Syrjälä
While we want to potentially support multiple different gamma/degamma
LUT sizes we can (and should) at least check that the blob length
is a multiple of the LUT entry size.
v2: s/expected_size_mod/expected_elem_size/ (Daniel)
Add kernel doc (Daniel)
Cc: Daniel Vetter
Si
On Thu, 2018-03-15 at 17:05 +0200, Ville Syrjälä wrote:
> On Thu, Mar 15, 2018 at 03:04:52PM +0100, Maarten Lankhorst wrote:
> > Op 15-03-18 om 14:30 schreef Ville Syrjälä:
> > > On Tue, Mar 13, 2018 at 03:02:15PM -0700, Joe Perches wrote:
> > > > drm_printk is used for both DRM_ERROR and DRM_DEBUG
https://bugs.freedesktop.org/show_bug.cgi?id=103277
mikita.lip...@amd.com changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #19 from m
On Thu, Mar 15, 2018 at 03:04:52PM +0100, Maarten Lankhorst wrote:
> Op 15-03-18 om 14:30 schreef Ville Syrjälä:
> > On Tue, Mar 13, 2018 at 03:02:15PM -0700, Joe Perches wrote:
> >> drm_printk is used for both DRM_ERROR and DRM_DEBUG with unnecessary
> >> arguments that can be removed by creating
https://bugzilla.kernel.org/show_bug.cgi?id=199123
--- Comment #5 from Harry Wentland (harry.wentl...@amd.com) ---
Created attachment 274755
--> https://bugzilla.kernel.org/attachment.cgi?id=274755&action=edit
[PATCH] drm/amd/display: Refine disable VGA
The patch Alex posted might not be enough
On 2018-03-15 20:12, skoll...@codeaurora.org wrote:
On 2018-03-14 20:37, Sean Paul wrote:
Ensure that pm_runtime is properly referenced/unreferenced when we
need
it.
Signed-off-by: Sean Paul
Reviewed-by: Sravanthi Kollukuduru
---
Didn't get a response to my suggestion, so wrote the patch
On Thu, 2018-03-15 at 14:22 +0100, Maarten Lankhorst wrote:
> Op 13-03-18 om 23:02 schreef Joe Perches:
> > drm_printk is used for both DRM_ERROR and DRM_DEBUG with unnecessary
> > arguments that can be removed by creating separate functins.
> >
> > Create specific functions for these calls to red
On 2018-03-14 20:37, Sean Paul wrote:
Ensure that pm_runtime is properly referenced/unreferenced when we need
it.
Signed-off-by: Sean Paul
---
Didn't get a response to my suggestion, so wrote the patch anyways.
Thoughts?
This patch looks fine for now.
The plan is to deprecate the downstream
https://bugzilla.kernel.org/show_bug.cgi?id=199123
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC||alexdeuc...@gmail.c
On Thu, Mar 15, 2018 at 11:42:25AM +0100, Arnd Bergmann wrote:
> Is anyone producing a chip that includes enough of the Privileged ISA spec
> to have things like system calls, but not the MMU parts?
Various SiFive SOCs seem to support M and U mode, but no S mode or
iommu. That should be enough fo
Op 15-03-18 om 14:30 schreef Ville Syrjälä:
> On Tue, Mar 13, 2018 at 03:02:15PM -0700, Joe Perches wrote:
>> drm_printk is used for both DRM_ERROR and DRM_DEBUG with unnecessary
>> arguments that can be removed by creating separate functins.
>>
>> Create specific functions for these calls to reduc
On Fri, Mar 2, 2018 at 3:18 AM, Maxime Ripard wrote:
> Now that we have the guarantee that we will have only a single YUV plane,
> actually support them. The way it works is not really straightforward,
> since we first need to enable the YUV mode in the plane that we want to
> setup, and then we h
On Wed, Mar 14, 2018 at 05:11:02PM +0200, Jani Nikula wrote:
> Until now, the drm-intel commit access have been handed out ad hoc,
> without transparency, consistency, or fairness. With pressure to add
> more committers, this is no longer tenable, if it ever was. Document the
> requirements and exp
On Wednesday, March 14, 2018 04:35:31 PM Arnd Bergmann wrote:
> The m32r architecture is being removed, so this is no longer needed.
>
> Signed-off-by: Arnd Bergmann
Acked-by: Bartlomiej Zolnierkiewicz
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On 15.03.2018 11:56, Jacopo Mondi wrote:
> The R-Car V3M Eagle board includes a transparent THC63LVD1024 LVDS
> decoder, connected to the on-chip LVDS encoder output on one side
> and to HDMI encoder ADV7511w on the other one.
>
> As the decoder does not need any configuration it has been so-far
>
On Wednesday, March 14, 2018 04:35:30 PM Arnd Bergmann wrote:
> The blackfin architecture is getting removed, this removes the
> associated fbdev drivers as well.
>
> Signed-off-by: Arnd Bergmann
Acked-by: Bartlomiej Zolnierkiewicz
Best regards,
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Samsung R&D Institu
On 15.03.2018 11:56, Jacopo Mondi wrote:
> Add DRM bridge driver for Thine THC63LVD1024 LVDS to digital parallel
> output converter.
>
> Signed-off-by: Jacopo Mondi
> ---
> drivers/gpu/drm/bridge/Kconfig| 6 +
> drivers/gpu/drm/bridge/Makefile | 1 +
> drivers/gpu/drm/bridge/thc
On Wednesday, March 14, 2018 04:35:29 PM Arnd Bergmann wrote:
> The blackfin and m32r architectures are getting removed, so it's
> time to clean up the logos as well.
>
> Signed-off-by: Arnd Bergmann
Acked-by: Bartlomiej Zolnierkiewicz
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Ins
On Tue, Mar 13, 2018 at 03:02:15PM -0700, Joe Perches wrote:
> drm_printk is used for both DRM_ERROR and DRM_DEBUG with unnecessary
> arguments that can be removed by creating separate functins.
>
> Create specific functions for these calls to reduce x86/64 defconfig
> size by ~20k.
>
> Modify th
Op 13-03-18 om 23:02 schreef Joe Perches:
> drm_printk is used for both DRM_ERROR and DRM_DEBUG with unnecessary
> arguments that can be removed by creating separate functins.
>
> Create specific functions for these calls to reduce x86/64 defconfig
> size by ~20k.
>
> Modify the existing macros to
On 15.03.2018 11:56, Jacopo Mondi wrote:
> Document Thine THC63LVD1024 LVDS decoder device tree bindings.
>
> Signed-off-by: Jacopo Mondi
> ---
> .../bindings/display/bridge/thine,thc63lvd1024.txt | 63
> ++
> 1 file changed, 63 insertions(+)
> create mode 100644
> Document
On Fri, Mar 2, 2018 at 3:18 AM, Maxime Ripard wrote:
> Just like for the frontend, a single plane can use a YUV format. Make sure
> we have that constraint covered in our atomic_check.
It might be worth mentioning that this is a precursor patch for YUV support.
> Signed-off-by: Maxime Ripard
>
On Thu, Mar 15, 2018 at 4:10 AM, Oded Gabbay wrote:
> This patch fixes kernel build in ARCH=frv
>
> Signed-off-by: Oded Gabbay
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_a
https://bugs.freedesktop.org/show_bug.cgi?id=105515
--- Comment #3 from Alex Deucher ---
Please attach your full dmesg output.
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On Thu, Mar 15, 2018 at 11:31:57AM +0100, Daniel Vetter wrote:
> Is there any progress on getting cross-release enabled again?
Not yet, I'm still fighting the meltdown/spectre induced backlog.
We'll get to it eventually.
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The A80 supports RGB888 with H/V sync from LCD0. Add a pinmux setting
for the needed pins.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun9i-a80.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 6
Hi everyone,
This series adds basic support for the display pipelines found on the
Allwinner A80 SoC. Currently only parallel RGB output via TCON0 is
supported. TCON1 drives the HDMI encoder, which I've not been able to
get working yet.
Patch 1 adds device tree bindings for the TCONs on the A80.
The Cubieboard4 has a dumb VGA DAC connected to the output of LCD0,
providing VGA output through the onboard VGA connector. The DDC lines
are connected to i2c3.
The VGA DAC is a GM7123, which is compatible with Analog Devices'
ADV7123, except it only takes 3.3V power, and has a lower standby power
This patch adds support for the compatible strings of the A80 display
pipeline.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 7 +++
drivers/gpu/drm/sun4i/sun4i_drv.c | 12 ++--
drivers/gpu/drm/sun4i/sun6i_drc.c | 1 +
3 files changed, 18 insertion
The A80 has 2 or 3 TCONs. The documentation and vendor kernel are very
vague about the third TCON, to the point that it might not exist.
In the documentation, the first TCON is missing channel 1, and the
second is missing channel 0. However the vendor kernel seems to be
able to use them regardless
The display pipeline on the A80 SoC has what is called the Detail
Enhancement Unit, or DEU for short, block in between the display
frontend and backend. This unit can sharpen images in both luma
and chroma channels. It seems to also do colorspace conversion.
This patch adds the device tree binding
The Allwinner A80 SoC has 3 display pipelines, of which some parts are
documented:
- 3x display front ends (FE), documented
- 2x display enhancement units (DEU), undocumented
- 3x display back ends (BE), documented
- 2x dynamic range controller (DRC), undocumented
- 2x LCDC/TCONs, docume
The Allwinner A80 SoC has 2 documented TCONs. The display pipeline
diagram from the user manual shows a third TCON, but it's missing
an interrupt line, and its registers are not explained either.
It's also not used in Allwinner's vendor BSP.
The first TCON only has channel 0, for LCD panel output.
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