On 2017年10月09日 21:49, John Einar Reitan wrote:
sync_file_ioctl_fence_info has a race between filling the status
of the underlying fences and the overall status of the sync_file.
If fence transitions in the time frame between its sync_fill_fence_info
and the later dma_fence_is_signaled for the s
https://bugs.freedesktop.org/show_bug.cgi?id=93548
Timothy Arceri changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEEDINFO
On 10/07/2017 04:16 PM, Hans Verkuil wrote:
From: Hans Verkuil
This patch series adds CEC support to the drm adv7511/adv7533 drivers.
I have tested this with the Qualcomm Dragonboard C410 (adv7533 based)
and the Renesas R-Car Koelsch board (adv7511 based).
I only have the Koelsch board to t
On 10/02/2017 03:02 PM, Benjamin Gaignard wrote:
The goal of this series is to simplify driver code when they need to clean up
a previously allocated panel bridge.
Few drivers have "is_panel_bridge" flag to be able to distinguish a
drm_panel_bridge from "simple" drm_bridge.
To remove this flag
On 10/06/2017 07:32 PM, Daniel Vetter wrote:
On Fri, Oct 06, 2017 at 04:27:06PM +0530, Archit Taneja wrote:
The DSI runtime PM suspend/resume callbacks check whether
msm_host->cfg_hnd is non-NULL before trying to enable the bus clocks.
This is done to accommodate early calls to these functions
The DDC block for the HDMI controller is different on the A31.
This patch adds the register definitions.
Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/d
On SoCs with two display pipelines, it is possible that the two
pipelines are active at the same time, with potentially incompatible
dot clocks.
Let the HDMI encoder's TMDS clock go through all of its parents when
calculating possible clock rates. This allows usage of the second video
PLL as its p
Now that we support the HDMI controller on the A31 SoC, we can add it
to the device tree.
This adds a device node for the HDMI controller, and the of_graph nodes
connecting it to the 2 TCONs.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 55 +
The HDMI driver enables the bus and mod clocks in the bind function, but
does not disable them if it then bails our due to any errors. Neither
does it disable the clocks in the unbind function.
Fix this by adding a proper error path to the bind function, and
clk_disable_unprepare calls to the unbi
On systems with 2 TCONs such as the A31, it is possible to demux the
output of the TCONs to one encoder.
Add support for this for the A31.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 47 ++
1 file changed, 47 insertions(+)
diff --git
The HDMI driver is written with readl/writel I/O to the registers.
However, to support the A31 variant, which has a different layout
for the DDC registers, it was recommended to use regfields to have
a cleaner implementation. To use regfields, we need to create an
underlying regmap.
This patch onl
The HDMI controller found in earlier Allwinner SoCs have slight
differences between the A10, A10s, and the A31:
- Need different initial values for the PLL related registers
- Different behavior of the DDC and TMDS clocks
- Different register layout for the DDC portion
- Separate DDC pa
All the A31/A31s devices I own have some kind of HDMI connector wired
to the dedicated HDMI pins on the SoC:
- A31 Hummingbird (standard HDMI connector, display already enabled)
- Sinlinx SinA31s (standard HDMI connector)
- MSI Primo81 tablet (micro HDMI connector)
Enable the display pipeli
The HDMI controller in the A31 SoC is slightly different from the
earlier version. In addition to the TMDS clock and DDC controls,
this version now takes a second DDC clock input.
Add a compatible string for it, and add the DDC clock input to the
list of clocks required.
Signed-off-by: Chen-Yu Ts
Hi everyone,
This is v4 of my A31 HDMI support series. The DTS patches depend on
the patch "clk: sunxi-ng: sun6i: Export video PLLs" alreay merged.
The DRM patches depend on "regmap: add iopoll-like polling macro for
regmap_field" already merged on a topic branch in the regmap repository.
Changes
The HDMI controller found in the A31 SoCs is slightly different
from the one already supported, which is found in the A10s:
- Need different initial values for the PLL related registers
- Different behavior of the DDC and TMDS clocks
- Different register layout for the DDC portion
- Sep
Different SoCs have different muxing options and values for the TCON
outputs. Instead of stuffing every possibility in sun4i_tcon_set_mux(),
add a callback pointer to sun4i_tcon_quirks that each TCON variant
can use to provide muxing support.
The current muxing options in sun4i_tcon_set_mux() for
在 2017/10/9 21:05, Rob Herring 写道:
On Mon, Oct 9, 2017 at 3:06 AM, Sandy Huang wrote:
Hi rob,
Thanks for your reply.
在 2017/10/4 5:56, Rob Herring 写道:
On Fri, Sep 22, 2017 at 11:00:26AM +0800, Sandy Huang wrote:
This path add support rv1108 rgb output interface driver.
Signed-off-b
On 10/09/2017 03:08 PM, Mark Brown wrote:
> On Mon, Oct 09, 2017 at 02:25:47PM -0700, Laura Abbott wrote:
>
>> Anyway, to move this forward I think we need to see a proof of concept
>> of using selinux to protect access to specific heaps.
>
> Aren't Unix permissions enough with separate files or
tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
head: 72872c99b6dbc80362965cd30489c849f0663140
commit: 72872c99b6dbc80362965cd30489c849f0663140 [7/7] drm/i915: Check
PIN_NONFAULT overlaps in evict_for_node
config: x86_64-randconfig-x018-201741 (attached as .config)
compiler:
https://bugs.freedesktop.org/show_bug.cgi?id=102800
--- Comment #7 from higu...@gmx.net ---
I tried to downgrade the kernel to 4.11, 4.10 and 4.9 and i failed to enable
DRI_PRIME on the dedicated card, always with the same error. I then tried to
downgrade the mesa and libdrm to the distro original
tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
head: 72872c99b6dbc80362965cd30489c849f0663140
commit: 72872c99b6dbc80362965cd30489c849f0663140 [7/7] drm/i915: Check
PIN_NONFAULT overlaps in evict_for_node
config: x86_64-randconfig-x011-201741 (attached as .config)
compiler:
Hi Dave, Mark,
This branch against Linus' master contains the 3 pre-requisite patches
for Stoney ACP audio. Mark needs these patches to apply the rest of the
Stoney ACP patch set on the audio side. Please pull.
Thanks!
The following changes since commit 68ebe3cbe786a954481d6ded0dc83f7d551640bf
On Mon, Oct 09, 2017 at 02:25:47PM -0700, Laura Abbott wrote:
> Anyway, to move this forward I think we need to see a proof of concept
> of using selinux to protect access to specific heaps.
Aren't Unix permissions enough with separate files or am I
misunderstanding what you're looking to see a p
On 10/05/2017 06:06 AM, Benjamin Gaignard wrote:
> 2017-10-04 12:17 GMT+02:00 Mark Brown :
>> On Tue, Oct 03, 2017 at 04:08:30PM -0700, Sandeep Patil wrote:
>>
>>> It is entirely possible and easy in android/ueventd to create those nodes
>>> under "/dev/ion/". (assuming the heap 'subsystem' for th
https://bugs.freedesktop.org/show_bug.cgi?id=103142
--- Comment #2 from Gert Wollny ---
In summary, the optimizer gets stuck in an infinite loop in schedule_alu,
because prepare_alu_group() does not find a proper scheduling.
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https://bugs.freedesktop.org/show_bug.cgi?id=103102
--- Comment #6 from Hadrien ---
I tried Phoronix kernel image from Alex Deucher's drm-next-4.15-dc Git branch.
I still get the same problem with and without amdgpu.dc=1.
Oct 9 21:29:12 c18 kernel: [ 32.199451] [drm:amdgpu_vce_ring_test_ring
On Mon, Oct 9, 2017 at 4:59 AM, Daniel Vetter wrote:
> On Sun, Oct 08, 2017 at 03:43:35PM +0100, Chris Wilson wrote:
>> Quoting Harsha Sharma (2017-10-08 15:04:07)
>> > @@ -624,7 +624,7 @@ static bool intel_fbdev_init_bios(struct drm_device
>> > *dev,
>> > ifbdev->preferred_bpp = fb->base
On Mon, Sep 25, 2017 at 3:38 AM, Thierry Reding
wrote:
> On Sun, Sep 24, 2017 at 10:13:57PM +0530, Harsha Sharma wrote:
>> Replace all occurences of dev_info/err/dbg with DRM_DEV_INFO/
>> ERROR/DEBUG as we have DRM_DEV_* variants of drm print macros
>> Done using following coccinelle semantic patc
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@intel.com]
> Sent: Monday, October 09, 2017 5:30 AM
> To: intel-...@lists.freedesktop.org
> Cc: jani.nik...@intel.com; Deucher, Alexander; Thierry Reding; Rob Clark;
> Sean Paul; Manasi Navare; dri-devel@lists.freedesktop.org
> Su
Benjamin Gaignard writes:
> With a call to drm_of_panel_bridge_remove() we could remove
> the bridge without store it in vc4_dpi internal driver structure.
>
> Signed-off-by: Benjamin Gaignard
Reviewed-by: Eric Anholt
Thanks for doing this cleanup!
signature.asc
Description: PGP signature
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On Mon, Oct 09, 2017 at 09:39:38AM +0200, Maciej Purski wrote:
> Add HDMI and Sil9234 MHL converter to Trats2 board.
> Following in SoC devices have been enabled:
> - HDMI (HDMI signal encoder),
> - Mixer (video buffer scanout device),
> - I2C_5 bus (used for HDMI DDC)
> - I2C_8 bus (used for HDMI_
https://bugs.freedesktop.org/show_bug.cgi?id=103175
--- Comment #2 from Andy Furniss ---
Created attachment 134767
--> https://bugs.freedesktop.org/attachment.cgi?id=134767&action=edit
bad on latest 4.15-wip cpu still different but not as obvious.
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https://bugs.freedesktop.org/show_bug.cgi?id=103175
--- Comment #1 from Andy Furniss ---
Created attachment 134766
--> https://bugs.freedesktop.org/attachment.cgi?id=134766&action=edit
bad on previous 4.15 kernel cpu load different.
All tests done with both CPUs and GPU forced to perf.
--
Yo
https://bugs.freedesktop.org/show_bug.cgi?id=103175
Bug ID: 103175
Summary: R9285 Unreal tournament perf regression with agd5f
4.15-wip kernels possibly CPU related
Product: DRI
Version: DRI git
Hardware: Other
2017-10-09 Chris Wilson :
> Quoting John Einar Reitan (2017-10-09 14:49:36)
> > sync_file_ioctl_fence_info has a race between filling the status
> > of the underlying fences and the overall status of the sync_file.
> > If fence transitions in the time frame between its sync_fill_fence_info
> > and
Daniel Vetter writes:
> I just figured that -modesetting would be the simplest domenstration
> vehicle, since the vulkan patches don't look ready yet. I need fully
> reviewed&tested userspace before we can land any kernel stuff. Doing
> the quick modesetting conversion would unblock.
I've provid
On Mon, Oct 09, 2017 at 05:24:29PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2017-10-09 17:18:17)
> > On Mon, Sep 25, 2017 at 08:19:12PM +0100, Chris Wilson wrote:
> > > Quoting ville.syrj...@linux.intel.com (2016-04-01 19:48:50)
> > > > From: Ville Syrjälä
> > > >
> > > > Eliminate the
On 10/09/2017 02:21 AM, Benjamin Gaignard wrote:
> 2017-09-27 15:20 GMT+02:00 Benjamin Gaignard :
>> Make arguments checking more easy to read.
>>
>
> Hi Laura,
>
> Even if we don't have found a solution for the second patch I believe
> this one could be useful.
> May I ask you your point of view
Quoting Ville Syrjälä (2017-10-09 17:18:17)
> On Mon, Sep 25, 2017 at 08:19:12PM +0100, Chris Wilson wrote:
> > Quoting ville.syrj...@linux.intel.com (2016-04-01 19:48:50)
> > > From: Ville Syrjälä
> > >
> > > Eliminate the duplicate code for pipe timing readout in
> > > intel_crtc_mode_get() by
Am 09.10.2017 um 17:57 schrieb Ilia Mirkin:
On Mon, Oct 9, 2017 at 11:45 AM, Christian König
wrote:
Am 09.10.2017 um 16:41 schrieb Ilia Mirkin:
Hello,
As a bit of background, all NVIDIA GPUs since GT215 have an audio
subfunction for HDMI(/DP) audio to be sent to the sink. This generally
works
On Mon, Sep 25, 2017 at 08:19:12PM +0100, Chris Wilson wrote:
> Quoting ville.syrj...@linux.intel.com (2016-04-01 19:48:50)
> > From: Ville Syrjälä
> >
> > Eliminate the duplicate code for pipe timing readout in
> > intel_crtc_mode_get() by using the functions we use for the normal state
> > read
According to the API documentation, if we've set num_types, then the
return value should be HWC2::Error::HasChanges.
Signed-off-by: Rob Herring
---
drmhwctwo.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drmhwctwo.cpp b/drmhwctwo.cpp
index 89399bf1ba33..0f258770a8bb 100
On Mon, Oct 9, 2017 at 11:45 AM, Christian König
wrote:
> Am 09.10.2017 um 16:41 schrieb Ilia Mirkin:
>>
>> Hello,
>>
>> As a bit of background, all NVIDIA GPUs since GT215 have an audio
>> subfunction for HDMI(/DP) audio to be sent to the sink. This generally
>> works.
>>
>> However some, especia
From: Christian König
We need to figure out first how to correctly map them into the CPU page tables.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc_dma.c
b/drivers/gpu/drm/ttm/
Am 09.10.2017 um 16:41 schrieb Ilia Mirkin:
Hello,
As a bit of background, all NVIDIA GPUs since GT215 have an audio
subfunction for HDMI(/DP) audio to be sent to the sink. This generally
works.
However some, especially laptop, devices come up with that function
disabled. We have a quirk to ena
Den 09.10.2017 11.06, skrev Daniel Thompson:
On 06/10/17 19:01, Noralf Trønnes wrote:
Den 03.10.2017 11.04, skrev Daniel Vetter:
On Tue, Oct 03, 2017 at 09:51:49AM +0100, Daniel Thompson wrote:
On 03/10/17 09:03, Daniel Vetter wrote:
On Mon, Oct 02, 2017 at 12:00:54PM +0300, Jani Nikula wro
https://bugs.freedesktop.org/show_bug.cgi?id=93301
Nicolai Hähnle changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Hello,
As a bit of background, all NVIDIA GPUs since GT215 have an audio
subfunction for HDMI(/DP) audio to be sent to the sink. This generally
works.
However some, especially laptop, devices come up with that function
disabled. We have a quirk to enable it when coming back from runpm,
but that d
https://bugzilla.kernel.org/show_bug.cgi?id=196615
--- Comment #19 from klavkala...@gmail.com ---
The code is still there in 4.14-rc4.
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Hey Thierry,
On Sat, 2017-10-07 at 01:29 +0200, Thierry Reding wrote:
> On Fri, Oct 06, 2017 at 04:46:48PM -0500, Rob Herring wrote:
> > The DRM_REFLECT_* and DRM_ROTATE_* defines were not upstream, but
> > now
> > they are. Convert to using the upstream version which are defined
> > as a
> > bit
Hey again,
Just pushed this patch.
Rob.
On Mon, 2017-10-09 at 15:58 +0200, Robert Foss wrote:
> Hey Thierry,
>
> On Mon, 2017-10-09 at 15:07 +0200, Thierry Reding wrote:
> > On Fri, Oct 06, 2017 at 05:02:03PM -0500, Rob Herring wrote:
> > > There's no opensource implementation for the NVIDIA g
Hey Thierry,
On Mon, 2017-10-09 at 15:07 +0200, Thierry Reding wrote:
> On Fri, Oct 06, 2017 at 05:02:03PM -0500, Rob Herring wrote:
> > There's no opensource implementation for the NVIDIA gralloc
> > implementation,
> > so remove it as it is not testable.
> >
> > As all of the gralloc perform()
Quoting John Einar Reitan (2017-10-09 14:49:36)
> sync_file_ioctl_fence_info has a race between filling the status
> of the underlying fences and the overall status of the sync_file.
> If fence transitions in the time frame between its sync_fill_fence_info
> and the later dma_fence_is_signaled for
sync_file_ioctl_fence_info has a race between filling the status
of the underlying fences and the overall status of the sync_file.
If fence transitions in the time frame between its sync_fill_fence_info
and the later dma_fence_is_signaled for the sync_file, the returned
information is inconsistent
On Fri, Oct 06, 2017 at 05:02:03PM -0500, Rob Herring wrote:
> There's no opensource implementation for the NVIDIA gralloc implementation,
> so remove it as it is not testable.
>
> As all of the gralloc perform() operations are specific to it, they can be
> removed, too.
>
> Signed-off-by: Rob He
On Mon, Oct 9, 2017 at 3:06 AM, Sandy Huang wrote:
> Hi rob,
> Thanks for your reply.
>
> 在 2017/10/4 5:56, Rob Herring 写道:
>>
>> On Fri, Sep 22, 2017 at 11:00:26AM +0800, Sandy Huang wrote:
>>>
>>> This path add support rv1108 rgb output interface driver.
>>>
>>> Signed-off-by: Sandy Huang
>
https://bugs.freedesktop.org/show_bug.cgi?id=103168
Chris Wilson changed:
What|Removed |Added
Component|DRM/Intel |IGT
QA Contact|intel-gfx-bugs@li
https://bugs.freedesktop.org/show_bug.cgi?id=103138
--- Comment #4 from Christian König ---
Created attachment 134764
--> https://bugs.freedesktop.org/attachment.cgi?id=134764&action=edit
Possible fix
No problem, does the attached patch help?
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Hey Rob,
I tested the patch on the imx6/etnaviv platform, and it all works.
So I pushed the patch with t-b && r-b tags attached.
Rob.
On Fri, 2017-10-06 at 17:20 -0500, Rob Herring wrote:
> There's no point in using a gralloc perform() op to retrieve the
> usage as
> it is already stored in the
Op 09-10-17 om 08:46 schreef Jeffy Chen:
> Kmemleak reported memory leak after suspend and resume:
> unreferenced object 0xffc0e31d8880 (size 128):
> comm "bash", pid 181, jiffies 4294763583 (age 24.694s)
> hex dump (first 32 bytes):
> 01 00 00 00 00 00 00 00 00 20 a2 eb c0 ff ff ff ..
Hey Rob,
+Thierry
This looks good to me, does anyone have a strong opinion the other way?
I'll let this one soak for a day or two more.
Rob.
On Fri, 2017-10-06 at 17:02 -0500, Rob Herring wrote:
> There's no opensource implementation for the NVIDIA gralloc
> implementation,
> so remove it as i
Hey Rob,
This looks good to me, added r-b and pushed.
Rob.
On Fri, 2017-10-06 at 16:46 -0500, Rob Herring wrote:
> The DRM_REFLECT_* and DRM_ROTATE_* defines were not upstream, but now
> they are. Convert to using the upstream version which are defined as
> a
> bit mask rather than a bit positi
Hey Rob,
This looks good to me, feel free to add my r-b.
Rob.
On Fri, 2017-10-06 at 16:31 -0500, Rob Herring wrote:
> Add the new DRM_MODE_ROTATE_* and DRM_MODE_REFLECT_* defines from
> v4.14-rc1
> kernel.
>
> Signed-off-by: Rob Herring
> ---
> include/drm/drm_mode.h | 47
> +
Hey,
On 9 October 2017 at 11:30, Jani Nikula wrote:
> On Tue, 03 Oct 2017, Jani Nikula wrote:
>> I merged this last week with Daniel's IRC ack. We'll need to give people
>> a little bit of time before updating nightly.conf. Sorry for the
>> inconvenience in the mean time.
>
> Andrzej, all the bi
On Mon, Oct 09, 2017 at 12:29:57PM +0300, Jani Nikula wrote:
> Falling back to the lowest value is likely the only thing we can do, but
> doing it silently seems like a bad thing to do. Catch it early and make
> loud noises.
>
> Cc: Alex Deucher
> Cc: Thierry Reding
> Cc: Rob Clark
> Cc: Sean P
On Tue, 03 Oct 2017, Jani Nikula wrote:
> I merged this last week with Daniel's IRC ack. We'll need to give people
> a little bit of time before updating nightly.conf. Sorry for the
> inconvenience in the mean time.
Andrzej, all the bits and pieces for this have been pushed, so https://
should ju
tree: git://anongit.freedesktop.org/drm-intel for-linux-next
head: a883241c3922000b21b58b5740c55badfe09940f
commit: 0a03852e049af91da9ae70326c44bb5d9b0d377a [18/27] drm/i915: support 2M
pages for the 48b PPGTT
config: x86_64-randconfig-b0-10091604 (attached as .config)
compiler: gcc-4.4 (Debia
There is no reason to wait for clock stabilization here, as the clock
framework guarantees that PLL clock sources are stable before clk_enable
returns.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/etn
After reset assertion, we only have to wait for the reset signals to
propagate through the GPU before deasserting the reset again. A few
hundred clock cycles should be more than enough. Replace the msleep(1),
which can actually take about 30 ms on i.MX6Q in some configurations,
with an usleep_range
Falling back to the lowest value is likely the only thing we can do, but
doing it silently seems like a bad thing to do. Catch it early and make
loud noises.
Cc: Alex Deucher
Cc: Thierry Reding
Cc: Rob Clark
Cc: Sean Paul
Cc: Manasi Navare
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Ja
2017-09-27 15:20 GMT+02:00 Benjamin Gaignard :
> Make arguments checking more easy to read.
>
Hi Laura,
Even if we don't have found a solution for the second patch I believe
this one could be useful.
May I ask you your point of view on those few lines ?
Benjamin
> Signed-off-by: Benjamin Gaigna
On 06/10/17 19:01, Noralf Trønnes wrote:
Den 03.10.2017 11.04, skrev Daniel Vetter:
On Tue, Oct 03, 2017 at 09:51:49AM +0100, Daniel Thompson wrote:
On 03/10/17 09:03, Daniel Vetter wrote:
On Mon, Oct 02, 2017 at 12:00:54PM +0300, Jani Nikula wrote:
On Mon, 02 Oct 2017, Daniel Thompson
wrot
On Sun, Oct 08, 2017 at 03:43:35PM +0100, Chris Wilson wrote:
> Quoting Harsha Sharma (2017-10-08 15:04:07)
> > @@ -624,7 +624,7 @@ static bool intel_fbdev_init_bios(struct drm_device
> > *dev,
> > ifbdev->preferred_bpp = fb->base.format->cpp[0] * 8;
> > ifbdev->fb = fb;
> >
> >
On Fri, Oct 06, 2017 at 01:44:48PM -0500, Brad Walker wrote:
> I noticed this email address is listed as the relevant area for the
> Documentation/devicetree/bindings/video/ directory in the Linux kernel. I
> have a question about this.
>
> I noticed the Documentation/devicetree/bindings/video/ is
2017-10-02 11:34 GMT+02:00 Benjamin Gaignard :
> With a call to drm_of_panel_bridge_remove() we could remove
> the bridge without store it in vc4_dpi internal driver structure.
+ Eric to get his point of view on that
>
> Signed-off-by: Benjamin Gaignard
> ---
> drivers/gpu/drm/vc4/vc4_dpi.c | 1
On 06.10.2017 19:23, Rob Herring wrote:
> On Fri, Oct 6, 2017 at 6:10 AM, Andrzej Hajda wrote:
>> Hi Rob,
>>
>> Thanks for review.
>>
>> On 06.10.2017 01:12, Rob Herring wrote:
>>> On Thu, Sep 28, 2017 at 03:07:27PM +0200, Andrzej Hajda wrote:
These bindings allows to describe most known stan
The patch 6e8edf8a7d8d: "drm/exynos: Fix suspend/resume support" introduced
a new code in suspend/resume paths. However it unconditionally dereference
drm_dev pointer, which might be NULL if suspend/resume happens before
Exynos DRM driver components bind. This patch fixes this issue.
Reported-by:
When components are unbound, DRM driver is unregistered and freed,
so clear drvdata to avoid potential use-after-free issue in
suspend/resume paths.
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/exynos_drm_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/exy
The header drivers/gpu/drm/i915/i915_gem_context.h requires the
definition of struct radix_tree_root, but does not need to know
anything about other radix tree stuff.
Include instead of to
reduce the number of included header files.
While we are here, let's add missing where
radix tree accesso
The motivation of this series is to cut down unnecessary header
dependency in terms of radix tree.
Sub-systems or drivers that use radix-tree for data management
typically embed struct radix_tree_root in their data structures,
like this:
struct foo {
...
struct radix_tree_root f
On Mon, Oct 09, 2017 at 01:10:01AM +0900, Masahiro Yamada wrote:
<...>
>
> By splitting out the radix_tree_root definition,
> we can reduce the header file dependency.
>
> Reducing the header dependency will help for speeding the kernel
> build, suppressing unnecessary recompile of objects during
> Eric Anholt hat am 8. Oktober 2017 um 19:09 geschrieben:
>
>
> Stefan Wahren writes:
>
> > Hi Eric,
> >
> >> Eric Anholt hat am 6. Oktober 2017 um 21:42 geschrieben:
> >>
> >>
> >> Stefan Wahren writes:
> >>
> >> > This fixes the race between vc4_overflow_mem_work and the init of the
>
2017-10-09 3:52 GMT+09:00 Leon Romanovsky :
> On Mon, Oct 09, 2017 at 01:10:01AM +0900, Masahiro Yamada wrote:
>
> <...>
>>
>> By splitting out the radix_tree_root definition,
>> we can reduce the header file dependency.
>>
>> Reducing the header dependency will help for speeding the kernel
>> buil
On Mon, Oct 09, 2017 at 02:58:58PM +0900, Masahiro Yamada wrote:
> 2017-10-09 3:52 GMT+09:00 Leon Romanovsky :
> > On Mon, Oct 09, 2017 at 01:10:01AM +0900, Masahiro Yamada wrote:
> >
> > <...>
> >>
> >> By splitting out the radix_tree_root definition,
> >> we can reduce the header file dependency.
On Mon, Oct 09, 2017 at 04:16:20PM +0800, Jia-Ju Bai wrote:
> The drivers vt6655 and gma500 call pci_set_power_state under a spinlock,
> which may sleep.
> The function call paths are:
> gma_power_begin (acquire the spinlock) (drivers/gpu/drm/gma500/power.c)
> gma_resume_pci
> pci_set_power_
Some Rockchip CRTCs, like rv1108, can directly output parallel and
serial RGB data to panel or conversion chip, so we add this driver to
probe encoder and connector.
Signed-off-by: Sandy Huang
---
Changes in v3:
update for rgb-mode move to panel node.
Changes in v2:
1. add error log when prob
This patch add serial RGB output interface for rockchip vop, the
more info about serial RGB output interface described at the
following file:
Documentation/devicetree/bindings/display/panel/panel-rgb.txt
Signed-off-by: Sandy Huang
---
Changes in v3: None
Changes in v2: None
drivers/gpu/drm/roc
This patches add support rockchip RGB output, Some Rockchip CRTCs, like rv1108,
can directly output parallel and serial RGB data to panel or to conversion chip.
So we add this driver to probe encoder and connector to support this case.
Sandy Huang (4):
devicetree/bindings: display: Add doucument
Hi rob,
Thanks for your reply.
在 2017/10/4 5:56, Rob Herring 写道:
On Fri, Sep 22, 2017 at 11:00:26AM +0800, Sandy Huang wrote:
This path add support rv1108 rgb output interface driver.
Signed-off-by: Sandy Huang
---
Changes in v2:
1. rename rockchip,rgb-mode to rgb-mode;
You can't just
Describe the panel property rgb-mode for parallel and serial
RGB output interface, include the connection relations for each
mode.
Signed-off-by: Sandy Huang
---
.../bindings/display/panel/panel-rgb.txt | 116 +
1 file changed, 116 insertions(+)
create mode 100644
This path add support rv1108 rgb output interface driver.
Signed-off-by: Sandy Huang
---
Changes in v3:
move rgb-mode to panel node which describe at:
Documentation/devicetree/bindings/display/panel/panel-rgb.txt
Changes in v2:
1. rename rockchip,rgb-mode to rgb-mode;
2. delete reg for signl
https://bugs.freedesktop.org/show_bug.cgi?id=103142
Gert Wollny changed:
What|Removed |Added
Attachment #134738|0 |1
is obsolete|
Add HDMI and Sil9234 MHL converter to Trats2 board.
Following in SoC devices have been enabled:
- HDMI (HDMI signal encoder),
- Mixer (video buffer scanout device),
- I2C_5 bus (used for HDMI DDC)
- I2C_8 bus (used for HDMI_PHY control).
Based on previous work by:
Tomasz Stanislawski
Signed-off-
On Wed, 04 Oct 2017, Daniel Vetter wrote:
> On Tue, Oct 03, 2017 at 09:38:10AM -0600, Jordan Crouse wrote:
>> I spent an embarrassingly long time looking for drm_gem_init_object()
>> before I realized I was actually looking for drm_gem_object_init().
>> Fix the typo to keep other poor developers f
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