https://bugs.freedesktop.org/show_bug.cgi?id=101837
--- Comment #8 from Daniel Power ---
I appreciate your suggestions to make changes to radeontop. I have made note of
that in my bug report to radeontop. However, I am not a C developer, and don't
know how to make the changes myself.
I created t
On Fri, Jul 21, 2017 at 06:17:15AM -0500, Brijesh Singh wrote:
>
> On 7/20/17 10:24 PM, Jason Wang wrote:
> >
> >
> > On 2017年07月20日 06:09, Brijesh Singh wrote:
> >> I have found that OVMF fails to detect the disk when iommu_platform
> >> is set from
> >> qemu cli. The failure occurs during the fe
Currently the hikey dsi logic cannot generate accurate byte
clocks values for all pixel clock values. Thus if a mode clock
is selected that cannot match the calculated byte clock, the
device will boot with a blank screen.
This patch uses the new mode_valid callback (many thanks to
Jose Abreu for u
A bug that I had fixed earlier just came back, with CONFIG_EXTCON=m,
the rockchip drm driver will fail to link:
drivers/gpu/drm/rockchip/cdn-dp-core.o: In function `cdn_dp_get_port_lanes':
cdn-dp-core.c:(.text.cdn_dp_get_port_lanes+0x30): undefined reference to
`extcon_get_state'
cdn-dp-core.c:(.
The new PRE/PRG driver code causes a link failure when DRM is disabled:
drivers/gpu/ipu-v3/ipu-pre.o: In function `ipu_pre_configure':
ipu-pre.c:(.text.ipu_pre_configure+0x18): undefined reference to
`drm_format_info'
drivers/gpu/ipu-v3/ipu-prg.o: In function `ipu_prg_format_supported':
ipu-prg.c
The rework of the exynos DRM clock handling introduced
warnings for configurations that have CONFIG_PM disabled:
drivers/gpu/drm/exynos/exynos_hdmi.c:736:13: error: 'hdmi_clk_disable_gates'
defined but not used [-Werror=unused-function]
static void hdmi_clk_disable_gates(struct hdmi_context *hda
On 17-06-29 23:02:08, Ville Syrjälä wrote:
On Fri, Jun 23, 2017 at 09:45:44AM -0700, Ben Widawsky wrote:
v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.
This requires rebase on the correct Ville patches
Cc: Daniel Stone
Cc: Kristian Høgsberg
Signed-off-by: Ben Widawsky
---
d
https://bugs.freedesktop.org/show_bug.cgi?id=100289
--- Comment #12 from omegap...@startmail.com ---
I have reached this again, and can confirm that even with a kernel boot
parameter of 'drm.debug=0x01', when I get '(WW) RADEON(0): flip queue failed in
radeon_scanout_flip: Invalid argument' in Xor
https://bugs.freedesktop.org/show_bug.cgi?id=101872
--- Comment #3 from hecmundo ---
(In reply to Dylan Baker from comment #2)
> This was previous reported, but the reporter never tested the patches I sent.
> They're available here, if they work please send a tested-by and I'll merge
> them to ma
Hi,
On 21-07-17 09:24, Daniel Vetter wrote:
Hi Greg&Hans,
How are we going to handle this now? The refactor is deeply burried in
drm-misc, I guess you could cherry-pick the relevant patches over. But
that'll probably lead to more conflicts because git will get confused.
Or you could just delet
Den 20.07.2017 10.00, skrev Daniel Vetter:
On Thu, Jul 20, 2017 at 12:13:07AM +0200, Noralf Trønnes wrote:
Den 19.07.2017 23.01, skrev Eric Anholt:
Noralf Trønnes writes:
Add a common drm_driver.dumb_map_offset function for GEM backed drivers.
Signed-off-by: Noralf Trønnes
Instead of jus
Den 20.07.2017 10.10, skrev Daniel Vetter:
On Tue, Jul 18, 2017 at 05:42:28PM +0200, Noralf Trønnes wrote:
Den 12.07.2017 15.46, skrev Noralf Trønnes:
Add a library for drivers that can use a simple representation
of a GEM backed framebuffer.
Signed-off-by: Noralf Trønnes
---
This patch add
https://bugs.freedesktop.org/show_bug.cgi?id=101872
Dylan Baker changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=101872
hecmundo changed:
What|Removed |Added
Component|tests |IGT
Version|unspecified
Hi Dave,
The following changes since commit 9ff1beb1d19ffe2b26bf9cd2d33e6073d4f4b5fe:
Merge tag 'drm-intel-fixes-2017-06-27' of
git://anongit.freedesktop.org/git/drm-intel into drm-fixes (2017-06-28 17:07:15
+1000)
are available in the git repository at:
git://people.freedesktop.org/~syeh
There's a failure mode I didn't take into account:
1. You start a dim rebuild-tip, and update your rr-cache. Because you
didn't push for a while, this adds some really old files (but with
today's timestamp).
2. 2nd person finished their dim rebuild-tip and garbage-collects the
old rr-cache entrie
From: Christian König
With hardware resets in mind it is possible that all shared fences are
signaled, but the exlusive isn't. Fix waiting for everything in this situation.
Signed-off-by: Christian König
---
drivers/dma-buf/reservation.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
d
Without CONFIG_OF, we can run into a build error:
drivers/gpu/drm/tegra/dpaux.c:378:20: error:
'pinconf_generic_dt_node_to_map_group' undeclared here (not in a function); did
you mean 'pinconf_generic_params'?
.dt_node_to_map = pinconf_generic_dt_node_to_map_group,
^~~~
On Fri, 21 Jul 2017, Chris Wilson wrote:
> Quoting Jani Nikula (2017-07-21 08:22:27)
>> On Thu, 20 Jul 2017, Chris Wilson wrote:
>> > Before we interpret drm_dp_downstream_id() as a string, make sure it is
>> > NULL terminated, even when drm_dp_downtsream_id() fails.
>> >
>> > Bugzilla: https://b
Quoting Jani Nikula (2017-07-21 08:22:27)
> On Thu, 20 Jul 2017, Chris Wilson wrote:
> > Before we interpret drm_dp_downstream_id() as a string, make sure it is
> > NULL terminated, even when drm_dp_downtsream_id() fails.
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101660
> > Si
https://bugs.freedesktop.org/show_bug.cgi?id=101837
--- Comment #7 from Emil Velikov ---
(In reply to Lauri Kasanen from comment #6)
> Yes. That is done by the OS. This is standard practice in the embedded
> world, saving pointless code.
This is getting really off-topic. We might want to spend th
On Fri, 21 Jul 2017, Jani Nikula wrote:
> On Thu, 20 Jul 2017, Chris Wilson wrote:
>> Before we interpret drm_dp_downstream_id() as a string, make sure it is
>> NULL terminated, even when drm_dp_downtsream_id() fails.
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101660
>> Signed-o
https://bugs.freedesktop.org/show_bug.cgi?id=101787
--- Comment #10 from 247 ---
Created attachment 132816
--> https://bugs.freedesktop.org/attachment.cgi?id=132816&action=edit
vainfo
just attached the vainfo result...the gst command instead results in a syntax
error...just in case there are n
https://bugs.freedesktop.org/show_bug.cgi?id=101837
--- Comment #6 from Lauri Kasanen ---
Yes. That is done by the OS. This is standard practice in the embedded world,
saving pointless code.
--
You are receiving this mail because:
You are the assignee for the bug.___
Sorry for late response.
On Friday 14 July 2017 07:25 PM, Sean Paul wrote:
On Fri, Jul 14, 2017 at 04:51:43PM +0530, Ramalingam C wrote:
DRM connector property is created to represent the content protection
state of the connector and to configure the same.
CP States defined:
DRM_CP_UN
https://bugs.freedesktop.org/show_bug.cgi?id=101832
Emil Velikov changed:
What|Removed |Added
CC||timothy.o.row...@intel.com
--- Comment #
Em Thu, 13 Jul 2017 13:50:20 +0100
Kieran Bingham escreveu:
> On 26/06/17 19:12, Laurent Pinchart wrote:
> > The sink pointer is used to configure routing inside the VSP, and as
> > such must point to the next VSP entity in the pipeline. The WPF being a
> > pipeline terminal sink, its output rout
Em Thu, 13 Jul 2017 14:00:31 +0100
Kieran Bingham escreveu:
> Hi Laurent,
>
> This looks like a good simplification/removal of obfuscation to me!
>
> On 26/06/17 19:12, Laurent Pinchart wrote:
> > The internal VSP entity source and sink pointers are stored as
> > media_entity pointers, which ar
Hello
Just for the record, I'm seeing the same issue when running a Debian
image with 4.12 in a VM.
If I don't switch away from plymouth and to the text console under boot,
the whole system freeze.
I manged to get this log, by starting plymouthd manually after boot:
plymouthd --debug --debug
On Thu, Jul 20, 2017 at 01:54:04PM +0100, Liviu Dudau wrote:
> On Thu, Jul 20, 2017 at 12:44:49PM +0100, Russell King - ARM Linux wrote:
> > Actually, scrub that idea - drm_helper_probe_single_connector_modes()
> > calls drm_edid_to_eld() for these cases anyway, so we must call
> > drm_helper_probe
Em Thu, 13 Jul 2017 18:02:20 +0100
Kieran Bingham escreveu:
> Hi Laurent,
>
> On 26/06/17 19:12, Laurent Pinchart wrote:
> > When the display start interrupt occurs, we know that the hardware has
> > finished loading the active display list. The driver then proceeds to
> > recycle the list, assu
The physical size of the panel is 105.5 (W) x 67.2 (H) x 4.05 (D) mm
but the active display area is 95.04 (W) x 53.856 (H) mm.
The width and height should be set to the active display area.
Signed-off-by: Jonathan Liu
---
drivers/gpu/drm/panel/panel-simple.c | 4 ++--
1 file changed, 2 insertio
On Wed, Jul 19, 2017 at 05:25:04PM +0200, Philipp Zabel wrote:
> The reset control API has two modes: exclusive access, where the driver
> expects to have full and immediate control over the state of the reset
> line, and shared (clock-like) access, where drivers only request reset
> deassertion wh
Em Thu, 13 Jul 2017 14:38:40 +0100
Kieran Bingham escreveu:
> On 26/06/17 19:12, Laurent Pinchart wrote:
> > The Blend/ROP Sub Unit (BRS) is a stripped-down version of the BRU found
> > in several VSP2 instances. Compared to a regular BRU, it supports two
> > inputs only, and thus has no ROP unit
Em Mon, 26 Jun 2017 21:12:22 +0300
Laurent Pinchart escreveu:
> The R-Car H3 ES2.0 VSP-DL instance has two LIF entities and can drive
> two display pipelines at the same time. Refactor the VSP DRM code to
> support that by introducing a vsp_drm_pipeline object that models one
> display pipeline.
The cacheflush prototypes currently use start and stop values and each
call requires typecasting the address to an unsigned long.
This patch changes the cacheflush prototypes to follow the x86 style of
using a base and size values, with base being a void pointer.
All callers of the cacheflush func
Em Fri, 14 Jul 2017 03:35:57 +0300
Laurent Pinchart escreveu:
> New Gen3 SoCs come with two new VSP2 variants names VSP2-BS and VSP2-DL,
> as well as a new VSP2-D variant on V3M and V3H SoCs. Add new entries for
> them in the VSP device info table.
>
> Signed-off-by: Laurent Pinchart
> Reviewed
On Thu, Jul 20, 2017 at 03:19:10PM +0100, Liviu Dudau wrote:
> On Thu, Jul 20, 2017 at 02:08:29PM +0100, Russell King - ARM Linux wrote:
> > On Thu, Jul 20, 2017 at 01:54:04PM +0100, Liviu Dudau wrote:
> > > On Thu, Jul 20, 2017 at 12:44:49PM +0100, Russell King - ARM Linux wrote:
> > > > Actually,
Em Thu, 13 Jul 2017 13:48:40 +0100
Kieran Bingham escreveu:
> Hi Laurent,
>
> Starts easy ... (I haven't gone through these in numerical order of course :D)
>
> On 26/06/17 19:12, Laurent Pinchart wrote:
> > The display list headers are filled using information from the display
> > list only. L
Geert Uytterhoeven writes:
> On Thu, Jul 20, 2017 at 1:43 PM, Michael Ellerman wrote:
>> Matt Brown writes:
>>> The cacheflush prototypes currently use start and stop values and each
>>> call requires typecasting the address to an unsigned long.
>>> This patch changes the cacheflush prototypes
Hello,
On Wed, 19 Jul 2017 17:25:04 +0200, Philipp Zabel wrote:
> The reset control API has two modes: exclusive access, where the driver
> expects to have full and immediate control over the state of the reset
> line, and shared (clock-like) access, where drivers only request reset
> deassertion
On Thu, Jul 20, 2017 at 5:55 AM, Philipp Zabel wrote:
> Hi Thomas,
>
> On Thu, 2017-07-20 at 12:36 +0200, Thomas Petazzoni wrote:
>> Hello,
>>
>> On Thu, 20 Jul 2017 11:36:55 +0200, Philipp Zabel wrote:
>>
>> > > I don't know if it has been discussed in the past, so forgive me if it
>> > > has bee
mimic the behavior of vblank_disable_fn(), another caller of
drm_vblank_disable_and_save().
This avoids oopsing, while trying to disable vblank on a not connected display:
[ 12.768079] WARNING: CPU: 0 PID: 274 at drivers/gpu/drm/drm_vblank.c:609
drm_calc_vbltimestamp_from_scanoutpos+0x296/0x32
Add driver for Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480)
TFT with Touch-Panel.
Datasheet available at:
http://www.glyn.de/data/glyn/media/doc/43wvf1g-0.pdf
Seiko 43WVF1G panel has two power supplies: avdd and dvdd and they
require a specific power on/down sequence.
For this reason the si
Em Thu, 13 Jul 2017 18:57:40 +0100
Kieran Bingham escreveu:
> Hi Laurent,
>
> On 26/06/17 19:12, Laurent Pinchart wrote:
> > The VSP2-DL instance (present in the H3 ES2.0 and M3-N SoCs) has two LIF
> > instances. Adapt the driver infrastructure to support multiple LIFs.
> > Support for multiple
On Thu, Jul 20, 2017 at 12:38:53PM +0100, Russell King - ARM Linux wrote:
> On Thu, Jul 20, 2017 at 12:04:50PM +0100, Liviu Dudau wrote:
> > When enabling lockdep debugging on Juno platform with HDLCD and TDA998x
> > I get the following warning from the system:
> >
> > [ 25.990733] =
On Wed, Jul 19, 2017 at 05:25:04PM +0200, Philipp Zabel wrote:
> The reset control API has two modes: exclusive access, where the driver
> expects to have full and immediate control over the state of the reset
> line, and shared (clock-like) access, where drivers only request reset
> deassertion wh
Well, I tried that (attached), but it didn't work either. For some
reason the error worker seems to stop after the disable. Possibly the
irq flood keeps it from running, so maybe it should catch all the errors
(I see underflows too).
Sorry, but I can't use more time on this today, and I'm leaving
Mh ok,
paper over in nouveau_display_fini until Ben comes up with a better idea
then?!
Greetings,
Tobias
On 7/20/17 10:13 AM, Daniel Vetter wrote:
> On Wed, Jul 19, 2017 at 04:10:50PM -0400, Ilia Mirkin wrote:
>> I believe the solution is to not call drm_crtc_vblank_off for atomic
>> modesett
Em Thu, 13 Jul 2017 14:06:04 +0100
Kieran Bingham escreveu:
> On 26/06/17 19:12, Laurent Pinchart wrote:
> > When the VSP1 is used in a DRM pipeline the driver doesn't register the
> > media device. Links between entities are not exposed to userspace, but
> > are still used internally for the sol
Hi Matt,
Thanks for tackling this mess.
Matt Brown writes:
> The cacheflush prototypes currently use start and stop values and each
> call requires typecasting the address to an unsigned long.
> This patch changes the cacheflush prototypes to follow the x86 style of
> using a base and size value
Em Wed, 12 Jul 2017 01:29:42 +0300
Laurent Pinchart escreveu:
> From: Kieran Bingham
>
> The driver recently switched from handling page flip completion in the
> DU vertical blanking handler to the VSP frame end handler to fix a race
> condition. This unfortunately resulted in incorrect timesta
Em Fri, 14 Jul 2017 02:04:06 +0300
Laurent Pinchart escreveu:
> On Thursday 13 Jul 2017 14:16:03 Kieran Bingham wrote:
> > On 26/06/17 19:12, Laurent Pinchart wrote:
> > > In the H3 ES2.0 SoC the VSP2-DL instance has two connections to DU
> > > channels that need to be configured independently.
Hi Greg,
The patches in this series are completely independent of each other, and
I would like the subsystem maintainers to apply them at their own
leisure.
Well, except for the last one, which I will apply only after there are
no more users of the transition helpers.
On Thu, 2017-07-20 at 10:11
The reset control API has two modes: exclusive access, where the driver
expects to have full and immediate control over the state of the reset
line, and shared (clock-like) access, where drivers only request reset
deassertion while active, but don't care about the state of the reset line
while inac
On Thu, Jul 20, 2017 at 12:04:50PM +0100, Liviu Dudau wrote:
> When enabling lockdep debugging on Juno platform with HDLCD and TDA998x
> I get the following warning from the system:
>
> [ 25.990733] ==
> [ 25.998637] WARNING: possible circula
Hello,
On Thu, 20 Jul 2017 11:36:55 +0200, Philipp Zabel wrote:
> > I don't know if it has been discussed in the past, so forgive me if it
> > has been. Have you considered adding a "int flags" argument to the
> > existing reset_control_get_*() functions, rather than introducing
> > separate excl
On 19-07-17, 13:13, Chris Wilson wrote:
> Quoting Viresh Kumar (2017-06-29 10:19:59)
> > diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
> > b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
> > index 7d3741215387..0ee9bd0041cd 100644
> > --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
> > +++ b/
Hi Thomas,
On Wed, 2017-07-19 at 21:15 +0200, Thomas Petazzoni wrote:
> Hello,
>
> On Wed, 19 Jul 2017 17:25:04 +0200, Philipp Zabel wrote:
> > The reset control API has two modes: exclusive access, where the driver
> > expects to have full and immediate control over the state of the reset
> > li
Em Mon, 26 Jun 2017 21:12:23 +0300
Laurent Pinchart escreveu:
> The VSP supports both header and headerless display lists. The latter is
> easier to use when the VSP feeds data directly to the DU in continuous
> mode, and the driver thus uses headerless display lists for DU operation
> and header
Goto the right label in case of error, otherwise there is a leak.
This has been introduced by c5cf9a9147ff. In this patch a goto has not been
updated.
Fixes: c5cf9a9147ff ("drm/i915: Create a kmem_cache to allocate struct
i915_priolist from")
Signed-off-by: Christophe JAILLET
---
drivers/gpu/dr
Hi Thomas,
On Thu, 2017-07-20 at 12:36 +0200, Thomas Petazzoni wrote:
> Hello,
>
> On Thu, 20 Jul 2017 11:36:55 +0200, Philipp Zabel wrote:
>
> > > I don't know if it has been discussed in the past, so forgive me if it
> > > has been. Have you considered adding a "int flags" argument to the
> >
https://bugs.freedesktop.org/show_bug.cgi?id=75064
Alan Swanson changed:
What|Removed |Added
Product|xorg|DRI
Assignee|xorg-driver-...@li
https://bugzilla.kernel.org/show_bug.cgi?id=196197
--- Comment #10 from Andreas Brogle (an...@ok.de) ---
Got the opportunity to test the RV630 XT [Radeon HD 2600 XT] card at an other
mainboard. It works as it should. So the problem seems to be mainboard
specific.
TYAN Thunder h2000M S3992-E
Expan
https://bugs.freedesktop.org/show_bug.cgi?id=101837
--- Comment #5 from Emil Velikov ---
(In reply to Lauri Kasanen from comment #4)
> The DRM node must be opened (and kept open for the lifetime of the app) to
> make the VRAM queries, or to make the register queries on kernels that
> prohibit dir
https://bugs.freedesktop.org/show_bug.cgi?id=101377
--- Comment #1 from m8r-ux3...@safetymail.info ---
This sounds like exactly the problem I have. Newer Linux kernels load different
microcode for my 380, which doesn't work. There are two ways to work around
this if it's the same problem:
1) Reve
https://bugs.freedesktop.org/show_bug.cgi?id=101787
--- Comment #9 from Julien Isorce ---
(In reply to 247 from comment #3)
> and to answer your question, yes it was perfectly working in fedora 25...
You can try to bisect mesa.
>From the logs you attached I could not see anything abivous. Do yo
Hi Greg&Hans,
How are we going to handle this now? The refactor is deeply burried in
drm-misc, I guess you could cherry-pick the relevant patches over. But
that'll probably lead to more conflicts because git will get confused.
Or you could just delete the set_busid hook in -staging, which renders
On Thu, 20 Jul 2017, Chris Wilson wrote:
> Before we interpret drm_dp_downstream_id() as a string, make sure it is
> NULL terminated, even when drm_dp_downtsream_id() fails.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101660
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/dr
On Thu, 20 Jul 2017, Chris Wilson wrote:
> Pass in the array and not a pointer to the array to drm_dp_dpcd_read().
>
> Signed-off-by: Chris Wilson
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_dp_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/
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