On 03/06/17 04:31, Dave Airlie wrote:
> On 2 June 2017 at 18:48, Tomi Valkeinen wrote:
>> Hi Dave,
>>
>> Here's second attempt for omapdrm changes for v4.13. The first version
>> conflicts
>> with the latest drm-next due to the DRM_ROTATE flag changes. This one is
>> rebased
>> on top of the lat
https://bugs.freedesktop.org/show_bug.cgi?id=101294
--- Comment #2 from Tobias Auerochs ---
Created attachment 131700
--> https://bugs.freedesktop.org/attachment.cgi?id=131700&action=edit
Thread dump on Arch Linux mesa 17.1.0 PKGBUILD rebuilt with debug symbols
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--- Comment #1 from Michel Dänzer ---
Can you bisect between 4.4 and 4.5?
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https://bugs.freedesktop.org/show_bug.cgi?id=101294
--- Comment #1 from Michel Dänzer ---
When it's frozen, attach gdb to the process, run
thread apply all bt
and attach the output here.
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https://bugs.freedesktop.org/show_bug.cgi?id=99851
Michel Dänzer changed:
What|Removed |Added
CC||bjorn.helg...@hp.com
--- Comment #48 fro
On Mon, May 29, 2017 at 05:45:51PM +0200, Benjamin Gaignard wrote:
> Use devm_of_platform_populate() to be sure that of_platform_depopulate
> is called when removing the driver.
>
> Signed-off-by: Benjamin Gaignard
Applied to drm-misc, thanks.
___
dri-
https://bugs.freedesktop.org/show_bug.cgi?id=99488
--- Comment #19 from nixscrip...@gmail.com ---
The tests, alas, are stupid. They hard-code a particular font that is a
Microsoft font not available to my knowledge on Linux (Ariel vs Helvetica).
By downloading the MS Core Fonts bundle, installing
2017년 06월 02일 22:58에 Andreas Färber 이(가) 쓴 글:
> Hello,
>
> We're observing the following build failure with v4.12-rc3, latest
> linux.git and linux-next.git:
>
> [ 9825s] LD vmlinux.o
> [ 9904s] MODPOST vmlinux.o
> [ 9915s] drivers/built-in.o: In function `hdmi_get_modes':
> [ 9915s]
>
https://bugs.freedesktop.org/show_bug.cgi?id=101262
Anthony Jagers changed:
What|Removed |Added
Priority|medium |lowest
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=101262
--- Comment #4 from Anthony Jagers ---
Whatever the problem is, it is clearly not a mesa bug.
It seems only lesser used distros are having problems.
Gentoo and LFS are the ones.
I'm closing this.
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Allwinner H3 features a TV encoder similar to the one in earlier SoCs,
but has a internal fixed clock divider that divides the TCON1 clock
(called TVE clock in datasheet) by 11.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Quirk part rewritten.
drivers/gpu/drm/sun4i/su
As we have already the support for the TV encoder on Allwinner H3, add
the display engine pipeline device tree nodes to its DTSI file.
The H5 pipeline has some differences and will be enabled later.
The currently-unused mixer0 and tcon0 are also needed, for the
completement of the pipeline.
Sign
于 2017年6月5日 GMT+08:00 上午2:46:24, "Jernej Škrabec" 写到:
>Hi,
>
>Dne nedelja, 04. junij 2017 ob 18:01:42 CEST je Icenowy Zheng
>napisal(a):
>> From: Icenowy Zheng
>>
>> Allwinner H3 has two special TCONs, both come without channel0. And
>the
>> TCON1 of H3 has no special clocks even for the chann
Allwinner H3 features a "DE2.0" and a TV Encoder.
Add device tree bindings for the following parts:
- H3 TCONs
- H3 Mixers
- The connection between H3 TCONs and H3 Mixers
- H3 TV Encoder
- H3 Display engine
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Changed endpoint reg definition on TCON
Add a compatible string for H3 display engine in sun4i_drv code.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 775eee82d8a9..2003507b41a6 100644
-
Orange Pi PC features a 3.5mm jack with TV output in it.
Enable the TV output.
As it currently do not have jack detection feature, do not merge this
patch.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12
1 file changed, 12 insertions(+)
diff --gi
From: Icenowy Zheng
Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels,
and the other has 1 VI and 1 UI.
Add support for these two variants.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++
1 file changed, 18 insertions(+)
dif
From: Marek Vasut
The description of the CSI_SEL bit in the i.MX6 reference manual is
incorrect. It states "This bit defines which CSI is the input to the
IC. This bit is effective only if IC_INPUT is bit cleared".
From experiment it was found this is in fact not correct. The CSI_SEL
bit selects
The DE2 mixer can do color space correction needed by TV Encoder with
its DCSC sub-engine.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +-
2 files changed, 40 inse
On Sat, Jun 3, 2017 at 3:42 AM, Maxime Ripard
wrote:
> On Fri, Jun 02, 2017 at 06:10:24PM +0800, Chen-Yu Tsai wrote:
>> The MSI Primo81 tablet has a micro HDMI connector at the bottom.
>> This is connected to the SoCs HDMI output.
>>
>> Enable the display pipeline and the HDMI output.
>>
>> Signed
The CLK_PLL_DE is needed to be referenced in device tree for H3, for
both forcing the parent of PLL_DE.
So export it to the device tree binding header.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +--
include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
2 files cha
在 2017-05-24 15:30，Maxime Ripard 写道：
On Tue, May 23, 2017 at 09:00:59PM +0800, icen...@aosc.io wrote:
在 2017-05-23 20:53，Maxime Ripard 写道：
> On Mon, May 22, 2017 at 07:55:56PM +0200, Jernej Škrabec wrote:
> > Hi,
> >
> > Dne sobota, 20. maj 2017 ob 03:37:53 CEST je Chen-Yu Tsai napisal(a):
> > >
Allwinner H3 SoC features a TV Encoder like the one in Allwinner A13,
which can only output TV Composite signal.
The display pipeline of H3 is also special -- it has two mixers and
two TCONs, of which the connection can be swapped. The TCONs do not
have channel 0 (as they are all connected to inte
在 2017-05-24 16:14，Maxime Ripard 写道：
On Sat, May 20, 2017 at 02:00:22AM +0800, Icenowy Zheng wrote:
于 2017年5月20日 GMT+08:00 上午1:57:53, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:46AM +0800, Icenowy Zheng wrote:
>> Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to
>> t
Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to
tcon0 and mixer1 is connected to tcon1; however by setting a bit
the connection can be swapped.
As we now hardcode the default connection, ignore the bonus endpoint for
the mixer's output and the TCON's input, as they stands for t
Allwinner H3 features a PLL named CLK_PLL_DE, and a mod clock for the
"Display Engine 2.0" named CLK_DE. As the name indicated, the CLK_PLL_DE
is a PLL for CLK_DE.
Only CLK_DE and CLK_TVE have a parent of CLK_PLL_DE, and CLK_TVE is also
one part of the display clocks.
So allow CLK_DE to set CLK_P
Hi All,
I need your help to investigate an issue I have with some TV monitor, it
seems like the DRM or i915 is polling the TV EDID at high frequency even if
the TV is in standby.
I need your guidance to diagnose this problem, and to point me to the code
part which is responsible to read the EDID
On Sat, Jun 3, 2017 at 3:41 AM, Maxime Ripard
wrote:
> On Fri, Jun 02, 2017 at 06:10:19PM +0800, Chen-Yu Tsai wrote:
>> The HDMI controller found in the A31 SoCs is slightly different
>> from the one already supported, which is found in the A10s:
>>
>> - Need different initial values for the PLL
From: Icenowy Zheng
Allwinner H3 has two special TCONs, both come without channel0. And the
TCON1 of H3 has no special clocks even for the channel1.
Add support for these kinds of TCON.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Merged TCON0 and TCON1 quirks and compatibles.
drivers/g
Hi All,
I need your help to investigate an issue I have with some TV monitor, it
seems like the DRM or i915 is polling the TV EDID at high frequency even if
the TV is in standby.
I need your guidance to diagnose this problem, and to point me to the code
part which is responsible to read the EDID
On Sat, Jun 3, 2017 at 3:38 AM, Maxime Ripard
wrote:
> On Fri, Jun 02, 2017 at 06:10:18PM +0800, Chen-Yu Tsai wrote:
>> The HDMI controller found in earlier Allwinner SoCs have slight
>> differences:
>>
>> - Need different initial values for the PLL related registers
>>
>> - Different behavior
Hi,
Dne nedelja, 04. junij 2017 ob 18:01:42 CEST je Icenowy Zheng napisal(a):
> From: Icenowy Zheng
>
> Allwinner H3 has two special TCONs, both come without channel0. And the
> TCON1 of H3 has no special clocks even for the channel1.
>
> Add support for these kinds of TCON.
>
> Signed-off-by:
Hi Icenowy,
[auto build test ERROR on next-20170602]
[cannot apply to mripard/sunxi/for-next robh/for-next clk/clk-next v4.9-rc8
v4.9-rc7 v4.9-rc6 v4.12-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/li
https://bugs.freedesktop.org/show_bug.cgi?id=93475
--- Comment #6 from Markus Lobedann ---
I was able to reproduce this error before, but now it doesn't happen anymore
with mesa 17.1 on arch linux with my AMD 6950.
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