Am 18.05.2017 um 06:43 schrieb Masahiro Yamada:
Use <...> notation to include headers located in include/linux.
While we are here, tweak the includes order a bit to sort them
alphabetically.
Signed-off-by: Masahiro Yamada
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/powerplay/hw
On Wed, May 17, 2017 at 05:25:16PM +0300, Jani Nikula wrote:
> The Analogix 7737 DP to HDMI converter requires reduced M and N values
> when to operate correctly at HBR2. Detect this IC by its OUI value of
> 0x0022B9 via the DPCD quirk list.
Commit message is a bit confusing since this sounds like
On Wed, May 17, 2017 at 05:25:14PM +0300, Jani Nikula wrote:
> Switch to using the common DP helpers instead of using our own.
>
> Signed-off-by: Jani Nikula
Forgot to remove struct intel_dp_desc, otherwise lgtm.
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_dp.c | 37
>
On Wed, May 17, 2017 at 03:43:18PM -0300, Gabriel Krisman Bertazi wrote:
> Daniel Vetter writes:
>
> > On Thu, Apr 20, 2017 at 09:38:19PM -0300, Gabriel Krisman Bertazi wrote:
> >> While reading drm_for_each_connector_iter, I noticed a mention to
> >> drm_connector_begin which doesn't exist. It s
On Mon, Apr 24, 2017 at 01:50:18PM +0900, Masahiro Yamada wrote:
> Many Makefiles needed to add -Iinclude/drm as an include path,
> but the right thing to do is to include headers in the form
> #include
>
> This series fixes the source files, then rip off -Iinclude/drm flags.
>
>
> Masahiro Y
On 05/18/2017 09:59 AM, Masahiro Yamada wrote:
With the include directives under include/drm/ fixed, this flag is
no longer needed.
Acked-by: Archit Taneja
Signed-off-by: Masahiro Yamada
---
Changes in v3: None
drivers/gpu/drm/i2c/Makefile | 2 --
1 file changed, 2 deletions(-)
diff
Hi Archit,
On 17 May 2017 at 13:45, Archit Taneja wrote:
> The recent ION clean ups introduced some leftover code that can be
> removed, and a bug that comes up if the call to dma_buf_map_attachment()
> from an importer fails. Fix these.
>
> Archit Taneja (3):
> staging: android: ion: Remove un
https://bugs.freedesktop.org/show_bug.cgi?id=101029
--- Comment #20 from Craig ---
ok when i type the following it is unable to find the file to patch:
sudo patch -p1 < iommu-amd-flush-IOTLB-for-specific-domains-only.patch
It displays the following:
can't find file to patch at input line 5
Per
https://bugs.freedesktop.org/show_bug.cgi?id=101029
--- Comment #19 from Craig ---
using iommu=soft on the kernel command line and it is now hard freezing. I
will try and get the patch applied next. I can't Ctrl-Alt-Del or
Ctrl-Alt-SysRq-REISUB to reboot.
--
You are receiving this mail becaus
https://bugs.freedesktop.org/show_bug.cgi?id=101029
--- Comment #18 from Michel Dänzer ---
-p1 should work in the top level directory of a Linux kernel source tree.
Have you confirmed that iommu=soft on the kernel command line works around the
problem?
--
You are receiving this mail because:
Y
Add DRM_MODE_ROTATE_ and DRM_MODE_REFLECT_ defines to the UAPI
as a convenience.
Ideally the DRM_ROTATE_ and DRM_REFLECT_ property ids are looked up
through the atomic API, but realizing that userspace is likely to take
shortcuts and assume that the enum values are what is sent over the
wire.
As
On 17-05-17 01:20:50, Emil Velikov wrote:
Hi Ben,
A couple of small questions/suggestions that I hope you find useful.
Please don't block any of this work based on my comments.
On 16 May 2017 at 22:31, Ben Widawsky wrote:
+static bool intel_primary_plane_format_mod_supported(struct drm_plane
While debugging an X11 display failure, I wanted to see where we were
actually scanning out from. This is probably generally useful to
others that might be working on this device.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/pl111/Makefile| 2 ++
drivers/gpu/drm/pl111/pl111_debugfs.c
On 17-05-17 01:06:16, Emil Velikov wrote:
Hi Ben,
On 16 May 2017 at 22:31, Ben Widawsky wrote:
Updated blob layout (Rob, Daniel, Kristian, xerpi)
v2:
* Removed __packed, and alignment (.+)
* Fix indent in drm_format_modifier fields (Liviu)
* Remove duplicated modifier > 64 check (Liviu)
* Cha
On Wed, May 17, 2017 at 8:38 PM, Rob Clark wrote:
> On Wed, May 17, 2017 at 8:00 PM, Ben Widawsky wrote:
>> On 17-05-17 13:31:44, Daniel Vetter wrote:
>>>
>>> On Tue, May 16, 2017 at 02:19:12PM -0700, Ben Widawsky wrote:
On 17-05-03 17:08:27, Daniel Vetter wrote:
> On Tue, May 02,
On Wed, May 17, 2017 at 8:00 PM, Ben Widawsky wrote:
> On 17-05-17 13:31:44, Daniel Vetter wrote:
>>
>> On Tue, May 16, 2017 at 02:19:12PM -0700, Ben Widawsky wrote:
>>>
>>> On 17-05-03 17:08:27, Daniel Vetter wrote:
>>> > On Tue, May 02, 2017 at 10:14:27PM -0700, Ben Widawsky wrote:
>>> > > +stru
On 17-05-17 11:17:57, Liviu Dudau wrote:
On Tue, May 16, 2017 at 02:31:24PM -0700, Ben Widawsky wrote:
This is the plumbing for supporting fb modifiers on planes. Modifiers
have already been introduced to some extent, but this series will extend
this to allow querying modifiers per plane. Based
https://bugs.freedesktop.org/show_bug.cgi?id=92248
--- Comment #33 from Humberto Israel Perez Rodriguez
---
the issue is still present on the following configuration
==
Software
==
kernel version
On 17-05-17 13:31:44, Daniel Vetter wrote:
On Tue, May 16, 2017 at 02:19:12PM -0700, Ben Widawsky wrote:
On 17-05-03 17:08:27, Daniel Vetter wrote:
> On Tue, May 02, 2017 at 10:14:27PM -0700, Ben Widawsky wrote:
> > +struct drm_format_modifier_blob {
> > +#define FORMAT_BLOB_CURRENT 1
> > +
Hi Geert,
On 16/05/17 16:30, Geert Uytterhoeven wrote:
> Hi Kieran,
>
> On Tue, May 9, 2017 at 6:39 PM, Kieran Bingham
> wrote:
>> When the VSP1 is used in an active display pipeline, the output of the
>> WPF can supply the LIF entity directly and simultaneously write to
>> memory.
>>
>> Support
Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to
tcon0 and mixer1 is connected to tcon1; however by setting a bit
the connection can be swapped.
As we now hardcode the default connection, ignore the bonus endpoint for
the mixer's output and the TCON's input, as they stands for t
Allwinner V3s features the new "Display Engine 2.0", which can now also
be driven with our subdrivers in sun4i-drm.
Add the compatible string for in sun4i_drv.c, in order to make the
display engine and its components probed.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1
Allwinner have a new "Display Engine 2.0" in their new SoCs, which comes
with mixers to do graphic processing and feed data to TCON, like the old
backends and frontends.
Add support for the mixer on Allwinner V3s SoC; it's the simplest one.
Currently a lot of functions are still missing -- more i
Hi,
Dne sreda, 17. maj 2017 ob 18:43:53 CEST je Icenowy Zheng napisal(a):
> As we have already the support for the TV encoder on Allwinner H3, add
> the display engine pipeline device tree nodes to its DTSI file.
>
> The H5 pipeline has some differences and will be enabled later.
>
> The current
On Wed 17 May 07:45 PDT 2017, Jordan Crouse wrote:
> The A5XX GPU powers on in "secure" mode. In secure mode the GPU can
> only render to buffers that are marked as secure and inaccessible
> to the kernel and user through a series of hardware protections. In
> practice secure mode is used to draw
The DE2 mixer can do color space correction needed by TV Encoder with
its DCSC sub-engine.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +-
2 files changed, 40 inse
https://bugs.freedesktop.org/show_bug.cgi?id=101029
--- Comment #17 from Craig ---
I can't seem to find the amd_iommu.c file, would you be able to point me to
where it is? also what would be the proper syntax to run the patch program? it
seems to indicate -p or --strip but i am to sure what numb
From: Puthikorn Voravootivat [put...@google.com] on behalf of Puthikorn
Voravootivat [put...@chromium.org]
Sent: Tuesday, May 16, 2017 5:33 PM
To: intel-...@lists.freedesktop.org; Pandiyan, Dhinakaran
Cc: dri-devel@lists.freedesktop.org; Jani Nikula; Navar
在 2017-05-17 17:27，icen...@aosc.io 写道：
在 2017-05-15 17:24，Maxime Ripard 写道：
On Mon, May 15, 2017 at 12:30:43AM +0800, Icenowy Zheng wrote:
+ de2_clocks: clock@100 {
display_clocks would be better there, we don't have to dissociate de1
with de2
How about de_clocks ? (See A8
On Tue, 2017-05-16 at 17:34 -0700, Puthikorn Voravootivat wrote:
> This patch adds option to enable dynamic backlight for eDP
> panel that supports this feature via DPCD register and
> set minimum / maximum brightness to 0% and 100% of the
> normal brightness.
>
> Signed-off-by: Puthikorn Voravoot
On Tue 16-05-17 10:31:19, Chris Wilson wrote:
> On Tue, May 16, 2017 at 11:06:06AM +0200, Michal Hocko wrote:
> > From: Michal Hocko
> >
> > drm_malloc* has grown their own kmalloc with vmalloc fallback
> > implementations. MM has grown kvmalloc* helpers in the meantime. Let's
> > use those becau
On Wed, May 17, 2017 at 3:40 PM, Maxime Ripard
wrote:
> The generic connectors such as hdmi-connector doesn't have any driver in,
> so if they are added to the component list, we will be waiting forever for
> a non-existing driver to probe.
>
> Add a list of the connectors we want to ignore when b
On Tue 16-05-17 12:09:08, Chris Wilson wrote:
> On Tue, May 16, 2017 at 12:53:52PM +0200, Michal Hocko wrote:
> > On Tue 16-05-17 10:31:19, Chris Wilson wrote:
> > > On Tue, May 16, 2017 at 11:06:06AM +0200, Michal Hocko wrote:
> > > > From: Michal Hocko
> > > >
> > > > drm_malloc* has grown thei
As we are going to add support for the Allwinner DE2 engine in sun4i-drm
driver, we will finally have two types of display engines -- the DE1
backend and the DE2 mixer. They both do some display blending and feed
graphics data to TCON, and is part of the "Display Engine" called by
Allwinner, so I c
Local variable _color_ is assigned to a constant value and it is
never updated again. Remove this variable and refactor the code it
affects.
Addresses-Coverity-ID: 1226745
Signed-off-by: Gustavo A. R. Silva
---
drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 8 +---
1 file changed, 1 inser
Hi,
Dne sreda, 17. maj 2017 ob 18:43:49 CEST je Icenowy Zheng napisal(a):
> The DE2 mixer can do color space correction needed by TV Encoder with
> its DCSC sub-engine.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng
> ---
> drivers/gpu/drm/sun4i/sun8i_mixer.c | 35
> +
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.
This commit connects this panel to Lichee Pi Zero.
Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.
Signed-off-by: Icenowy Zheng
Add a compatible string for H3 display engine in sun4i_drv code.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b/drivers/gpu/drm/sun4i/sun4i_drv.c
index 29bf1325ded6..c0de0741c923 100644
-
Add option to allow choosing how to adjust brightness if
panel supports both PWM pin and AUX channel.
Signed-off-by: Puthikorn Voravootivat
---
drivers/gpu/drm/i915/i915_params.c| 8 ---
drivers/gpu/drm/i915/i915_params.h| 2 +-
drivers/gpu/drm/i915/intel_dp_aux_bac
This patch adds option to enable dynamic backlight for eDP
panel that supports this feature via DPCD register and
set minimum / maximum brightness to 0% and 100% of the
normal brightness.
Signed-off-by: Puthikorn Voravootivat
---
drivers/gpu/drm/i915/i915_params.c| 5
drivers/g
于 2017年5月18日 GMT+08:00 上午1:37:39, Maxime Ripard
写到:
>On Wed, May 17, 2017 at 10:47:16PM +0800, Icenowy Zheng wrote:
>> This patchset is the initial patchset for Allwinner DE2 support.
>>
>> As the DE2 CCU support is already applied, this patchset now contains
>> only DRM changes and device tre
On Tue 16-05-17 11:22:30, Daniel Vetter wrote:
> On Tue, May 16, 2017 at 11:06:06AM +0200, Michal Hocko wrote:
> > From: Michal Hocko
> >
> > drm_malloc* has grown their own kmalloc with vmalloc fallback
> > implementations. MM has grown kvmalloc* helpers in the meantime. Let's
> > use those beca
On Wed, May 17, 2017 at 1:09 PM, Pandiyan, Dhinakaran <
dhinakaran.pandi...@intel.com> wrote:
>
>
> From: Puthikorn Voravootivat [put...@google.com] on behalf of Puthikorn
> Voravootivat [put...@chromium.org]
> Sent: Tuesday, May 16, 2017 5:33 PM
> To: inte
From: Michal Hocko
drm_[cm]alloc* has grown their own kvmalloc with vmalloc fallback
implementations. MM has grown kvmalloc* helpers in the meantime. Let's
use those because it a) reduces the code and b) MM has a better idea
how to implement fallbacks (e.g. do not vmalloc before kmalloc is tried
On Wed 17-05-17 08:59:44, Chris Wilson wrote:
> On Wed, May 17, 2017 at 09:44:53AM +0200, Michal Hocko wrote:
> > On Tue 16-05-17 12:09:08, Chris Wilson wrote:
> > > On Tue, May 16, 2017 at 12:53:52PM +0200, Michal Hocko wrote:
> > > > On Tue 16-05-17 10:31:19, Chris Wilson wrote:
> > > > > On Tue,
Hi,
I'm experiencing a boot failure on next-20170515:
BUG: unable to handle kernel NULL pointer dereference at 07cb
IP: radeon_driver_load_kms+0xeb/0x230 [radeon]
PGD 0
P4D 0
Oops: [#1] SMP
Modules linked in: amdkfd amd_iommu_v2 i915(+) radeon(+) i2c_algo_bit
dr
From: Michal Hocko
Now that drm_[cm]alloc* helpers are simple one line wrappers around
kvmalloc_array and drm_free_large is just kvfree alias we can drop
them and replace by their native forms.
This shouldn't introduce any functional change.
Suggested-by: Daniel Vetter
Signed-off-by: Michal Ho
This patch set contain 5 patches. Another 4 patches in previous version
was already merged.
- First two patches allow choosing which way to adjust brightness
if both PWM pin and AUX are supported
- Next patch adds support for dynamic brightness.
- Last two patches set the PWM freqency to match da
On Tue, Apr 25, 2017 at 03:01:35PM +0200, Christian König wrote:
> Am 12.04.2017 um 18:55 schrieb Bjorn Helgaas:
> >[SNIP]
> >>>I think the specs would envision this being done via an ACPI _SRS
> >>>method on the PNP0A03 host bridge device. That would be a more
> >>>generic path that would work on
Fixes: 14da3ed8dd08 ("devicetree/bindings: display: Document common panel
properties")
Cc: Laurent Pinchart
Cc: Rob Herring
Signed-off-by: Baruch Siach
---
Documentation/devicetree/bindings/display/panel/panel-common.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Docum
On Tue, 2017-05-16 at 11:07 -0700, Puthikorn Voravootivat wrote:
>
>
> On Mon, May 15, 2017 at 11:21 PM, Pandiyan, Dhinakaran
> wrote:
> On Mon, 2017-05-15 at 17:43 -0700, Puthikorn Voravootivat
> wrote:
> >
> >
> > On Mon, May 15, 2017 at 4:07 PM, Pandiya
On Tue, May 16, 2017 at 09:16:35AM -0300, Mauro Carvalho Chehab wrote:
> DocBook is mentioned several times at the documentation. Update
> the obsolete references from it at the DocBook.
>
> Acked-by: SeongJae Park
> Signed-off-by: Mauro Carvalho Chehab
Acked-by: Bjorn Helgaas# for PCI/MSI-
This patch adds the following definition
- Bit mask for EDP_PWMGEN_BIT_COUNT and min/max cap
register which only use bit 0:4
- Base frequency (27 MHz) for backlight PWM frequency
generator.
Signed-off-by: Puthikorn Voravootivat
Reviewed-by: Dhinakaran Pandiyan
---
include/drm/drm_dp_helper.
From: Michal Hocko
drm_malloc* has grown their own kmalloc with vmalloc fallback
implementations. MM has grown kvmalloc* helpers in the meantime. Let's
use those because it a) reduces the code and b) MM has a better idea
how to implement fallbacks (e.g. do not vmalloc before kmalloc is tried
with
On Tue, 2017-05-16 at 13:56 -0700, Puthikorn Voravootivat wrote:
>
>
> On Tue, May 16, 2017 at 1:29 PM, Pandiyan, Dhinakaran
> wrote:
> On Tue, 2017-05-16 at 11:07 -0700, Puthikorn Voravootivat
> wrote:
> >
> >
> > On Mon, May 15, 2017 at 11:21 PM, Pandiya
From: Icenowy Zheng
Allwinner H3 has two special TCONs, both come without channel0. And the
TCON1 of H3 has no special clocks even for the channel1.
Add support for these kinds of TCON.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 78 --
On Tue, 2017-05-16 at 17:34 -0700, Puthikorn Voravootivat wrote:
> Read desired PWM frequency from panel vbt and calculate the
> value for divider in DPCD address 0x724 and 0x728 to have
> as many bits as possible for PWM duty cyle for granularity of
> brightness adjustment while the frequency divi
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
---
Changes in v7:
- Dropped the trailing "@0" in rgb666 pinmux node name.
- Added Chen-
Allwinner H3 features a TV encoder similar to the one in earlier SoCs,
but with some different points about clocks:
- It has a mod clock and a bus clock.
- The mod clock must be at a fixed rate to generate signal.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_
As we have already the support for the TV encoder on Allwinner H3, add
the display engine pipeline device tree nodes to its DTSI file.
The H5 pipeline has some differences and will be enabled later.
The currently-unused mixer0 and tcon0 are also needed, for the
completement of the pipeline.
Sign
On Wed 17-05-17 08:38:09, Chris Wilson wrote:
> On Wed, May 17, 2017 at 08:55:08AM +0200, Michal Hocko wrote:
> > From: Michal Hocko
> >
> > drm_[cm]alloc* has grown their own kvmalloc with vmalloc fallback
> > implementations. MM has grown kvmalloc* helpers in the meantime. Let's
> > use those b
The CLK_PLL_DE is needed to be referenced in device tree for H3, for
both forcing the parent of PLL_DE.
So export it to the device tree binding header.
Signed-off-by: Icenowy Zheng
---
drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +--
include/dt-bindings/clock/sun8i-h3-ccu.h | 2 ++
2 files cha
Hi,
my system (always) locks up when booting a next-20170515 kernel.
No oops. Sending magic sysrqs over serial doesn't cause any reaction.
Last few console messages before death are:
[7.089221] Console: switching to colour frame buffer device 128x48
[7.101470] radeon :01:00.0: f
Orange Pi PC features a 3.5mm jack with TV output in it.
Enable the TV output.
As it currently do not have jack detection feature, do not merge this
patch.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12
1 file changed, 12 insertions(+)
diff --gi
As sun4i-backend is now a dedicated module, add an Kconfig option for
it to make it optional, since some build may only use other engines.
Signed-off-by: Icenowy Zheng
---
Changes in v7:
- Adjusted the position of BACKEND makefile item. (It's now after
common codes shared between sun4i-backend
DocBook is mentioned several times at the documentation. Update
the obsolete references from it at the DocBook.
Acked-by: SeongJae Park
Signed-off-by: Mauro Carvalho Chehab
---
Documentation/PCI/MSI-HOWTO.txt| 2 +-
Documentation/admin-guide/README.rst | 6 ---
Documentation
Currently the direct call from CRTC code to layer code has disappeared,
instead the layer's init function is called via the backend's ops.
Add a dedicated module for sun4i-backend and sun4i-layer, and drop the
EXPORT_SYMBOL from backend code to layer code.
Signed-off-by: Icenowy Zheng
Reviewed-b
On Tue, 2017-05-16 at 17:39 -0700, Puthikorn Voravootivat wrote:
>
>
> On Tue, May 16, 2017 at 2:21 PM, Pandiyan, Dhinakaran
> wrote:
> On Tue, 2017-05-16 at 13:56 -0700, Puthikorn Voravootivat
> wrote:
> >
> >
> > On Tue, May 16, 2017 at 1:29 PM, Pandiyan
On Mon, May 15, 2017 at 11:21 PM, Pandiyan, Dhinakaran <
dhinakaran.pandi...@intel.com> wrote:
> On Mon, 2017-05-15 at 17:43 -0700, Puthikorn Voravootivat wrote:
> >
> >
> > On Mon, May 15, 2017 at 4:07 PM, Pandiyan, Dhinakaran
> > wrote:
> > On Fri, 2017-05-12 at 17:31 -0700, Puthikorn V
在 2017-05-15 17:24，Maxime Ripard 写道：
On Mon, May 15, 2017 at 12:30:43AM +0800, Icenowy Zheng wrote:
+ de2_clocks: clock@100 {
display_clocks would be better there, we don't have to dissociate de1
with de2
How about de_clocks ? (See A80 DTSI)
+ comp
Allwinner H3 features a PLL named CLK_PLL_DE, and a mod clock for the
"Display Engine 2.0" named CLK_DE. As the name indicated, the CLK_PLL_DE
is a PLL for CLK_DE.
Only CLK_DE and CLK_TVE have a parent of CLK_PLL_DE, and CLK_TVE is also
one part of the display clocks.
So allow CLK_DE to set CLK_P
This patchset depends on the DE2 patchset, version 8 of that patchset
is available at [1].
Allwinner H3 SoC features a TV Encoder like the one in Allwinner A13,
which can only output TV Composite signal.
The display pipeline of H3 is also special -- it has two mixers and
two TCONs, of which the c
As it turned out my allyesconfig on x86_64 wasn't sufficient and 0day
build machinery found a failure on arm architecture. It was clearly a
typo. Now I have pushed this to my build battery with cross arch
compilers and it passes so there shouldn't more surprises hopefully.
Here is the v2.
---
From
There are some panel that
(1) does not support display backlight enable via AUX
(2) support display backlight adjustment via AUX
(3) support display backlight enable via eDP BL_ENABLE pin
The current driver required that (1) must be support to enable (2).
This patch drops that requirement.
Signed
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.
Add device nodes for this display pipeline.
Signed-off-by: Icenowy Zheng
---
Changes in v8:
- Changed some label names.
Changes in v7:
- Change DE2 clock co
This patchset is the initial patchset for Allwinner DE2 support.
As the DE2 CCU support is already applied, this patchset now contains
only DRM changes and device tree changes.
The SoC used to develop this patchset is V3s, as V3s is the simplest
one of the SoCs that have DE2.
(Allwinner V3s fea
From: Icenowy Zheng
Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels,
and the other has 1 VI and 1 UI.
Add support for these two variants.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++
1 file changed, 18 insertions(+)
dif
On Wed, May 17, 2017 at 3:40 PM, Maxime Ripard
wrote:
> It appears that the total vertical resolution needs to be doubled when
> we're not in interlaced. Make sure that is the case.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 25 +
> 1 fi
Allwinner V3s SoC features a TCON without channel 1.
Add support for it.
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsai
---
Changes in v7:
- Added Chen-Yu's Reviewed-by.
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
2 files changed, 7 insert
Allwinner H3 features a "DE2.0" and a TV Encoder.
Add device tree bindings for the following parts:
- H3 TCONs
- H3 Mixers
- The connection between H3 TCONs and H3 Mixers
- H3 TV Encoder
- H3 Display engine
Signed-off-by: Icenowy Zheng
---
.../bindings/display/sunxi/sun4i-drm.txt | 47
On Wed, May 17, 2017 at 3:40 PM, Maxime Ripard
wrote:
> The A10s has a slightly different display pipeline than the A13, with an
> HDMI controller.
>
> Add a compatible for it.
>
> Signed-off-by: Maxime Ripard
Reviewed-by: Chen-Yu Tsai
___
dri-devel m
On Tue, May 16, 2017 at 2:21 PM, Pandiyan, Dhinakaran <
dhinakaran.pandi...@intel.com> wrote:
> On Tue, 2017-05-16 at 13:56 -0700, Puthikorn Voravootivat wrote:
> >
> >
> > On Tue, May 16, 2017 at 1:29 PM, Pandiyan, Dhinakaran
> > wrote:
> > On Tue, 2017-05-16 at 11:07 -0700, Puthikorn Vo
On Tue, May 16, 2017 at 1:29 PM, Pandiyan, Dhinakaran <
dhinakaran.pandi...@intel.com> wrote:
> On Tue, 2017-05-16 at 11:07 -0700, Puthikorn Voravootivat wrote:
> >
> >
> > On Mon, May 15, 2017 at 11:21 PM, Pandiyan, Dhinakaran
> > wrote:
> > On Mon, 2017-05-15 at 17:43 -0700, Puthikorn V
On Wed 17-05-17 10:12:41, Chris Wilson wrote:
> On Wed, May 17, 2017 at 11:03:50AM +0200, Michal Hocko wrote:
[...]
> > +static inline bool alloc_array_check(size_t n, size_t size)
> > +{
> > + if (size != 0 && n > SIZE_MAX / size)
> > + return false;
> > + return true;
>
> Just retu
Read desired PWM frequency from panel vbt and calculate the
value for divider in DPCD address 0x724 and 0x728 to have
as many bits as possible for PWM duty cyle for granularity of
brightness adjustment while the frequency divisor is still
within 25% of the desired value.
Signed-off-by: Puthikorn V
On 16.05.2017 11:10, Mikko Perttunen wrote:
>
>
> On 16.05.2017 10:32, Erik Faye-Lund wrote:
>> On Tue, May 16, 2017 at 8:56 AM, Mikko Perttunen wrote:
>>> On 14.05.2017 23:47, Dmitry Osipenko wrote:
If commands buffer claims a number of words that is higher than its BO can
fit, a
On Tue 16-05-17 15:08:56, Daniel Vetter wrote:
> On Tue, May 16, 2017 at 11:52:55AM +0200, Michal Hocko wrote:
> > On Tue 16-05-17 11:22:30, Daniel Vetter wrote:
> > > On Tue, May 16, 2017 at 11:06:06AM +0200, Michal Hocko wrote:
> > > > From: Michal Hocko
> > > >
> > > > drm_malloc* has grown th
Commit b60c1be74741 (dt-bindings: display/panel: Add common rotation property)
added the rotation property description in a new file. We have a place for
common display panel properties already. Move there the rotation property.
Cc: Noralf Trønnes
Cc: Rob Herring
Signed-off-by: Baruch Siach
---
https://bugs.freedesktop.org/show_bug.cgi?id=100577
--- Comment #8 from Andy Furniss ---
I can still reproduce this.
Seems I may just get lucky runs - one 90 mins no issue, stopped and started
again later and it locked after 20.
--
You are receiving this mail because:
You are the assignee for
On Wed, May 17, 2017 at 11:29:13PM +0200, Nicolai Stange wrote:
> Hi,
>
> my system (always) locks up when booting a next-20170515 kernel.
>
> No oops. Sending magic sysrqs over serial doesn't cause any reaction.
>
> Last few console messages before death are:
>
> [7.089221] Console: swit
On 05/17/2017 07:25 AM, Jani Nikula wrote:
Face the fact, there are Display Port sink and branch devices out there
in the wild that don't follow the Display Port specifications, or they
have bugs, or just otherwise require special treatment. Start a common
quirk database the drivers can query b
I sent a patch for this bug earlier. There is a second bug later in the
function which my patch fixes as well.
regards,
dan carpenter
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https://bugs.freedesktop.org/show_bug.cgi?id=97942
Humberto Israel Perez Rodriguez changed:
What|Removed |Added
Summary|[IGT] [BYT] /gem_mmap_gtt |[IGT] [BYT] [BXT]
https://bugs.freedesktop.org/show_bug.cgi?id=97942
--- Comment #6 from Humberto Israel Perez Rodriguez
---
The following test cases failure on BXT with latest configuration
igt@gem_mmap@swap-bo
igt@gem_mmap_gtt@coherency
igt@gem_mmap_gtt@swap-copy
igt@gem_mmap_gtt@swap-copy-odd
igt@gem_mmap_gtt
Daniel Vetter writes:
> On Thu, Apr 20, 2017 at 09:38:19PM -0300, Gabriel Krisman Bertazi wrote:
>> While reading drm_for_each_connector_iter, I noticed a mention to
>> drm_connector_begin which doesn't exist. It should be
>> drm_connector_get.
>>
>> Signed-off-by: Gabriel Krisman Bertazi
>
> F
On Wednesday, 2017-05-17 13:58:42 +, Yu, Qiang wrote:
> Hi Emil,
>
> I didn't modify the code. I'm using Ubuntu 14.04 gcc 4.8.4, the configure
> pass but
> fail when compile.
>
> I think my gcc support c99 but needs adding "-std=c99" to enable it, and the
> configure
> script add it into CC
From: Colin Ian King
The current for loop decrements i when it is zero and this causes
a wrap-around back to ~0 because i is unsigned. In the unlikely event
that mask is 0, the loop will run forever. Fix this so we can't loop
forever.
Detected by CoverityScan, CID#1435469 ("Unsigned compared aga
2017-05-18 0:10 GMT+08:00 Emil Velikov :
> On 17 May 2017 at 14:58, Yu, Qiang wrote:
>> Hi Emil,
>>
>> I didn't modify the code. I'm using Ubuntu 14.04 gcc 4.8.4, the configure
>> pass but
>> fail when compile.
>>
>> I think my gcc support c99 but needs adding "-std=c99" to enable it, and the
>>
On Wed, May 17, 2017 at 10:47:16PM +0800, Icenowy Zheng wrote:
> This patchset is the initial patchset for Allwinner DE2 support.
>
> As the DE2 CCU support is already applied, this patchset now contains
> only DRM changes and device tree changes.
>
> The SoC used to develop this patchset is V3s
On 05/17/2017 01:15 AM, Archit Taneja wrote:
> The recent ION clean ups introduced some leftover code that can be
> removed, and a bug that comes up if the call to dma_buf_map_attachment()
> from an importer fails. Fix these.
>
> Archit Taneja (3):
> staging: android: ion: Remove unused members
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