These are fixes that have been on the list for 1-3 weeks that didn't
make it into 4.9. I've been running most of them most of the time,
some have been merged downstream, and some have also been merged to
the Fedora kernel build. This is about as much testing as we ever get
on vc4, so I feel prett
Hello,
On Thursday 06 Oct 2016 17:09:57 Archit Taneja wrote:
> On 10/06/2016 12:51 PM, Maxime Ripard wrote:
> > On Mon, Oct 03, 2016 at 04:40:57PM +0530, Archit Taneja wrote:
> >> On 09/30/2016 08:07 PM, Maxime Ripard wrote:
> >>> Some boards have an entirely passive RGB to VGA bridge, based on ei
On 06/10/16 20:04, Deucher, Alexander wrote:
>> -Original Message-
>> From: Colin Ian King [mailto:colin.king at canonical.com]
>> Sent: Thursday, October 06, 2016 3:04 PM
>> To: Alex Deucher
>> Cc: Deucher, Alexander; Koenig, Christian; David Airlie; Huang, JinHuiEric;
>> Zhu, Rex; Zhou, J
On 06/10/16 19:32, Alex Deucher wrote:
> On Thu, Oct 6, 2016 at 2:02 PM, Colin King
> wrote:
>> From: Colin Ian King
>>
>> Currently, if adev->pp_enabled is false then the pp_stats_info data
>> is not read and hence a garbage number of states from the stack
>> is used to dump out the number of s
> -Original Message-
> From: Colin Ian King [mailto:colin.king at canonical.com]
> Sent: Thursday, October 06, 2016 3:04 PM
> To: Alex Deucher
> Cc: Deucher, Alexander; Koenig, Christian; David Airlie; Huang, JinHuiEric;
> Zhu, Rex; Zhou, Jammy; StDenis, Tom; Dan Carpenter; Maling list - DR
From: Colin Ian King
Currently, if adev->pp_enabled is false then the pp_stats_info data
is not read and hence a garbage number of states from the stack
is used to dump out the number of states. Given data.nums could be
any random value, this could easily lead to read outside the
data.states arra
Use drm_accurate_vblank_count so we have the full 32 bit to represent
the frame counter and userspace has a simpler way of knowing when the
counter wraps around.
Signed-off-by: Tomeu Vizoso
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/i915/i915_irq.c | 6 +++---
1 file changed, 3 insertions(+
The core provides now an ABI to userspace for generation of frame CRCs,
so implement the ->set_crc_source() callback and reuse as much code as
possible with the previous ABI implementation.
When handling the pageflip interrupt, we skip 1 or 2 frames depending on
the HW because they contain wrong v
Adds files and directories to debugfs for controlling and reading frame
CRCs, per CRTC:
dri/0/crtc-0/crc
dri/0/crtc-0/crc/control
dri/0/crtc-0/crc/data
Drivers can implement the set_crc_source callback() in drm_crtc_funcs to
start and stop generating frame CRCs and can add entries to the output
b
In preparation to using a generic API in the DRM core for continuous CRC
generation, move the related code out of i915_debugfs.c into a new file.
Eventually, only the Intel-specific code will remain in this new file.
v2: Rebased.
v6: Rebased.
v7: Fix whitespace issue.
v9: Have intel_display_cr
Hi,
this series basically takes the facility for continuously capturing CRCs
of frames from the i915 driver and into the DRM core.
The idea is that test suites such as IGT use this information to check
that frames that are exected to be identical, also have identical CRC
values.
Other drivers fo
On 10/06/2016 12:51 PM, Maxime Ripard wrote:
> Hi Archit,
>
> On Mon, Oct 03, 2016 at 04:40:57PM +0530, Archit Taneja wrote:
>> Hi Maxime,
>>
>> On 09/30/2016 08:07 PM, Maxime Ripard wrote:
>>> Some boards have an entirely passive RGB to VGA bridge, based on either
>>> DACs or resistor ladders.
>
Use drm_accurate_vblank_count so we have the full 32 bit to represent
the frame counter and userspace has a simpler way of knowing when the
counter wraps around.
Signed-off-by: Tomeu Vizoso
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/i915/i915_irq.c | 6 +++---
1 file changed, 3 insertions(+
The core provides now an ABI to userspace for generation of frame CRCs,
so implement the ->set_crc_source() callback and reuse as much code as
possible with the previous ABI implementation.
When handling the pageflip interrupt, we skip 1 or 2 frames depending on
the HW because they contain wrong v
Adds files and directories to debugfs for controlling and reading frame
CRCs, per CRTC:
dri/0/crtc-0/crc
dri/0/crtc-0/crc/control
dri/0/crtc-0/crc/data
Drivers can implement the set_crc_source callback() in drm_crtc_funcs to
start and stop generating frame CRCs and can add entries to the output
b
In preparation to using a generic API in the DRM core for continuous CRC
generation, move the related code out of i915_debugfs.c into a new file.
Eventually, only the Intel-specific code will remain in this new file.
v2: Rebased.
v6: Rebased.
v7: Fix whitespace issue.
v9: Have intel_display_cr
Hi,
this series basically takes the facility for continuously capturing CRCs
of frames from the i915 driver and into the DRM core.
The idea is that test suites such as IGT use this information to check
that frames that are exected to be identical, also have identical CRC
values.
Other drivers fo
On 10/06/2016 02:47 PM, Daniel Vetter wrote:
> On Thu, Oct 06, 2016 at 11:02:58AM +0200, Andrzej Hajda wrote:
>> Hi Daniel, Archit,
>>
>> On 30.09.2016 12:33, Andrzej Hajda wrote:
>>> On 30.09.2016 12:07, Daniel Vetter wrote:
On Fri, Sep 30, 2016 at 09:30:16AM +0530, Archit Taneja wrote:
>>>
The 100c08 scratch page is mapped using dma_map_page() before the TTM
layer has had a chance to set the DMA mask. This means we are still
running with the default of 32 when this code executes, and this causes
problems for platforms with no memory below 4 GB (such as AMD Seattle)
So move the dma_m
The 100c10 scratch page is mapped using dma_map_page() before the TTM
layer has had a chance to set the DMA mask. This means we are still
running with the default of 32 when this code executes, and this causes
problems for platforms with no memory below 4 GB (such as AMD Seattle)
So move the dma_m
Some subdevices (i.e., fb/nv50.c and fb/gf100.c) map a scratch page using
dma_map_page() way before the TTM layer has had a chance to set the DMA
mask. This may prevent the driver from loading at all on platforms whose
system memory is not covered by the default DMA mask of 32-bit (i.e., when
all R
This v4 is now a 3 piece series (since v4), after Alexandre pointed out that
both GF 100 and NV50 are affected by the same issue, and that a related issue
has been solved already for Tegra in commit 9d0394c6bed5
("drm/nouveau/instmem/gk20a: set DMA mask early").
The issue that this series addresse
On Thu, Oct 6, 2016 at 1:27 PM, Laurent Pinchart
wrote:
> Hello,
>
> On Thursday 06 Oct 2016 17:09:57 Archit Taneja wrote:
>> On 10/06/2016 12:51 PM, Maxime Ripard wrote:
>> > On Mon, Oct 03, 2016 at 04:40:57PM +0530, Archit Taneja wrote:
>> >> On 09/30/2016 08:07 PM, Maxime Ripard wrote:
>> >>> S
On Thu, Oct 6, 2016 at 3:57 AM, Maxime Ripard
wrote:
> The atomic helpers already call the drm_bridge_enable on our behalf,
> there's no need to do it a second time.
>
> Reported-by: Sean Paul
Reviewed-by: Sean Paul
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/sun4i/sun4i_rgb.c | 6
Hello,
I think this patch was never picked up. So just a short 'ping' from my side.
With best wishes,
Tobias
Shuah Khan wrote:
> Fix exynos_drm_gem_create() error messages to include flags and size when
> flags and size are invalid.
>
> Signed-off-by: Shuah Khan
> ---
> drivers/gpu/drm/exyno
On 28 September 2016 at 15:27, wrote:
> From: Ville Syrjälä
>
> Devices can have multiple planes, so allow the user to choose between
> them.
>
> Signed-off-by: Ville Syrjälä
In the long term I'm wondering if we don't want to nuke/deprecate the
clunky modetest and use a slimmed down atomic
Hi Dhinakaran,
On 23 September 2016 at 07:33, Dhinakaran Pandiyan
wrote:
> The positions of primary and overlay plane type enums in the kernel were
> updated in
>
> drm/doc: Polish for drm_plane.[hc]
>
> So, making the change here as well.
>
Obviously the issue is/has been fixed elsew
On Thu, Oct 6, 2016 at 2:02 PM, Colin King wrote:
> From: Colin Ian King
>
> Currently, if adev->pp_enabled is false then the pp_stats_info data
> is not read and hence a garbage number of states from the stack
> is used to dump out the number of states. Given data.nums could be
> any random valu
Hi Heiko,
On 3 October 2016 at 18:26, Heiko Becker wrote:
> Helpful if your nm executable has a prefix based on the
> architecture, for example.
>
Thanks for the patch.
Currently one can run the tests as standalone. Personally I don't mind
if we "loose" that functionality or not, but in either c
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When using dmabuf the devices have to attach themselves on the buffer
before map it
so you can know which devices will use the buffer before allocate it
when the first
dma_buf_map_attachment() is called (defered allocation)
Split dmabuf attach/map_attachment is not really done in drm or v4l2
but pa
On 3 October 2016 at 06:39, Alexandre Courbot wrote:
> On Mon, Sep 26, 2016 at 9:32 PM, Ard Biesheuvel
> wrote:
>> Some subdevices (i.e., fb/nv50.c and fb/gf100.c) map a scratch page using
>> dma_map_page() way before the TTM layer has had a chance to set the DMA
>> mask. This may prevent the dri
code needs to be hooked into the non-SSO case as well.
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On 10/06/2016 01:13 PM, Emil Velikov wrote:
> On 6 October 2016 at 09:56, Tomeu Vizoso
> wrote:
>> Adds files and directories to debugfs for controlling and reading frame
>> CRCs, per CRTC:
>>
>> dri/0/crtc-0/crc
>> dri/0/crtc-0/crc/control
>> dri/0/crtc-0/crc/data
>>
>> Drivers can implement the
(plane->rotation_property && obj != &plane->base)
>>> + drm_object_attach_property(obj,
>>> plane->rotation_property,
>>> + DRM_ROTATE_0);
>>
>> I think this could use a short comment, as it's not obvious wth is going
>> on here =).
>
> /* Attach the rotation property also to the crtc object */ ?
Yes, sounds fine to me.
Tomi
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On Thu, Oct 06, 2016 at 12:59:17PM +0300, Tomi Valkeinen wrote:
>
> On 26/09/16 19:30, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > The global mode_config.rotation_property is going away, switch over to
> > per-plane rotation_property.
> >
> > Not sure I got the ann
Op 05-10-16 om 17:33 schreef Lyude:
> While it (mostly) works, the code for handling watermarks on Skylake has been
> kind of ugly for a while. As well a lot of it isn't that friendly to atomic
> transactions, Lots of copy paste, redundant wm values, etc. While this isn't a
> full cleanup, it's a g
On 6 October 2016 at 12:33, Tomeu Vizoso wrote:
> On 10/06/2016 01:13 PM, Emil Velikov wrote:
>> On 6 October 2016 at 09:56, Tomeu Vizoso
>> wrote:
>>> Adds files and directories to debugfs for controlling and reading frame
>>> CRCs, per CRTC:
>>>
>>> dri/0/crtc-0/crc
>>> dri/0/crtc-0/crc/contro
Hi Daniel,
On Thursday 06 Oct 2016 11:12:40 Daniel Vetter wrote:
> On Wed, Oct 05, 2016 at 09:36:17PM +0200, Noralf Trønnes wrote:
> > Den 05.10.2016 15:22, skrev Laurent Pinchart:
> > > On Sunday 11 Sep 2016 20:47:41 Noralf Trønnes wrote:
> > > > This enables panic message output for fb cma hel
Hi Dave,
Just some misc bug fixes for 4.9.
The following changes since commit c2cbc38b9715bd8318062e600668fc30e5a3fbfa:
drm: virtio: reinstate drm_virtio_set_busid() (2016-10-04 13:10:30 +1000)
are available in the git repository at:
git://people.freedesktop.org/~agd5f/linux drm-next-4.9
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so there is discussion about a "central userspace allocator" (ie. more
like a common userspace API that could be implemented on top of
various devices/APIs) to decide in a generic way which device could
allocate.
https://github.com/cubanismo/allocator
and I wrote up some rough thoughts/proposal
Op 05-10-16 om 22:33 schreef Paulo Zanoni:
> Em Qua, 2016-10-05 Ã s 11:33 -0400, Lyude escreveu:
>> Having skl_wm_level contain all of the watermarks for each plane is
>> annoying since it prevents us from having any sort of object to
>> represent a single watermark level, something we take advanta
Hi Peter,
On 6 October 2016 at 11:48, Peter Griffin wrote:
> Hi Emil,
>
> On Wed, 21 Sep 2016, Emil Velikov wrote:
>
>> On 20 September 2016 at 09:32, Peter Griffin
>> wrote:
>> > Hi Emil,
>> >
>> > On Tue, 20 Sep 2016, Emil Velikov wrote:
>> >
>> >> On 5 September 2016 at 14:16, Peter Griffin
On 6 October 2016 at 09:56, Tomeu Vizoso wrote:
> Adds files and directories to debugfs for controlling and reading frame
> CRCs, per CRTC:
>
> dri/0/crtc-0/crc
> dri/0/crtc-0/crc/control
> dri/0/crtc-0/crc/data
>
> Drivers can implement the set_crc_source callback() in drm_crtc_funcs to
> start a
Hi Emil,
On Wed, 21 Sep 2016, Emil Velikov wrote:
> On 20 September 2016 at 09:32, Peter Griffin
> wrote:
> > Hi Emil,
> >
> > On Tue, 20 Sep 2016, Emil Velikov wrote:
> >
> >> On 5 September 2016 at 14:16, Peter Griffin
> >> wrote:
> >> > ST_SLIM_REMOTEPROC must select REMOTEPROC, which expo
On 6 October 2016 at 10:37, Peter Griffin wrote:
> In fact the help text for VIRTIO even states this option should be selected
> by any driver which implements virtio.
>
Almost but not quite. It says:
"This option is selected by any driver which implements the virtio _bus_"
REMOTEPROC obviously
On Wed, Oct 05, 2016 at 06:40:56PM +0100, Chris Wilson wrote:
> I hit send before completing a make htmldoc, and lo I forgot to fix up
> the cut'n'paste.
>
> Fixes: a4fce9cb782a ("drm/prime: Take a ref on the drm_dev when exporting...")
> Reported-by: kbuild test robot
> Signed-off-by: Chris Wils
On Wed, Oct 05, 2016 at 04:31:33PM +0200, Marek Vasut wrote:
> Drop unneeded drm_connector_unregister() and remove the unnecessary
> wrapper functions around drm_connector_cleanup().
>
> Signed-off-by: Marek Vasut
> Cc: Daniel Vetter
Yeah, since 4.8 the only connectors you need to register/unre
On Wed, Oct 05, 2016 at 08:34:14PM +0200, Stefan Christ wrote:
> Fix invalid sphinx markup in the comment for the newly added
> DRM_FB_HELPER_DEFAULT_OPS.
>
> Signed-off-by: Stefan Christ
> ---
> Hi,
>
> > > If I'm not mistaken v1 of this patch is already in drm-misc so you may
> > > want to se
On Thu, Oct 06, 2016 at 11:02:58AM +0200, Andrzej Hajda wrote:
> Hi Daniel, Archit,
>
> On 30.09.2016 12:33, Andrzej Hajda wrote:
> > On 30.09.2016 12:07, Daniel Vetter wrote:
> >> On Fri, Sep 30, 2016 at 09:30:16AM +0530, Archit Taneja wrote:
> >>> Hi Andrezj,
> >>>
> >>> On 09/26/2016 07:10 PM,
On Wed, Oct 05, 2016 at 09:36:17PM +0200, Noralf Trønnes wrote:
>
> Den 05.10.2016 15:22, skrev Laurent Pinchart:
> > Hi Noralf,
> >
> > Thank you for the patch.
> >
> > On Sunday 11 Sep 2016 20:47:41 Noralf Trønnes wrote:
> > > This enables panic message output for fb cma helper framebuffers.
Hi Bjorn,
On 27 September 2016 at 18:01, Bjorn Andersson
wrote:
> On Wed 21 Sep 05:09 PDT 2016, Emil Velikov wrote:
>
>> On 20 September 2016 at 09:32, Peter Griffin
>> wrote:
>> > Hi Emil,
>> >
>> > On Tue, 20 Sep 2016, Emil Velikov wrote:
>> >
>> >> On 5 September 2016 at 14:16, Peter Griffin
Hi Daniel, Archit,
On 30.09.2016 12:33, Andrzej Hajda wrote:
> On 30.09.2016 12:07, Daniel Vetter wrote:
>> On Fri, Sep 30, 2016 at 09:30:16AM +0530, Archit Taneja wrote:
>>> Hi Andrezj,
>>>
>>> On 09/26/2016 07:10 PM, Andrzej Hajda wrote:
SiI8620 transmitter converts eTMDS/HDMI signal to MHL
Use drm_accurate_vblank_count so we have the full 32 bit to represent
the frame counter and userspace has a simpler way of knowing when the
counter wraps around.
Signed-off-by: Tomeu Vizoso
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/i915/i915_irq.c | 6 +++---
1 file changed, 3 insertions(+
The core provides now an ABI to userspace for generation of frame CRCs,
so implement the ->set_crc_source() callback and reuse as much code as
possible with the previous ABI implementation.
When handling the pageflip interrupt, we skip 1 or 2 frames depending on
the HW because they contain wrong v
Adds files and directories to debugfs for controlling and reading frame
CRCs, per CRTC:
dri/0/crtc-0/crc
dri/0/crtc-0/crc/control
dri/0/crtc-0/crc/data
Drivers can implement the set_crc_source callback() in drm_crtc_funcs to
start and stop generating frame CRCs and can add entries to the output
b
In preparation to using a generic API in the DRM core for continuous CRC
generation, move the related code out of i915_debugfs.c into a new file.
Eventually, only the Intel-specific code will remain in this new file.
v2: Rebased.
v6: Rebased.
v7: Fix whitespace issue.
v9: Have intel_display_cr
Hi,
this series basically takes the facility for continuously capturing CRCs
of frames from the i915 driver and into the DRM core.
The idea is that test suites such as IGT use this information to check
that frames that are exected to be identical, also have identical CRC
values.
Other drivers fo
Hi Jani,
Sorry for the delay, I've been travelling last week.
On Tue, 20 Sep 2016, Jani Nikula wrote:
> On Tue, 20 Sep 2016, Peter Griffin wrote:
> > Hi Emil,
> >
> > On Tue, 20 Sep 2016, Emil Velikov wrote:
> >
> >> On 5 September 2016 at 14:16, Peter Griffin
> >> wrote:
> >> > ST_SLIM_REMOT
Enable the VGA bridge used on the A13-Olinuxino in the sunxi defconfig
Signed-off-by: Maxime Ripard
---
arch/arm/configs/sunxi_defconfig | 1 +
1 file changed, 1 insertion(+), 0 deletions(-)
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 714da336ec86..33b
Enable the RGB to VGA bridge driver in the defconfig
Signed-off-by: Maxime Ripard
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+), 0 deletions(-)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 2c8665cd9dc5..ae1879a61bb
Now that we have support for the VGA bridges using our DRM driver, enable
the display engine for the Olimex A13-Olinuxino.
Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 54 -
1 file changed, 54 insertions(+), 0 deleti
Some boards have an entirely passive RGB to VGA bridge, based on either
DACs or resistor ladders.
Those might or might not have an i2c bus routed to the VGA connector in
order to access the screen EDIDs.
Add a bridge that doesn't do anything but expose the modes available on the
screen, either ba
The atomic helpers already call the drm_bridge_enable on our behalf,
there's no need to do it a second time.
Reported-by: Sean Paul
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_rgb.c | 6 --
1 file changed, 0 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/
Hi,
This serie is about adding support for the RGB to VGA bridge found in
the A13-Olinuxino and the CHIP VGA adapter.
Both these boards rely on an entirely passive bridge made out of
resitor ladders that do not require any initialisation. The only thing
needed is to get the timings from the scree
dri-devel/attachments/20161006/12719b9e/attachment.html>
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e complicated than a non-simple implementation.
> What do you think about this? If you think it's good, would it be
> possible for you to change this? I guess it's okay for the rest of
> the patch to stay the same.
I'll update and respin the serie.
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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