On Thu, Jul 7, 2016 at 7:03 PM, Steve Longerbeam
wrote:
> Adds the Video Deinterlacer (VDIC) unit.
>
> Signed-off-by: Steve Longerbeam
> ---
> drivers/gpu/ipu-v3/Makefile | 2 +-
> drivers/gpu/ipu-v3/ipu-common.c | 11 ++
> drivers/gpu/ipu-v3/ipu-prv.h| 6 +
> drivers/gpu/ipu-v3/ip
for me.
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>СÑеда, 6 иÑÐ»Ñ 2016, 14:52 +03:00 Ð¾Ñ Alexander Shiyan mail.ru>:
>
>Hello.
>
>I have a question to experts of GPU/DRM subsystem.
>Can I use a frame buffer for each display or subsystem involves only a
>single frame buffer in emulation mode (DRM_FBDEV_EMULATION option)?
>In my current con
.
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Hi Peter,
> [12:42] Lekensteyn: Should the video card always be powered up when a
> register is read from the HDMI audio controller? Or would it be
> better to leave the video card suspended and just fail the HDA
> register reads?
It should probably be powered up.
> [12:
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https://bugzilla.kernel.org/show_bug.cgi?id=121831
Bug ID: 121831
Summary: Several kmemcheck: Caught 64-bit read from
uninitialized memory in radeo
Product: Drivers
Version: 2.5
Kernel Version: 4.7-rc6
Hardware: All
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https://bugzilla.kernel.org/show_bug.cgi?id=36522
--- Comment #13 from Christian Casteyde ---
Update:
Still present in 4.7-rc6
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Op 08-07-16 om 17:44 schreef Gustavo Padovan:
> From: Gustavo Padovan
>
> Signalling doesn't need to be enabled at sync_file creation, it is only
> required if userspace waiting the fence to signal through poll().
>
> Thus we delay fence_add_callback() until poll is called. It only adds the
> call
On 07/08/2016 10:34 AM, Philipp Zabel wrote:
> Am Donnerstag, den 07.07.2016, 16:03 -0700 schrieb Steve Longerbeam:
>> From: Suresh Dhandapani
>>
>> This patch will change the register IPU_CSI0_CCIR_CODE_2 value from
>> 0x40596 to 0x405A6. The change is related to the Start of field 1
>> first b
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