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Applied all six patches, though I modified 3/6 as Doug suggested.
Thierry
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Hi Mark,
On Thu, Jul 7, 2016 at 9:22 PM, Mark Brown wrote:
> On Thu, Jul 07, 2016 at 10:23:56AM +0100, Build bot for Mark Brown wrote:
>
> Today's -next fails to build an arm64 allmodconfig due to:
>
>> arm64-allmodconfig
>> ../drivers/gpu/drm/rockchip/rockchip_drm_drv.c:17:27: fatal error:
e initializing at boot, if we ever want to support powering on without
the firmware!) DISPBASE has base address (in units of pixels) in the
low 16 bits, and the last included pixel in the top 16.
Want to respin using reads of the regs? Reading them once at
initialization of the HVS should be fine.
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On Tue, Jun 21, 2016 at 06:44:34PM +0300, Ville Syrjälä wrote:
> On Tue, Jun 21, 2016 at 09:53:15AM -0400, James Bottomley wrote:
> > On Mon, 2016-06-20 at 11:03 +0300, Jani Nikula wrote:
> > > Cc: Ville
> > >
> > > On Mon, 20 Jun 2016, James Bottomley <
> > > James.Bottomley at HansenPartnershi
The 100c08 scratch page is mapped using dma_map_page() before the TTM
layer has had a chance to set the DMA mask. This means we are still
running with the default of 32 when this code executes, and this causes
problems for platforms with no memory below 4 GB (such as AMD Seattle)
So move the dma_m
Hi Benjamin,
Thank you for the patch.
The git://linuxtv.org/media_tree.git vsp1 branch will be merged in v4.8 and
will conflict with this series. If you target v4.8 you should rebase the
patches on top of that branch.
For your convenience I've pushed a branch in which I've resolved the conflic
plied it to drm-vc4-next.
Thanks!
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On Thu, Jul 07, 2016 at 05:06:08PM +0200, Tomeu Vizoso wrote:
> Adds files and directories to debugfs for controlling and reading frame
> CRCs, per CRTC:
>
> dri/0/crtc-0/crc
> dri/0/crtc-0/crc/control
> dri/0/crtc-0/crc/data
>
> Drivers can implement the set_crc_source callback() in drm_crtc_fun
Benjamin Gaignard wrote:
> zpos new fields are correctly documented in drm-kms.html after running
> make htmldocs.
I'm not sure I understand. Where does htmldocs get the information from
then?
- Tobias
> Benjamin
>
> 2016-07-07 16:01 GMT+02:00 Tobias Jakobi :
>> Hello Benjamin,
>>
>>
>> Benjami
On Thu, Jul 07, 2016 at 10:18:02PM +0900, Tomasz Figa wrote:
> This is probably because we missed this hidden dependency and decided
> to push the IOMMU part separately through the IOMMU tree. I guess we
> can remove the offending patch from the IOMMU tree and let the DRM
> tree include it based on
zpos new fields are correctly documented in drm-kms.html after running
make htmldocs.
Benjamin
2016-07-07 16:01 GMT+02:00 Tobias Jakobi :
> Hello Benjamin,
>
>
> Benjamin Gaignard wrote:
>> version 5:
>> rebased on drm-next where Documentation/DocBook/gpu.tmpl doesn't
>> exist anymore.
> I think
On Thu, Jun 30, 2016 at 12:30:56PM +0100, Chris Wilson wrote:
> Backlights controlled by i915.ko and only associated with its connectors
> and also only associated with the intel_drmfb fbcon, controlled by
> i915.ko. In this situation, we already handle adjusting the backlight
> when the fbcon is b
The core provides now an ABI to userspace for generation of frame CRCs,
so implement the ->set_crc_source() callback and reuse as much code as
possible with the previous ABI implementation.
v2:
- Leave the legacy implementation in place as the ABI implementation
in the core is incompatib
Adds files and directories to debugfs for controlling and reading frame
CRCs, per CRTC:
dri/0/crtc-0/crc
dri/0/crtc-0/crc/control
dri/0/crtc-0/crc/data
Drivers can implement the set_crc_source callback() in drm_crtc_funcs to
start and stop generating frame CRCs and can add entries to the output
b
In preparation to using a generic API in the DRM core for continuous CRC
generation, move the related code out of i915_debugfs.c into a new file.
Eventually, only the Intel-specific code will remain in this new file.
v2: Rebased.
Signed-off-by: Tomeu Vizoso
---
drivers/gpu/drm/i915/Makefile
Hi,
this series basically takes the facility for continuously capturing CRCs
of frames from the i915 driver and into the DRM core.
The idea is that test suites such as IGT use this information to check
that frames that are exected to be identical, also have identical CRC
values.
Other drivers fo
Hi Greg,
Any comment on this?
Thanks,
Gustavo
2016-06-20 Gustavo Padovan :
> From: Gustavo Padovan
>
> Hi Greg,
>
> This is the last step in the Sync Framwork de-stage task. It de-stage
> the SW_SYNC validation framework and the sync_debug info debugfs file.
>
> The first 3 patches are cle
se:
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Hi Dave,
This is the main 4.8 pull for radeon and amdgpu. Sorry for the delay,
I meant to send this out last week, but I was moving house. Lots of
changes here:
- ATPX improvements for better dGPU power control on PX systems
- New power features for CZ/BR/ST
- Pipelined BO moves and evictions in
Rename the CSI client device in the client_reg[] table to
"imx-ipuv3-csi".
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 374100e..
The image converter kernel API supports conversion contexts and
job queues, so we should allow more than one handle to the IC, so
that multiple users can add jobs to the queue.
Note however that users that control the IC manually (that do not
use the image converter APIs but setup the IC task by h
This patch implements complete image conversion support to ipu-ic,
with tiling to support scaling to and from images up to 4096x4096.
Image rotation is also supported.
The internal API is subsystem agnostic (no V4L2 dependency except
for the use of V4L2 fourcc pixel formats).
Callers prepare for
There can be multiple IC tasks using the IRT, so the IRT needs
a separate use counter. Create a private ipu_irt_enable() to
enable the IRT module when any IC task requires rotation, and
ipu_irt_disable() when a task no longer needs the IRT.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/
From: Suresh Dhandapani
This patch will change the register IPU_CSI0_CCIR_CODE_2 value from
0x40596 to 0x405A6. The change is related to the Start of field 1
first blanking line command bit[5-3] for NTSC format only. This
change is dependent with ADV chip where the NEWAVMODE is set to 0
in regist
The CSI data format was being programmed incorrectly for the
1x16 media bus formats. The CSI data format for 16-bit must
be bayer/generic (CSI_SENS_CONF_DATA_FMT_BAYER).
Suggested-by: Carsten Resch
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-csi.c | 6 +-
1 file changed, 1 in
Set the sensor full frame based on whether the passed in mbus_fmt
is 720x480 (NTSC) or 720x576 (PAL).
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-csi.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/
Adds ipu_ic_set_src() which is just aa wrapper around
ipu_set_ic_src_mux().
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-ic.c | 10 ++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-ic.c b/drivers/gpu/ipu-v3/ipu-ic
Adds ipu_csi_set_src() which is just a wrapper around
ipu_set_csi_src_mux().
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-csi.c | 8
include/video/imx-ipu-v3.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi
Adds the VDIC field input IDMAC channels. These channels
transfer fields F(n-1), F(n), and F(N+1) from memory to
the VDIC (channels 8, 9, 10 respectively).
Signed-off-by: Steve Longerbeam
---
include/video/imx-ipu-v3.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/video/imx-ipu-
Adds ipu_set_vdi_src_mux() that selects the VDIC input
(from CSI or memory).
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-common.c | 20
include/video/imx-ipu-v3.h | 1 +
2 files changed, 21 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/dr
Adds functions to link and unlink IDMAC source channels to sink
channels.
So far the following links are supported:
IPUV3_CHANNEL_IC_PRP_ENC_MEM -> IPUV3_CHANNEL_MEM_ROT_ENC
PUV3_CHANNEL_IC_PRP_VF_MEM -> IPUV3_CHANNEL_MEM_ROT_VF
IPUV3_CHANNEL_IC_PP_MEM -> IPUV3_CHANNEL_MEM_ROT_PP
More lin
Adds of-alias id to ipu_soc and retrieve with ipu_get_num().
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-common.c | 8
drivers/gpu/ipu-v3/ipu-prv.h| 1 +
include/video/imx-ipu-v3.h | 1 +
3 files changed, 10 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-comm
Adds ipu_cpmem_get_burstsize().
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 6 ++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index a36c35e..fcb7dc8 100644
--- a/
Adds ipu_cpmem_set_uv_offset(), to set planar U/V offsets.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 7 +++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 64
Adds the Video Deinterlacer (VDIC) unit.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/Makefile | 2 +-
drivers/gpu/ipu-v3/ipu-common.c | 11 ++
drivers/gpu/ipu-v3/ipu-prv.h| 6 +
drivers/gpu/ipu-v3/ipu-vdi.c| 266
include/video/
These updates to IPUv3 are needed for media staging drivers
for i.MX5/6 video capture and mem2mem.
Steve Longerbeam (15):
gpu: ipu-v3: Add Video Deinterlacer unit
gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()
gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()
gpu: ipu-v3: Add ipu_get_num()
gp
Hello Benjamin,
Benjamin Gaignard wrote:
> version 5:
> rebased on drm-next where Documentation/DocBook/gpu.tmpl doesn't
> exist anymore.
I think the documentation has just moved to Documentation/gpu, so the
zpos property should be documented there then.
With best wishes,
Tobias
> rework sti
Hi Philipp,
On Wed, Jul 6, 2016 at 11:52 PM, Philipp Zabel
wrote:
> Hi,
>
> I have tested Liu Ying's imx drm atomic mode setting conversion series [1]
Thanks for the testing!
> with three different outputs (DPI + eDP bridge, LVDS + panel, HDMI)
> and noticed that in the LDB case bus_format han
Some panels only accept bpc (bit per color) 6-bit.
But, the default bpc in mt8173 display data path is 8-bit.
If we didn't enable dithering function to convert bpc,
display cannot show the smooth grayscale image.
In mt8173, the dithering function in OD (OverDrive) and
GAMMA module, we have to conf
Apply gamma function to correct brightness values.
It applies arbitrary mapping curve to compensate the
incorrect transfer function of the panel.
Signed-off-by: Bibby Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c |8 +++
drivers/gpu/drm/mediatek/mtk_drm_crtc.h |1 +
drivers/g
This is MT8173 gamma & dither support PATCH v3, based on 4.7-rc1.
Changes since v2:
-Modify defines to match the register field names in the MT8173 datasheet
-Made dithering function support hardware mirroring well on two monitor.
Bibby Hsieh (2):
drm/mediatek: Add gamma correction
drm/med
version 4:
fix null pointer issue while setting zpos in plane reset function
This patch replaces zpos property handling custom code in rcar DRM
driver with calls to generic DRM code.
Signed-off-by: Benjamin Gaignard
Cc: Daniel Vetter
Cc: Ville Syrjala
Cc: Laurent Pinchart
Cc: Marek Szyprowsk
From: Marek Szyprowski
This patch replaces zpos property handling custom code in Exynos DRM
driver with calls to generic DRM code.
Signed-off-by: Marek Szyprowski
Signed-off-by: Benjamin Gaignard
Cc: Inki Dae
Cc: Daniel Vetter
Cc: Ville Syrjala
Cc: Joonyoung Shim
Cc: Seung-Woo Kim
Cc: An
remove private zpos property and use instead the generic new.
zpos range is now fixed per plane type and normalized before
being using in mixer.
Signed-off-by: Benjamin Gaignard
Cc: Inki Dae
Cc: Daniel Vetter
Cc: Ville Syrjala
Cc: Joonyoung Shim
Cc: Seung-Woo Kim
Cc: Andrzej Hajda
Cc: Krzy
From: Marek Szyprowski
version 5:
- remove zpos range check and comeback to 0 to N-1
normalization algorithm
version 4:
- make sure that normalized zpos value is stay
in the defined property range and warn user if not
This patch adds support for generic plane's zpos property property with
w
version 5:
rebased on drm-next where Documentation/DocBook/gpu.tmpl doesn't
exist anymore.
rework sti patch because some plane functions have changed since v4
version 4:
make sure that normalized zpos value is stay in the defined property
range and warn user if not.
Fix NULL pointer bug in rcar-d
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On Wed, Jul 6, 2016 at 7:56 AM, Joe Perches wrote:
> On Tue, 2016-07-05 at 15:36 -0700, Markus Mayer wrote:
>> On 5 July 2016 at 15:14, Joe Perches wrote:
>> > On Tue, 2016-07-05 at 13:47 -0700, Markus Mayer wrote:
>> > > This series introduces a family of generic string case conversion
>> > > fu
errors
from before. This looks better.
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On Mon, Jul 4, 2016 at 4:19 PM, wrote:
> From: Wei Yongjun
>
> data allocated with devm_kzalloc should not be freed using kfree,
> because doing so causes a dangling pointer, and a subsequent
> double free, use devm_kfree instead.
>
> Signed-off-by: Wei Yongjun
> ---
> drivers/gpu/drm/tegra/so
(-g)?
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Mesa and X developer
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On Thu, 2016-07-07 at 09:55 -0700, James Bottomley wrote:
> On Thu, 2016-07-07 at 19:14 +0300, Ville Syrjälä wrote:
> > On Tue, Jun 21, 2016 at 06:44:34PM +0300, Ville Syrjälä wrote:
> > > On Tue, Jun 21, 2016 at 09:53:15AM -0400, James Bottomley wrote:
> > > > On Mon, 2016-06-20 at 11:03 +0300
On Tue, Jul 05, 2016 at 01:47:05PM -0700, Markus Mayer wrote:
> All functions return a pointer to the terminating '\0' character in the
> modified string ("dst" or "s", respectively).
I think this is going to be confusing. From the man:
The strcpy() and strncpy() functions return a pointe
From: Jan Leupold
The code is applying the same scaling for the X and Y components,
thus making the scaling feature only functional when both components
have the same scaling factor.
Do the s/_w/_h/ replacement where appropriate to fix vertical scaling.
Signed-off-by: Jan Leupold
Fixes: 1a3967
Rather than returning immediately, make sure to unlock the
mutexes first.
Signed-off-by: Sinclair Yeh
Reviewed-by: Charmaine Lee
Reported-by: Emil Velikov
Cc:
---
drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/
On Thu, 30 Jun 2016, Chris Wilson wrote:
> Backlights controlled by i915.ko and only associated with its connectors
> and also only associated with the intel_drmfb fbcon, controlled by
> i915.ko. In this situation, we already handle adjusting the backlight
> when the fbcon is blanked/unblanked and
Hi Liu,
Am Donnerstag, den 07.07.2016, 15:44 +0800 schrieb Ying Liu:
> Hi Philipp,
>
> On Wed, Jul 6, 2016 at 11:52 PM, Philipp Zabel
> wrote:
> > Hi,
> >
> > I have tested Liu Ying's imx drm atomic mode setting conversion series [1]
>
> Thanks for the testing!
[...]
> I didn't program imx_ldb
On Thu, 2016-07-07 at 19:14 +0300, Ville Syrjälä wrote:
> On Tue, Jun 21, 2016 at 06:44:34PM +0300, Ville Syrjälä wrote:
> > On Tue, Jun 21, 2016 at 09:53:15AM -0400, James Bottomley wrote:
> > > On Mon, 2016-06-20 at 11:03 +0300, Jani Nikula wrote:
> > > > Cc: Ville
> > > >
> > > > On Mon, 20
bbed...
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Am 07.07.2016 um 05:32 schrieb Michel Dänzer:
> On 06.07.2016 22:45, Tejun Heo wrote:
>> On Wed, Jul 06, 2016 at 12:12:52PM +0900, Michel Dänzer wrote:
>>
>>> Not being very familiar with the workqueue APIs, I'll describe how it's
>>> supposed to work from a driver POV, which will hopefully help
This effectively reverts
commit afcd950cafea6e27b739fe7772cbbeed37d05b8b
Author: Chris Wilson
Date: Wed Jun 10 15:58:01 2015 +0100
drm: Avoid the double clflush on the last cache line in
drm_clflush_virt_range()
as we have observed issues with serialisation of the clflush operations
on B
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regards to the libraries it
loads?
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Please attach a gdb backtrace of a crash.
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