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https://bugzilla.kernel.org/show_bug.cgi?id=85351
--- Comment #4 from Ralf-Peter Rohbeck ---
I blacklisted mgag200 to fix it.
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--- Comment #3 from Joseph Bisch ---
Created attachment 217761
--> https://bugzilla.kernel.org/attachment.cgi?id=217761&action=edit
kern.log
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Joseph Bisch changed:
What|Removed |Added
CC||joseph.bisch at hpe.com
--- Comment #2 fro
On 2016-05-26 02:11, Alexander Stein wrote:
> On Thursday 26 May 2016 08:23:42, Meng Yi wrote:
>> Hi Mark,
>>
>> > You've not specifically described the problem here - what are the
>> > endiannesses of both the CPU and the device you're talking to? What
>> > specifically is the endianess problem y
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To get KFD support in radeon we need the following
initialization to happen in this order, their
respective driver file that has its init routine
listed next to it:
0. AMD IOMMUv1:arch/x86/kernel/pci-dma.c
1. AMD IOMMUv2:drivers/iommu/amd_iommu_v2.c
2. AMD KFD:drivers/gpu/drm/amd/a
From: Monk Liu
1,should use late_fini to kfree all resource otherwise
the released pointer maybe accessed in IRQ ip fini routine.
2,hwmgr should not be kfree by pem_fini which is invoked
by hw fini path.
Signed-off-by: Monk Liu
Reviewed-by: Alex Deucher
Reviewed-by: Christian König
Signed-o
From: Monk Liu
This implements late_init support for powerplay.
Signed-off-by: Monk Liu
Reviewed-by: Alex Deucher
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 17 +
1 file changed, 17 insertions(+)
diff --git
From: Monk Liu
This give IP modules an optional late cleanup
function. This is needed to handle tricky inter-module
dependencies during tear down.
Signed-off-by: Monk Liu
Reviewed-by: Alex Deucher
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/amd
This patch set fixes module unloading when powerplay is enabled.
The issue is a dependency between the the IH (interrupt handler)
IP module and the powerplay (power management) IP modules.
The IH module may call back into other IP modules to disable
interrupt sources after the other modules have al
From: Tom St Denis
Must wait for SERDES idle before exiting RLC SAFEMODE
Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/
Hi Javier,
On 05/24/2016 01:01 PM, Yakir Yang wrote:
> Hi all,
>
> This series have been posted about one month, still no comments, help here :(
This series works rightly on Rockchip platform, and most of them haven't
touch the
common analogix_dp driver (except for the hotplug fixed). So i guess
Connectors are unregistered by mtk_drm_drv via drm_connector_unregister_all().
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index
Do not try to dereference dpi if it is NULL.
Since dpi can never be NULL when mtk_dpi_set_display_mode() is called,
remove the message.
Reported-by: Heinrich Schuchardt
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/dr
Add an optional ddc-i2c-bus phandle property that points to
an I2C master controller that handles the connector DDC pins.
Signed-off-by: Philipp Zabel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/display/connector/hdmi-connector.txt | 1 +
1 file changed, 1 insertion(+)
diff --g
From: Jie Qiu
MT8173 HDMI hardware has a output control bit to enable/disable HDMI
output. Because of security reason, so this bit can ONLY be controlled
in ARM supervisor mode. Now the only way to enter ARM supervisor is the
ARM trusted firmware. So atf provides a API for HDMI driver to call to
From: Jie Qiu
This patch adds drivers for the HDMI bridge connected to the DPI0
display subsystem function block, for the HDMI DDC block, and for
the HDMI PHY to support HDMI output.
This includes an interface to the generic hdmi-codec driver to start
or stop audio playback and to retrieve ELD (E
Add the device tree binding documentation for Mediatek HDMI,
HDMI PHY and HDMI DDC devices.
Signed-off-by: Philipp Zabel
Acked-by: Rob Herring
---
.../bindings/display/mediatek/mediatek,hdmi.txt| 148 +
1 file changed, 148 insertions(+)
create mode 100644
Documentation
This series contains the MT8173 HDMI encoder, PHY, and DDC drivers.
Changes since v15:
- Fix DDC idle polling, the SIFM_TRI bit is set when the ddc controller is
busy.
- Don't register the HDMI connector, mtk_drm_drv will do it using
drm_connector_register_all().
- Drop device tree patche
The latest mainline kernel (commit 3f59de0) shows a regression. The symptom is
that as soon as the kernel is started, the display is blanked, and it is never
turned on again. This problem was bisected to commit
f21a21983ef13a031250c4c3f6018e29a549d0f1
("drm/i915: Splitting intel_dp_detect"). The
Bugzilla https://bugzilla.kernel.org/show_bug.cgi?id=105331
reports that the "AEO model 0" display is driven with 8 bpc
without dithering by default, which looks bad because that
panel is apparently a 6 bpc DP panel with faulty EDID.
A fix for this was made by commit 013dd9e03872
("drm/i915/dp: fa
This reverts commit 013dd9e03872
("drm/i915/dp: fall back to 18 bpp when sink capability is unknown")
This commit introduced a regression into stable kernels,
as it reduces output color depth to 6 bpc for any video
sink connected to a Displayport connector if that sink
doesn't report a specific co
Following Jani's advice, this series just fixes the stable kernel
regressions for DP color precision on Intel by reverting Jani's
commit and adding the edid 6 bpc quirk for the AEO 0 panel to fix
the original fdo bug that triggered this. Minimal patches to allow
easy backporting to affected stable
On Fri, May 27, 2016 at 01:07:33AM +0530, Bhaktipriya Shridhar wrote:
> alloc_workqueue replaces deprecated create_workqueue().
>
> create_workqueue has been replaced with alloc_workqueue with max_active
> as 0 since there is no need for throttling the number of active work items.
>
> WQ_MEM_RECL
https://bugzilla.kernel.org/show_bug.cgi?id=88861
--- Comment #22 from Wilfried Klaebe ---
The issue goes away too, then. I don't currently see any difference to when I
reverted 704ab614ec12. Xorg comes up on boot like it also did with 4.5.4 (and
4.5.5).
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From: Marek Olšák
---
radeon/radeon_surface.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
index 5ec9745..1424660 100644
--- a/radeon/radeon_surface.c
+++ b/radeon/radeon_surface.c
@@ -957,8 +957,10 @@ static int eg
On 05/26/16 13:17, Daniel Vetter wrote:
> On Thu, May 26, 2016 at 11:35:44AM +0300, Jyri Sarha wrote:
>> > Implements gamma tables for OMAP4, OMAP5, and dra7xx SoCs and adds a
>> > workaround for errata that may break LCD1 channel if gamma tables
>> > are in use.
>> >
>> > Also adds new drm_crtc_en
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On Fri, May 27, 2016 at 12:15:17AM +0530, Bhaktipriya Shridhar wrote:
> alloc_workqueue replaces deprecated create_workqueue().
>
> kfd_process_wq is used for delay destruction. A work item embedded in
> kfd_process gets queued to kfd_process_wq and when it executes it
> destroys and frees the con
On Thu, May 26, 2016 at 10:34:57AM +0100, Chris Wilson wrote:
> Currently the plane's index is determined by walking the list of all
> planes in the mode and finding the position of that plane in the list. A
> linear walk, especially a linear walk within a linear walk as frequently
> conceived by i
: Tomi Valkeinen
Tomi
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On Thu, May 26, 2016 at 01:35:18PM +0100, Chris Wilson wrote:
> In order to give the driver the chance to initialise the data structures
> that will be exposed through debugfs, perform driver->load() before
> registering the debugfs entries. (Otherwise it may be possible for
> userspace to cause an
On Wed, May 25, 2016 at 04:51:21PM -0700, Linus Torvalds wrote:
> On Wed, May 25, 2016 at 10:56 AM, Josh Poimboeuf
> wrote:
> >
> > I used to have a STACKTOOL_IGNORE_INSN macro that would tell the tool to
> > skip warnings for specific instructions in inline asm:
> >
> > Here's an example of it h
In order to give the driver the chance to initialise the data structures
that will be exposed through debugfs, perform driver->load() before
registering the debugfs entries. (Otherwise it may be possible for
userspace to cause an oops through the debugfs interfaces.) As the
driver load is now befor
Currently the plane's index is determined by walking the list of all
planes in the mode and finding the position of that plane in the list. A
linear walk, especially a linear walk within a linear walk as frequently
conceived by i915.ko [O(N^2)] quickly comes to dominate profiles.
The plane's index
case. If call drm_mode_crtc_set_gamma_size,
with 256, but set the gamma_lut_size_property to 1024, the X still works
but trough atomic API I can use the full length gamma table.
I wonder if should do yet one more patch-round?
BR,
Jyri
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amdkfd need to destroy the debug manager in case amdkfd's notifier
function is called before the unbind function, because in that case,
the unbind function will exit without destroying debug manager.
Signed-off-by: Oded Gabbay
---
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 10 --
1 file
When unbinding a process from a device (initiated by amd_iommu_v2), the
driver needs to make sure that process still exists in the process table.
There is a possibility that amdkfd's own notifier handler -
kfd_process_notifier_release() - was called before the unbind function
and it already removed
On Thu, May 26, 2016 at 11:35:44AM +0300, Jyri Sarha wrote:
> Implements gamma tables for OMAP4, OMAP5, and dra7xx SoCs and adds a
> workaround for errata that may break LCD1 channel if gamma tables
> are in use.
>
> Also adds new drm_crtc_enable_color_mgmt() as suggested[1] by Daniel
> Vetter and
On Thu, May 26, 2016 at 12:59:09PM +0300, Jyri Sarha wrote:
> On 05/26/16 12:05, Tomi Valkeinen wrote:
> > Hi Jyri, Daniel,
> >
> > On 26/05/16 11:35, Jyri Sarha wrote:
> >> Add drm_crtc_enable_color_mgmt(), remove
> >> drm_helper_crtc_enable_color_mgmt()
> >> and update drm/i915-driver (the only
al gamma lut size?
Tomi
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On Thu, May 26, 2016 at 11:43 AM, Josh Poimboeuf wrote:
>
> That's fine with me, it is indeed a rare case. We can always add the
> per-instruction macro later if needed. Here's a patch.
Ingo, I can take this directly, unless you have other things pending
that you want to send anyway and would
river that has a
> connector node.
I'm not sure what you mean by that. I really think it should be a
separate driver in order to share the common code that so far the
current implementations put in some driver specific code (even though
it might be completely generic).
Thanks!
Maxime
--
M
Implement gamma_lut atomic crtc properties, set crtc gamma size to 256
for all crtcs and use drm_atomic_helper_legacy_gamma_set() as
gamma_set func. The tv-out crtc has 1024 element gamma table (with
10bit precision) in HW, but current Xorg server does not accept
anything else but 256 elements so t
Workaround for errata i734 in DSS dispc
- LCD1 Gamma Correction Is Not Working When GFX Pipe Is Disabled
For gamma tables to work on LCD1 the GFX plane has to be used at least
once after DSS HW has come out of reset. The workaround sets up a
minimal LCD setup with GFX plane and waits for one vert
Add gamma table support to DSS dispc.
DSS driver initializes the default gamma table at component bind time
and holds a copy of all gamma tables in its internal data structure.
Each call to dispc_mgr_set_gamma() updates the internal table and
triggers write to the HW, if it is enabled. The tables
Add drm_crtc_enable_color_mgmt(), remove drm_helper_crtc_enable_color_mgmt()
and update drm/i915-driver (the only user of the old function).
The new function is more flexible. It allows driver to enable only the
features it has without forcing to enable all three color management
properties: degam
Implements gamma tables for OMAP4, OMAP5, and dra7xx SoCs and adds a
workaround for errata that may break LCD1 channel if gamma tables
are in use.
Also adds new drm_crtc_enable_color_mgmt() as suggested[1] by Daniel
Vetter and get rid of the old drm_helper_crtc_enable_color_mgmt(). I
have not test
On Tue, May 24, 2016 at 10:20 PM, Philipp Zabel
wrote:
> Am Dienstag, den 24.05.2016, 18:10 +0800 schrieb Liu Ying:
>> The IPUv3 primary plane doesn't support partial off screen.
>> So, this patch separates plane check logics for primary plane and overlay
>> plane and adds more limitations on the
On 05/26/16 11:08, Daniel Vetter wrote:
> On Wed, May 25, 2016 at 11:43:30PM +0300, Jyri Sarha wrote:
>> Remove obsolete drm_helper_crtc_enable_color_mgmt(). The function is
>> replaced by drm_crtc_enable_color_mgmt().
>>
>> Signed-off-by: Jyri Sarha
>
> Ah, here it is. Tbh this is patch splittin
On Thursday 26 May 2016 08:23:42, Meng Yi wrote:
> Hi Mark,
>
> > You've not specifically described the problem here - what are the
> > endiannesses of both the CPU and the device you're talking to? What
> > specifically is the endianess problem you are seeing, what are you seeing
> > and what do
On Thursday 26 May 2016 08:18:30, Meng Yi wrote:
> Hi Alexander,
>
> > From your backtrace I guess wait_event_timeout is called in some atomic
> > context (might_sleep(); is called inside wait_event_timeout). This has
> > nothing to do with regmap.
>
> Here is my view of point:
> Since IRQ setup
On Wed, May 25, 2016 at 6:30 PM, Daniel Vetter wrote:
> On Wed, May 25, 2016 at 05:37:41PM +0800, Ying Liu wrote:
>> On Tue, May 24, 2016 at 6:57 PM, Daniel Vetter wrote:
>> > On Tue, May 24, 2016 at 06:10:44PM +0800, Liu Ying wrote:
>> >> Since CRTC has already been disabled in crtc_funcs->prepa
dumb_vga_nop,
> > + .pre_enable = dumb_vga_nop,
> > + .post_disable = dumb_vga_nop,
> > +};
> > +
> > +static int dumb_vga_probe(struct platform_device *pdev)
> > +{
> > + struct dumb_vga *vga;
> > + struct device_node *ddc;
> > +
> > + vga = devm_kzalloc(&pdev->dev, sizeof(*vga), GFP_KERNEL);
> > + if (!vga)
> > + return -ENOMEM;
> > + platform_set_drvdata(pdev, vga);
> > +
> > + ddc = of_parse_phandle(pdev->dev.of_node, "ddc-i2c-bus", 0);
> > + if (ddc) {
> > + vga->ddc = of_find_i2c_adapter_by_node(ddc);
>
> You're leaking the reference to the I2C adapter.
>
> Also, shouldn't you use of_get_i2c_adapter_by_node() ? Otherwise you won't
> take a reference to the adapter module.
Indeed, I'll fix it.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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fix and simplify clock management in crtc to avoid unbalanced
call to clk_prepare_enable and clk_disable_unprepare functions
remove unused functions
Signed-off-by: Benjamin Gaignard
---
drivers/gpu/drm/sti/sti_crtc.c | 57 +-
1 file changed, 29 insertions(
Currently the plane's index is determined by walking the list of all
planes in the mode and finding the position of that plane in the list. A
linear walk, especially a linear walk within a linear walk as frequently
conceived by i915.ko [O(N^2)] quickly comes to dominate profiles.
The plane's index
On Thu, May 26, 2016 at 10:53:30AM +0200, Maxime Ripard wrote:
> Hi Laurent,
>
> On Mon, May 16, 2016 at 04:24:15PM +0300, Laurent Pinchart wrote:
> > Hi Maxime,
> >
> > Thank you for the patch.
> >
> > On Monday 16 May 2016 14:47:13 Maxime Ripard wrote:
> > > +fallback:
> > > + /*
> > > + * In
On Wed, May 25, 2016 at 05:04:14PM -0400, Alex Deucher wrote:
> Just some general cleanup in the GPU scheduler.
>
> Christian König (8):
Since when has Christian forgot how git send-email works?
;-)
Cheers, Daniel
> drm/amdgpu: fix coding style in the scheduler v2
> drm/amdgpu: remove beg
On Wed, May 25, 2016 at 11:43:30PM +0300, Jyri Sarha wrote:
> Remove obsolete drm_helper_crtc_enable_color_mgmt(). The function is
> replaced by drm_crtc_enable_color_mgmt().
>
> Signed-off-by: Jyri Sarha
Ah, here it is. Tbh this is patch splitting too far, since when you move a
function it's mu
On Thu, May 26, 2016 at 9:38 AM, Marek Olšák wrote:
> From: Marek Olšák
>
Reviewed-by: Alex Deucher
> ---
> radeon/radeon_surface.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
> index 5ec9745..1424660 100
On Wed, May 25, 2016 at 10:19:50PM +0100, Emil Velikov wrote:
> On 25 May 2016 at 22:05, Emil Velikov wrote:
> > On 25 May 2016 at 21:43, Jyri Sarha wrote:
> >> Add drm_crtc_enable_color_mgmt() to. The new function makes the old
> >> drm_helper_crtc_enable_color_mgmt() obsolete. The new function
On Wed, May 25, 2016 at 04:46:15PM +0100, Jose Abreu wrote:
> Hi all,
>
> Currently I am trying to develop a DRM driver that will use
> Xilinx VDMA to transfer video data to a HDMI TX Phy and I am
> facing a difficulty regarding the understanding of the DRM DMA
> Engine. I looked at several source
On Tue, May 24, 2016 at 06:10:44PM +0800, Liu Ying wrote:
> Since CRTC has already been disabled in crtc_funcs->prepare(), it doesn't hurt
> to disable the primary plane in drm_helper_crtc_mode_set() before enabling it
> in drm_helper_crtc_mode_set_base(). This makes those who reject active plane
On Thu, May 26, 2016 at 11:02:55AM +0800, Ying Liu wrote:
> On Wed, May 25, 2016 at 6:30 PM, Daniel Vetter wrote:
> > On Wed, May 25, 2016 at 05:37:41PM +0800, Ying Liu wrote:
> >> On Tue, May 24, 2016 at 6:57 PM, Daniel Vetter wrote:
> >> > On Tue, May 24, 2016 at 06:10:44PM +0800, Liu Ying wrot
On Wed, May 25, 2016 at 02:11:02PM -0400, Lyude wrote:
> Thanks to Ville Syrjälä for pointing me towards the cause of this issue.
>
> Unfortunately one of the sideaffects of having the refclk for a DPLL set
> to SSC is that as long as it's set to SSC, the GPU will prevent us from
> powering down
On Wed, May 25, 2016 at 07:55:23PM +, Yang, Eric wrote:
> Hi Thierry Reding,
>
> enum hdmi_picture_aspect {
> > HDMI_PICTURE_ASPECT_NONE,
> > HDMI_PICTURE_ASPECT_4_3,
> > HDMI_PICTURE_ASPECT_16_9,
> > + HDMI_PICTURE_ASPECT_64_27,
> > + HDMI_PICTURE_ASPECT_256_135,
> >
ave hardware to
test with, so I didn't dig in at all.
-Jeff
--
Jeff Mahoney
SUSE Labs
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drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size);
Any reason drm_crtc_enable_color_mgmt() couldn't also call
drm_mode_crtc_set_gamma_size()?
Tomi
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assignee for the bug.
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Hello Yakir,
On 05/26/2016 05:34 AM, Yakir Yang wrote:
> Hi Javier,
>
> On 05/24/2016 01:01 PM, Yakir Yang wrote:
>> Hi all,
>>
>> This series have been posted about one month, still no comments, help here :(
> This series works rightly on Rockchip platform, and most of them haven't
> touch the
https://bugzilla.kernel.org/show_bug.cgi?id=88861
--- Comment #21 from Lukas Wunner ---
If you revert 4eebd5a4e7269 ("apple-gmux: lock iGP IO to protect from vgaarb
changes") instead of 704ab614ec12, does the issue go away?
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?
Hi Mark,
> You've not specifically described the problem here - what are the endiannesses
> of both the CPU and the device you're talking to? What specifically is the
> endianess problem you are seeing, what are you seeing and what do you
> expect to see?
>
The CPU is little endian and the devi
Hi Alexander,
> From your backtrace I guess wait_event_timeout is called in some atomic
> context (might_sleep(); is called inside wait_event_timeout). This has nothing
> to do with regmap.
>
Here is my view of point:
Since IRQ setup codes using regmap, and which is not setup properly, so
wait_
On Thu, May 26, 2016 at 01:17:18PM +0100, Chris Wilson wrote:
> Currently the plane's index is determined by walking the list of all
> planes in the mode and finding the position of that plane in the list. A
> linear walk, especially a linear walk within a linear walk as frequently
> conceived by i
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