On 05/06/2016 08:27 PM, Ville Syrjälä wrote:
> On Mon, Mar 28, 2016 at 01:52:44AM +0200, Mario Kleiner wrote:
>> Bugzilla https://bugzilla.kernel.org/show_bug.cgi?id=105331
>>
>> received a potential fix that was backported to stable. While that
>> patch itself is correct for treating DP video si
(Resending as I couldn't find this message from January in the list archives.)
Hello.
We have a board which has Newhaven Display LCD [1] connected via a what
seems to be a custom 40-signal LCD connector. That connector includes (6-bit
per component) RGB signals, DISP, H/VSYNC, and the pixel
Den 06.05.2016 16:43, skrev Thierry Reding:
> On Fri, May 06, 2016 at 04:34:08PM +0200, Noralf Trønnes wrote:
>> Den 06.05.2016 16:15, skrev Thierry Reding:
>>> On Fri, May 06, 2016 at 04:08:16PM +0200, Daniel Vetter wrote:
On Fri, May 06, 2016 at 04:03:47PM +0200, Thierry Reding wrote:
On Mon, Mar 28, 2016 at 01:52:44AM +0200, Mario Kleiner wrote:
> Bugzilla https://bugzilla.kernel.org/show_bug.cgi?id=105331
>
> received a potential fix that was backported to stable. While that
> patch itself is correct for treating DP video sinks with "unknown
> color depth", it uncovered some
On Friday 06 May 2016 08:07 PM, Jon Hunter wrote:
> On 06/05/16 11:45, Laxman Dewangan wrote:
> +
> + /* Last entry */
> + TEGRA_IO_PAD_MAX,
> Nit should these be TEGRA_IO_PADS_xxx?
Because this was name of single pad and hence I said TEGRA_IO_PAD_XXX.
>> +};
>> +
>> +/* tegra_io_pads_s
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On Fri, May 06, 2016 at 12:21:04PM +0100, Sudip Mukherjee wrote:
> Hi Daniel,
> I am trying to use i915 in one of our board which has Intel ATOM E3840.
> I know Intel has released emgd driver for this cpu to use i915 but emgd
> is not supported on v4.5 (or v4.6). The board is having SFI (simple
> f
Forwarded Message
Subject: [PATCH 3/3] drm/edid: Add 6 bpc quirk for display AEO model 0.
Date: Mon, 28 Mar 2016 01:52:47 +0200
From: Mario Kleiner
To: dri-devel at lists.freedesktop.org
CC: mario.kleiner.de at gmail.com, Jani Nikula ,
Ville Syrjälä , Daniel Vetter
, stabl
Forwarded Message
Subject: [PATCH 2/3] drm/i915/dp: Try to find proper bpc for DP->legacy
converters.
Date: Mon, 28 Mar 2016 01:52:46 +0200
From: Mario Kleiner
To: dri-devel at lists.freedesktop.org
CC: mario.kleiner.de at gmail.com, Jani Nikula ,
Ville Syrjälä , Daniel Ve
Forwarded Message
Subject: [PATCH 1/3] drm/edid: Set 8 bpc color depth for displays with
"DFP 1.x compliant TMDS".
Date: Mon, 28 Mar 2016 01:52:45 +0200
From: Mario Kleiner
To: dri-devel at lists.freedesktop.org
CC: mario.kleiner.de at gmail.com, Jani Nikula ,
Ville SyrjälÃ
Ping? Could somebody give this a review? Would be good to get the
associated regressions in DVI/VGA output precision fixed in intel
hw, also for stable kernels which regressed.
Resending the three patches...
thanks,
-mario
On 03/28/2016 01:52 AM, Mario Kleiner wrote:
> Bugzilla https://bugzilla
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The async page flip path was missing drm_crtc_vblank_get/put
completely. The sync flip path was missing a vblank put, so async
flips only reported proper pageflip completion events by chance,
and vblank irq's never turned off after a first vsync'ed page flip
until system reboot.
Tested against Ras
get_vblank_counter hooked up to drm_vblank_count() which alway was
non-sensical but didn't hurt in the past. Since Linux 4.4 it
triggers a WARN_ON_ONCE in drm_update_vblank_count on first vblank
irq disable, so fix it by hooking to drm_vblank_no_hw_counter().
Tested against Raspian kernel 4.4.8 tr
Hi Eric and all,
two small fixes against vc4 kms, built and tested agains the
Raspberry Pi foundations 4.4.8 kernel tree on RPi2B.
I'm tinkering with a Rpi 2B a bit to see if your vc4 work can
already make the Pi useful as a device for some serious but low
cost neuro-science applications.
Eric:
If an MST device is disconnected while the machine is suspended, the
number of connectors will change as well after we call
intel_dp_mst_resume(). This means that any previous atomic state we had
before suspending is no longer valid, since it'll still be pointing to
missing connectors. We need to c
On Fri, May 06, 2016 at 04:54:17PM +0200, Thierry Reding wrote:
> On Thu, May 05, 2016 at 05:13:37PM +0100, Robin Murphy wrote:
> > Until an encoder component is available to trigger the HDLCD's component
> > master bind callback, the drm_device we keep in drvdata isn't allocated.
> > Since it is q
On Fri, May 06, 2016 at 03:39:03PM +0200, Daniel Vetter wrote:
> This was forgotten when adding the the refcounting to
> drm_connector_state.
>
> v2: Don't forget to unreference existing connectors. This isn't
> relevant on driver load, but this code also runs on resume, and there
> we already hav
Am Donnerstag, den 05.05.2016, 10:37 +1000 schrieb Dave Airlie:
> On 3 May 2016 at 18:48, Philipp Zabel wrote:
> > Hi Dave,
> >
> > here is the imx-ipuv3-crtc autoloading fix so you don't have to revert
> > commit
> > 304e6be652e2 ("gpu: ipu-v3: Assign of_node of child platform devices to
> > cor
From: Sonny Jiang
Updated to handle latest UVD ucode.
Signed-off-by: Sonny Jiang
Reviewed-by: Christian König
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 62 +++--
1 file changed, 59 insertions(+), 3 deleti
From: Christian König
Use of the ctx pointer is not safe, because they are likely already
be assigned to another ctx when doing comparing.
v2: recreate from scratch, avoid all unnecessary changes.
Signed-off-by: Christian König
Reviewed-by: Monk.Liu
Signed-off-by: Alex Deucher
---
drivers
nerally speaking, it looks like tesselation support is a bit of a mess :(
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> - if (!pm_runtime_suspended(dev))
> + if (!pm_runtime_suspended(dev) || !drm)
> return 0;
Perhaps rather than this workaround you should only enable runtime PM on
this after the master has been bound?
Thierry
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From: Ville Syrjälä
Add a helper which aids in the identification of DP dual mode
(aka. DP++) adaptors. There are several types of adaptors
specified: type 1 DVI, type 1 HDMI, type 2 DVI, type 2 HDMI
Type 1 adaptors have a max TMDS clock limit of 165MHz, type 2 adaptors
may go as high as 300MH
lways talk to the panel directly, and hence the code to deal with
the panel specifics could be part of the display pipe functions.
Thierry
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On Fri, May 06, 2016 at 04:34:08PM +0200, Noralf Trønnes wrote:
>
> Den 06.05.2016 16:15, skrev Thierry Reding:
> >On Fri, May 06, 2016 at 04:08:16PM +0200, Daniel Vetter wrote:
> >>On Fri, May 06, 2016 at 04:03:47PM +0200, Thierry Reding wrote:
> >>>On Thu, May 05, 2016 at 03:24:34PM +0200, Nora
Hi Daniel,
Am Freitag, den 06.05.2016, 15:16 +0200 schrieb Daniel Vetter:
> On Fri, May 06, 2016 at 03:05:49PM +0200, Philipp Zabel wrote:
> > From: CK Hu
> >
> > This patch adds an initial DRM driver for the Mediatek MT8173 DISP
> > subsystem. It currently supports two fixed output streams from
Den 06.05.2016 16:15, skrev Thierry Reding:
> On Fri, May 06, 2016 at 04:08:16PM +0200, Daniel Vetter wrote:
>> On Fri, May 06, 2016 at 04:03:47PM +0200, Thierry Reding wrote:
>>> On Thu, May 05, 2016 at 03:24:34PM +0200, Noralf Trønnes wrote:
Add function to create a simple connector for a
The IO pins of Tegra SoCs are grouped for common control of IO
interface like setting voltage signal levels and power state of
the interface. The group is generally referred as IO pads. The
power state and voltage control of IO pins can be done at IO pads
level.
Tegra generation SoC supports the p
The function tegra_pmc_readl() returns the u32 type data and hence
change the data type of variable where this data is stored to u32
type.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
-This is new in series as per discussion on V1 series to use u32 for
tegra_pmc_readl.
Changes from V2:
-
Use BIT macro for register field definition and make constant as U
when using in shift operator like (3 << 30) to (3U << 30)
Signed-off-by: Laxman Dewangan
---
Changes from V1:
- Remove the indenting of line which is not for BIT macro usage.
Changes from V2:
- None
---
drivers/soc/tegra/pmc.c |
The IO pins of Tegra SoCs are grouped for common control of IO interface
like setting voltage signal levels and power state of the interface. The
group is generally referred as IO pads. The power state and voltage control
of IO pins can be done at IO pads level.
Tegra124 onwards IO pads support t
ilerplate go away.
Thierry
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On Fri, May 06, 2016 at 03:01:17PM +0100, Chris Wilson wrote:
> On Fri, May 06, 2016 at 03:39:03PM +0200, Daniel Vetter wrote:
> > This was forgotten when adding the the refcounting to
> > drm_connector_state.
> >
> > v2: Don't forget to unreference existing connectors. This isn't
> > relevant on
On Fri, May 06, 2016 at 04:03:47PM +0200, Thierry Reding wrote:
> On Thu, May 05, 2016 at 03:24:34PM +0200, Noralf Trønnes wrote:
> > Add function to create a simple connector for a panel.
>
> I'm not sure I see the usefulness of this. Typically you'd attach a
> panel to an encoder/connector, in
On Fri, May 06, 2016 at 04:01:37PM +0200, Thierry Reding wrote:
> On Fri, May 06, 2016 at 03:39:53PM +0200, Noralf Trønnes wrote:
> >
> > Den 05.05.2016 19:03, skrev Daniel Vetter:
> > > On Thu, May 05, 2016 at 03:24:34PM +0200, Noralf Trønnes wrote:
> > > > Add function to create a simple conne
top.org/archives/dri-devel/attachments/20160506/f9df44ff/attachment.sig>
On Fri, May 06, 2016 at 03:39:53PM +0200, Noralf Trønnes wrote:
>
> Den 05.05.2016 19:03, skrev Daniel Vetter:
> > On Thu, May 05, 2016 at 03:24:34PM +0200, Noralf Trønnes wrote:
> > > Add function to create a simple connector for a panel.
> > >
> > > Signed-off-by: Noralf Trønnes
> > Like in
Den 05.05.2016 19:03, skrev Daniel Vetter:
> On Thu, May 05, 2016 at 03:24:34PM +0200, Noralf Trønnes wrote:
>> Add function to create a simple connector for a panel.
>>
>> Signed-off-by: Noralf Trønnes
> Like in the previous patch please also add a new section for the panel
> helpers to gpu.tm
This was forgotten when adding the the refcounting to
drm_connector_state.
v2: Don't forget to unreference existing connectors. This isn't
relevant on driver load, but this code also runs on resume, and there
we already have an atomic state. Spotted by Chris Wilson.
Cc: Gabriel Feceoru
Cc: Chris
On 06/05/16 11:45, Laxman Dewangan wrote:
> The IO pins of Tegra SoCs are grouped for common control of IO
> interface like setting voltage signal levels and power state of
> the interface. The group is generally referred as IO pads. The
> power state and voltage control of IO pins can be done at
On 04/25, Maxime Ripard wrote:
> The A10 SoCs and its relatives has a special clock controller to drive the
> display engines (both frontend and backend), that have a lot in common with
> the clock to drive the first TCON channel.
>
> Add a driver to support both.
>
> Signed-off-by: Maxime Ripard
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On Fri, May 06, 2016 at 05:07:09PM +0300, Ville Syrjälä wrote:
> On Fri, May 06, 2016 at 03:39:03PM +0200, Daniel Vetter wrote:
> > This was forgotten when adding the the refcounting to
> > drm_connector_state.
> >
> > v2: Don't forget to unreference existing connectors. This isn't
> > relevant
On Fri, May 06, 2016 at 03:05:49PM +0200, Philipp Zabel wrote:
> From: CK Hu
>
> This patch adds an initial DRM driver for the Mediatek MT8173 DISP
> subsystem. It currently supports two fixed output streams from the
> OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively.
>
> Signed-off-by: CK
On 06/05/16 11:45, Laxman Dewangan wrote:
> The function tegra_pmc_readl() returns the u32 type data and hence
> change the data type of variable where this data is stored to u32
> type.
>
> Signed-off-by: Laxman Dewangan
>
> ---
> Changes from V1:
> -This is new in series as per discussion on
On Fri, May 06, 2016 at 03:01:37PM +0200, Noralf Trønnes wrote:
>
> Den 05.05.2016 18:27, skrev Daniel Vetter:
> >On Thu, May 05, 2016 at 03:24:31PM +0200, Noralf Trønnes wrote:
> >>Add drm_fb_cma_create_with_funcs() for drivers that need to set the
> >>dirty() callback.
> >>
> >>Cc: laurent.pin
On 06/05/16 11:45, Laxman Dewangan wrote:
> Use BIT macro for register field definition and make constant as U
> when using in shift operator like (3 << 30) to (3U << 30)
>
> Signed-off-by: Laxman Dewangan
>
> ---
> Changes from V1:
> - Remove the indenting of line which is not for BIT macro us
hine for me
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This was forgotten when adding the the refcounting to
drm_connector_state.
Cc: Gabriel Feceoru
Cc: Chris Wilson
Cc: Marius Vlad
Cc: Dave Airlie
Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)")
---
drivers/gpu/drm/i915/intel_display.c | 2 ++
1 file changed, 2 insertions(+)
d
The hdmitx_dig_cts clock signal is not a child of tvdpll_445p5m,
but is routed out of the HDMI PHY module.
Signed-off-by: Philipp Zabel
Acked-by: Stephen Boyd
---
drivers/clk/mediatek/clk-mt8173.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c
b/drivers/cl
The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.
Signed-off-by: Philipp Zabel
Acked-by: James Liao
Acked-by: Stephen Boyd
---
drivers/clk/mediatek/cl
This mux is supposed to select a fitting divider after the PLL
is already set to the correct rate.
Signed-off-by: Philipp Zabel
Acked-by: James Liao
Acked-by: Stephen Boyd
---
drivers/clk/mediatek/clk-mt8173.c | 6 +-
drivers/clk/mediatek/clk-mtk.h| 15 +--
2 files changed
From: Jie Qiu
Add DPI connector/encoder to support HDMI output via the
attached HDMI bridge.
Signed-off-by: Jie Qiu
Signed-off-by: Philipp Zabel
---
Changes since v15:
- Order mtk_drm_drivers alphabetically
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_dp
From: CK Hu
This patch add a drm encoder/connector driver for the MIPI DSI function
block of the Mediatek display subsystem and a phy driver for the MIPI TX
D-PHY control module.
Signed-off-by: Jitao Shi
Signed-off-by: Philipp Zabel
---
Changes since v15:
- Order mtk_drm_drivers alphabeticall
From: CK Hu
This patch adds an initial DRM driver for the Mediatek MT8173 DISP
subsystem. It currently supports two fixed output streams from the
OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively.
Signed-off-by: CK Hu
Signed-off-by: YT Shen
Signed-off-by: Daniel Kurtz
Signed-off-by: Bibb
From: CK Hu
Add device tree binding documentation for the display subsystem in
Mediatek MT8173 SoCs.
Signed-off-by: CK Hu
Signed-off-by: Philipp Zabel
Acked-by: Rob Herring
---
.../bindings/display/mediatek/mediatek,disp.txt| 203 +
.../bindings/display/mediatek/media
To allow building mediatek-drm.ko as a module, the
mtk_smi_larb_get and mtk_smi_larb_put symbols have
to be exported.
Signed-off-by: Philipp Zabel
---
drivers/memory/mtk-smi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index 089091f.
Rebased onto drm-next, replaced drm_send_vblank_event() with
drm_crtc_send_vblank_event() and reordered a bit: the platform driver
list alphabetically, and the mtk_smi_larb_get/put export patch first.
regards
Philipp
Changes since v15:
- Export mtk_smi_larb_get/put before using it
- Use drm_crt
Den 05.05.2016 18:27, skrev Daniel Vetter:
> On Thu, May 05, 2016 at 03:24:31PM +0200, Noralf Trønnes wrote:
>> Add drm_fb_cma_create_with_funcs() for drivers that need to set the
>> dirty() callback.
>>
>> Cc: laurent.pinchart at ideasonboard.com
>> Signed-off-by: Noralf Trønnes
>> ---
>> dr
On Fri, May 06, 2016 at 03:39:03PM +0200, Daniel Vetter wrote:
> This was forgotten when adding the the refcounting to
> drm_connector_state.
>
> v2: Don't forget to unreference existing connectors. This isn't
> relevant on driver load, but this code also runs on resume, and there
> we already hav
When debugfs or sysfs registration failed, we failed to clean up the
idr registration. Reorder to fix this.
Cc: Dave Airlie
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_crtc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gp
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connected to
the docking station -- screen blinks and comes back to display on the laptop,
xrandr reports xrandr: Configure crtc 4 failed and agd5f on IRC looking at
http://www.onerussian.com/tmp/dmesg-20160506-1.txt (attached to this report as
well) summarized as "link training failed o
On 6 May 2016 at 09:39, Daniel Vetter wrote:
> On Fri, May 06, 2016 at 09:37:25AM +0100, Chris Wilson wrote:
>> On Fri, May 06, 2016 at 10:28:41AM +0200, Daniel Vetter wrote:
>> > Also, the unbind function is totally not sufficient, and it's calling
>> > the deprecated drm_put_dev.
>>
Pretty much
your directions it all worked out perfectly :-)
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On Fri, May 06, 2016 at 03:09:43PM +0200, Daniel Vetter wrote:
> This was forgotten when adding the the refcounting to
> drm_connector_state.
>
> Cc: Gabriel Feceoru
> Cc: Chris Wilson
> Cc: Marius Vlad
> Cc: Dave Airlie
> Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)")
> ---
Whilst looking at the fallout from using connector references for
atomic, I noticed that there is an early return buried in
drm_atomic_set_crtc_for_connector() that if hit could cause us to leak a
reference on the connector.
Fixes: d2307dea14 (drm/atomic: use connector references (v3))
Signed-off-
Hi Daniel,
I am trying to use i915 in one of our board which has Intel ATOM E3840.
I know Intel has released emgd driver for this cpu to use i915 but emgd
is not supported on v4.5 (or v4.6). The board is having SFI (simple
firmware interface) and maybe for that i915 is not finding the VBIOS and
oth
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Hi Dave,
not much new stuff this time. A (micro-)optimization to allow the
hangcheck timer to be coalesced with other wakeups in the system and a
fix to handle mmaping of prime imported and userptr buffers correctly. I
don't think we have seen any actual issues going back to this yet, so I
figured
|x86-64 (AMD64)
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+CC: Inki
On 05/06/2016 09:48 AM, Tobias Jakobi wrote:
> Hello Andrzej,
>
>
> Andrzej Hajda wrote:
>> Hi Tobias,
>>
>> On 05/05/2016 07:27 PM, Tobias Jakobi wrote:
>>> Hello,
>>>
>>> here's another issue I experience when enabling FIMD on the ODROID-X2.
>>>
>>> I can trigger a IOMMU pagefault by
On Fri, May 06, 2016 at 09:37:25AM +0100, Chris Wilson wrote:
> On Fri, May 06, 2016 at 10:28:41AM +0200, Daniel Vetter wrote:
> > Also, the unbind function is totally not sufficient, and it's calling
> > the deprecated drm_put_dev.
>
> diff --git a/include/drm/drmP.h b/include/drm/drmP.h
> index
It's unused, and really this helper should only look at the state
structure and nothing else. Note that this conflicts with a patch from
Dave that adds refcounting to drm_connectors. It's not yet clear
whether the check Dave adds for connector != NULL is really needed or
the right check.
Cc: Dave
It's unused, and really this helper should only look at the state
structure and nothing else.
Cc: Maarten Lankhorst
Cc: Thierry Reding
Cc: Eric Anholt
Cc: Laurent Pinchart
Cc: Inki Dae
Cc: Tomi Valkeinen
Cc: Mark Yao
Acked-by: Thierry Reding
Acked-by: Maarten Lankhorst
Signed-off-by: Dani
It's unused, and really this helper should only look at the state
structure and nothing else.
v2: Rebase on top of rockchip changes
Cc: Maarten Lankhorst
Cc: Thierry Reding
Cc: Eric Anholt
Cc: Mark Yao
Acked-by: Thierry Reding
Acked-by: Maarten Lankhorst
Signed-off-by: Daniel Vetter
---
d
Also, the unbind function is totally not sufficient, and it's calling
the deprecated drm_put_dev. Please look at what other drivers are
doing and fix things up.
Cc: Xinliang Liu
Cc: Xinwei Kong
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 31 +-
Exynos DRM devices update their registers at vblank time. Exynos-DRM uses
custom mechanism to wait for vblank. This mechanism is error prone -
variables are not updated atomically. As a result in certain circumstances
user space can try to free buffers which are still in use by hardware,
in such ca
Hello Andrzej,
Andrzej Hajda wrote:
> Hi Tobias,
>
> On 05/05/2016 07:27 PM, Tobias Jakobi wrote:
>> Hello,
>>
>> here's another issue I experience when enabling FIMD on the ODROID-X2.
>>
>> I can trigger a IOMMU pagefault by starting X once, quitting, and
>> restarting X again.
>>
>
> I have o
ect is that BE can use the format now
too, but there may be other issues with BE.
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They are part of the phy so you can't share them.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index e4f3dc7..b5464ca3 100644
--- a/dr
On Fri, May 06, 2016 at 10:28:41AM +0200, Daniel Vetter wrote:
> Also, the unbind function is totally not sufficient, and it's calling
> the deprecated drm_put_dev.
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 360b2a74e1ef..7efc0b477e38 100644
--- a/include/drm/drmP.h
+++ b/include/d
From: Tom St Denis
Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/
From: Tom St Denis
Add name that we can print out in kernel messages
to aid in debugging.
v2: drop DAL changes for upstream
Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 1 +
drivers/gpu/drm/amd/amdgpu/a
When this flag is set, we program the hardware to execute the flip
during horizontal blank (i.e. for the next scanline) instead of during
vertical blank (i.e. for the next frame).
Ported from radeon commit:
drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC
v2: drop DAL change for upstream
Reviewed-by
devel/attachments/20160506/ea042c06/attachment.html>
cause:
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On Thu, May 05, 2016 at 10:45:31PM +0200, Stefan Richter wrote:
> On May 05 Stefan Richter wrote:
> > Quoting the changelog of the commit:
> [...]
> > - Download intel-gpu-tools, compile it, and run:
> >$ sudo ./tests/kms_frontbuffer_tracking --run-subtest '*fbc-*' 2>&1
> > | tee fbc.
Hi Tobias,
On 05/05/2016 07:27 PM, Tobias Jakobi wrote:
> Hello,
>
> here's another issue I experience when enabling FIMD on the ODROID-X2.
>
> I can trigger a IOMMU pagefault by starting X once, quitting, and
> restarting X again.
>
I have observed similar behavior on arm64 dev board which
uses
Hi Tobias,
On 05/05/2016 06:23 PM, Tobias Jakobi wrote:
> Don't use the vrefresh field of the DRM mode since this
> one is supposed to only be used for debug purpose.
> Instead use the clock field which should also provide
> much more precise information.
>
> Also sanitize the case in which the cl
Hi Linus,
Fixes for i915, amdgpu/radeon and imx.
The IMX fix is for an autoloading regression found in Fedora.
The radeon fixes, are the same fix to amdgpu/radeon to avoid
a hardware lockup in some circumstances with a bad mode, and
a double free bug I took a few hours chasing down the other
morn
slightest clue what it all means.
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On May 05 Daniel Vetter wrote:
> Hm, if it's watermarks then testing with latest drm-intel-nightly would be
> interesting. We finally managed to land atomic watermark updates (should
> all be there in 4.7 too):
>
> https://cgit.freedesktop.org/drm-intel
I will see if I can test this sometime soon
On May 05 Zanoni, Paulo R wrote:
> Em Qui, 2016-05-05 Ã s 19:45 +0200, Stefan Richter escreveu:
> > Â Â Â Â Oh, and in case you - the person reading this commit message - found
> > Â Â Â Â this commit through git bisect, please do the following:
> > Â Â Â Â Â - Check your dmesg and see if there are
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