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};
> > diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
> > index 0840612b5ed6..c72d94228915 100644
> > --- a/arch/arm/boot/dts/sun5i.dtsi
> > +++ b/arch/arm/boot/dts/sun5i.dtsi
> > @@ -338,6 +338,25 @@
> > clock
e properly tested, they can definitely be moved to sun5i.dtsi.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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4i_a10_tcon_ch1_lock;
> > +
> > + sclk1 = clk_register_composite(NULL, sclk1_name, &sclk2_name, 1,
> > + NULL, NULL,
> > + &sclk1_div->hw, &clk_divider_ops,
> > + &sclk1_gate->hw, &clk_gate_ops,
> > + 0);
> > + if (IS_ERR(sclk1)) {
> > + pr_err("%s: Couldn't register the clock\n", sclk1_name);
> > + goto free_sclk1_gate;
> > + }
> > +
> > + ret = of_clk_add_provider(node, of_clk_src_simple_get, sclk1);
> > + if (WARN_ON(ret))
> > + goto free_sclk1;
> > +
> > + return;
> > +
> > +free_sclk1:
> > + clk_unregister_composite(sclk1);
> > +free_sclk1_gate:
> > + kfree(sclk1_gate);
> > +free_sclk1_mux:
> > + kfree(sclk1_div);
> > +free_sclk2:
> > + clk_unregister(sclk2);
> > +free_sclk2_div:
> > + kfree(sclk2_div);
> > +free_sclk2_gate:
> > + kfree(sclk2_gate);
> > +free_sclk2_mux:
> > + kfree(sclk2_mux);
>
> Cleanup after of_io_request_and_map?
Indeed.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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t register the clock\n", clk_name);
> > + goto err_free_mult;
> > + }
> > +
> > + ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
> > + if (WARN_ON(ret))
>
> Any particular reason for WARN_ON instead of pr_err like above?
I guess not, I'll change that.
>
> > + goto err_clk_unregister;
> > +
> > + return;
> > +
> > +err_clk_unregister:
> > + clk_unregister_composite(clk);
> > +err_free_mult:
> > + kfree(mult);
> > +err_free_gate:
> > + kfree(gate);
>
> Clean up after of_io_request_and_map(), otherwise
Ack
>
> Acked-by: Chen-Yu Tsai
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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gt; + if (data->has_div)
> > + kfree(div);
> > +free_gate:
> > + kfree(gate);
> > +free_mux:
> > + kfree(mux);
>
> Cleanup after of_io_request_and_map()?
Hmm, indeed...
>
> > +}
> > +
> > +static struct sun4i_a10_display_clk_data sun4i_a10_tcon_ch0_data = {
> > + .has_rst= true,
> > + .parents= 4,
> > + .offset_en = 31,
> > + .offset_rst = 29,
>
> My datasheets (A10 v1.5, A20 v1.4), say bit 30 for LCD0 ch0 reset.
>
> A13 and R8 manuals do not list this clock, but A10s does, which has
> bit 30 for LCD reset and bit 29 for TV encoder reset.
>
> I suggest changing has_rst to int, and for sun5i variant, have
> has_rst = 2, reset_cells = 1, for 2 separate reset controls.
> The tcon and tv encoder bits of the DTSI should be updated as
> well.
>
> I assume your tests work because U-boot already de-asserted the
> resets (both if you're using composite output).
You're right, I'll fix it as you suggested.
> > + .offset_mux = 24,
> > + .width_mux = 2,
> > +};
> > +
> > +static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node)
> > +{
> > + sun4i_a10_display_init(node, &sun4i_a10_tcon_ch0_data);
> > +}
> > +CLK_OF_DECLARE(sun4i_a10_tcon_ch0, "allwinner,sun4i-a10-tcon-ch0-clk",
> > + sun4i_a10_tcon_ch0_setup);
> > +
> > +static struct sun4i_a10_display_clk_data sun4i_a10_display_data = {
> > + .has_div= true,
>
> Missing .has_rst = true.
Indeed
> > + .parents= 3,
> > + .offset_en = 31,
> > + .offset_rst = 30,
> > + .offset_mux = 24,
> > + .offset_div = 0,
>
> This is already implied.
Because the structure would already by initialised to 0?
Yeah, true, but I wanted to make that explicit that the div offset is
actually 0, and not something that got forgotten.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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ists.infradead.org/pipermail/linux-arm-kernel/2015-October/382115.html
Has that changed?
> > +};
> > +
> > +tve0: tv-encoder at 01c0a000 {
> > + compatible = "allwinner,sun4i-a10-tv-encoder";
> > + reg = <0x01c0a000 0x1000>;
> > + clocks = <&ahb_gates 34>;
> > +
> > + port {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + tve0_in_tcon0: endpoint at 0 {
> > + reg = <0>;
>
> I would drop the reg where you only have 1 node for ports or endpoints.
Ok
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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The hdmitx_dig_cts clock signal is not a child of tvdpll_445p5m,
but is routed out of the HDMI PHY module.
Signed-off-by: Philipp Zabel
---
drivers/clk/mediatek/clk-mt8173.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c
b/drivers/clk/mediatek/clk-mt8173.c
Add an optional ddc-i2c-bus phandle property that points to
an I2C master controller that handles the connector DDC pins.
Signed-off-by: Philipp Zabel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/display/connector/hdmi-connector.txt | 1 +
1 file changed, 1 insertion(+)
diff --g
The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.
Signed-off-by: Philipp Zabel
Acked-by: James Liao
---
drivers/clk/mediatek/clk-mt8173.c | 5
This mux is supposed to select a fitting divider after the PLL
is already set to the correct rate.
Signed-off-by: Philipp Zabel
Acked-by: James Liao
---
drivers/clk/mediatek/clk-mt8173.c | 2 +-
drivers/clk/mediatek/clk-mtk.h| 7 +--
2 files changed, 6 insertions(+), 3 deletions(-)
dif
From: CK Hu
This patch adds the device nodes for the HDMI encoder, HDMI PHY,
and HDMI CEC modules.
Signed-off-by: CK Hu
Signed-off-by: Cawa Cheng
Signed-off-by: Jie Qiu
Signed-off-by: Daniel Kurtz
Signed-off-by: Philipp Zabel
---
Changes since v9:
- remove flt_5v pin setup
- disable cec,
From: CK Hu
This patch adds the device nodes for the DISP function blocks
comprising the display subsystem.
Signed-off-by: CK Hu
Signed-off-by: Cawa Cheng
Signed-off-by: Jie Qiu
Signed-off-by: Daniel Kurtz
Signed-off-by: Philipp Zabel
---
Changes since v9:
- remove dpi0 output port and end
From: Jie Qiu
MT8173 HDMI hardware has a output control bit to enable/disable HDMI
output. Because of security reason, so this bit can ONLY be controlled
in ARM supervisor mode. Now the only way to enter ARM supervisor is the
ARM trusted firmware. So atf provides a API for HDMI driver to call to
From: Jie Qiu
This patch adds drivers for the HDMI bridge connected to the DPI0
display subsystem function block, for the HDMI DDC block, and for
the HDMI PHY to support HDMI output.
Signed-off-by: Jie Qiu
Signed-off-by: Philipp Zabel
---
Changes since v9:
- fix no signal after suspend/resume
Add the device tree binding documentation for Mediatek HDMI,
HDMI PHY and HDMI DDC devices.
Signed-off-by: Philipp Zabel
Acked-by: Rob Herring
---
.../bindings/display/mediatek/mediatek,hdmi.txt| 148 +
1 file changed, 148 insertions(+)
create mode 100644
Documentation
From: Jie Qiu
Add DPI connector/encoder to support HDMI output via the
attached HDMI bridge.
Signed-off-by: Jie Qiu
Signed-off-by: Philipp Zabel
---
Changes since v9:
- whitespace fixes
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_dpi.c | 757 ++
From: CK Hu
This patch add a drm encoder/connector driver for the MIPI DSI function
block of the Mediatek display subsystem and a phy driver for the MIPI TX
D-PHY control module.
Signed-off-by: Jitao Shi
Signed-off-by: Philipp Zabel
--
Changes since v9:
- don't crash on cleanup if the connect
From: CK Hu
This patch adds an initial DRM driver for the Mediatek MT8173 DISP
subsystem. It currently supports two fixed output streams from the
OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively.
Signed-off-by: CK Hu
Signed-off-by: YT Shen
Signed-off-by: Daniel Kurtz
Signed-off-by: Bibb
From: CK Hu
Add device tree binding documentation for the display subsystem in
Mediatek MT8173 SoCs.
Signed-off-by: CK Hu
Signed-off-by: Philipp Zabel
Acked-by: Rob Herring
---
.../bindings/display/mediatek/mediatek,disp.txt| 203 +
.../bindings/display/mediatek/media
Hi,
this MT8173 DRM update gets rebased onto v4.5-rc1, fixes a few issues
and addresses review comments from the last round. The custom GEM creation
IOCTL patch has been dropped and dmabuf sg import support has been added.
The RDMA code has been moved into its own driver so it can grow into a more
This adds 'compute', 'compute extended', 'memory reads', 'memory writes'
and 'sampler balance' metric sets for Haswell.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_oa_hsw.c | 513 +++--
1 file changed, 497 insertions(+), 16 deletions(-)
diff --git a
The minimal sampling period is now configurable via a
dev.i915.oa_min_timer_exponent sysctl parameter.
Following the precedent set by perf, the default is the minimum that
won't (on its own) exceed the default kernel.perf_event_max_sample_rate
default of 10 samples/s.
Signed-off-by: Robert Br
Consistent with the kernel.perf_event_paranoid sysctl option that can
allow non-root users to access system wide cpu metrics, this can
optionally allow non-root users to access system wide OA counter metrics
from Gen graphics hardware.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_dr
Each metric set is given a sysfs entry like:
/sys/class/drm/card0/metrics//id
This allows userspace to enumerate the specific sets that are available
for the current system. The 'id' file contains an unsigned integer that
can be used to open the associated metric set via
DRM_IOCTL_I915_PERF_OPEN.
Gen graphics hardware can be set up to periodically write snapshots of
performance counters into a circular buffer via its Observation
Architecture and this patch exposes that capability to userspace via the
i915 perf interface.
Cc: Chris Wilson
Signed-off-by: Robert Bragg
Signed-off-by: Zhenyu
Adds a static OA unit, MUX + B Counter configuration for basic render
metrics on Haswell. This is autogenerated from an internal XML
description of metric sets.
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/i915_drv.h| 14
drivers/gpu
OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register. Rename now before add more gen7 OA
registers
Signed-off-by: Robert Bragg
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++--
drivers/gpu/drm/i915/i915_reg.h| 2 +-
2 files changed,
Adds base i915 perf infrastructure for Gen performance metrics.
This adds a DRM_IOCTL_I915_PERF_OPEN ioctl that takes an array of uint64
properties to configure a stream of metrics and returns a new fd usable
with standard VFS system calls including read() to read typed and sized
records; ioctl()
Compared to the last revision, this is just rebased on drm-intel-nightly
Robert Bragg (8):
drm/i915: Add i915 perf infrastructure
drm/i915: rename OACONTROL GEN7_OACONTROL
drm/i915: Add 'render basic' Haswell OA unit config
drm/i915: Add i915 perf event for Haswell OA unit
drm/i915: adve
Hi Jitao,
Looks really good.
Just a couple of tiny things...
On Wed, Feb 3, 2016 at 4:48 PM, Jitao Shi wrote:
>
> This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
>
> Signed-off-by: Jitao Shi
> ---
[snip]
> +static int ps8640_get_modes(struct drm_connector *connector)
>
On 03.02.2016 03:38, Peter Hurley wrote:
> On 02/01/2016 09:20 PM, Archit Taneja wrote:
>> Hi Peter,
>>
>> On 02/02/2016 02:07 AM, Peter Hurley wrote:
>>> Hi Archit,
>>>
>>> Just booting 4.4-rc5+, I got this splat [1]
>>> At first glance, this appears to be a simple fix.
>>
>> Thanks for sharing th
Hi Maarten,
2016-02-03 Maarten Lankhorst :
> Op 03-02-16 om 14:25 schreef Gustavo Padovan:
> > From: Gustavo Padovan
> >
> > Turn sync_fence_info into __u64 type enable us to extend the struct in the
> > future without breaking the ABI.
> >
> > v2: use type __u64 for fence_info
> >
> > v3: fix c
The Innosilicon HDMI is a low power HDMI 1.4 transmitter
IP, and it have been integrated on some rockchip CPUs
(like RK3036, RK312x).
Signed-off-by: Yakir Yang
---
Changes in v8.1:
- Removed the unused "drm_encoder_slave.h" head file. (Jean)
Changes in v8:
- Don't check whether encoder output fo
...
URL:
<http://lists.freedesktop.org/archives/dri-devel/attachments/20160203/745d2f21/attachment.html>
Hi Jean,
Sorry about miss your comments :)
On 01/29/2016 03:20 PM, Jean-Francois Moine wrote:
> On Fri, 29 Jan 2016 14:47:39 +0800
> Yakir Yang wrote:
>
>> The Innosilicon HDMI is a low power HDMI 1.4 transmitter
>> IP, and it have been integrated on some rockchip CPUs
>> (like RK3036, RK312x).
This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
Signed-off-by: Jitao Shi
---
Changes since v8:
- Change ps8640_regw to ps8640_write_bytes
- Fine tune ps8640 power squence
- Cache the panel edid avoid power on ps8640 every ps8640_get_modes
- Replace devm_regulator_* api wi
Add documentation for DT properties supported by
ps8640 DSI-eDP converter.
Signed-off-by: Jitao Shi
Acked-by: Rob Herring
Reviewed-by: Philipp Zabel
---
Changes since v8:
- No change
---
.../devicetree/bindings/display/bridge/ps8640.txt | 43
1 file changed, 43 inserti
On 1 February 2016 at 23:10, Rob Herring wrote:
> On Sat, Jan 30, 2016 at 04:54:26PM +0800, Xinliang Liu wrote:
>> Add ADE display controller binding doc.
>> Add DesignWare DSI Host Controller v1.20a binding doc.
>>
>> Signed-off-by: Xinliang Liu
>>
>> v3:
>> - Make ade as the drm master node.
>>
Hi Dave,
Radeon and amdgpu fixes for 4.5. Highlights:
- fix and enable iceland/topaz support
- handle WC on platforms that don't support it
The following changes since commit d8b8eb829d4c30cd1e41a1ddc308a0e7c22169da:
Merge branch 'drm-rockchip-next-fixes-2016-01-22' of
https://github.com/ma
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On Wed, Feb 3, 2016 at 3:53 PM, Alex Deucher wrote:
> On Wed, Feb 3, 2016 at 3:17 AM, Oded Gabbay wrote:
>> On Tue, Feb 2, 2016 at 5:07 PM, Alex Deucher
>> wrote:
>>> On Tue, Feb 2, 2016 at 7:01 AM, Oded Gabbay
>>> wrote:
On Mon, Feb 1, 2016 at 7:01 PM, Alex Deucher
wrote:
>
>
Op 03-02-16 om 14:25 schreef Gustavo Padovan:
> From: Gustavo Padovan
>
> Turn sync_fence_info into __u64 type enable us to extend the struct in the
> future without breaking the ABI.
>
> v2: use type __u64 for fence_info
>
> v3: fix commit message to reflect the v2 change
>
> Signed-off-by: Gusta
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Hi Daniel,
Am Mittwoch, den 03.02.2016, 01:12 +0800 schrieb Daniel Kurtz:
[...]
> > +int mtk_drm_crtc_create(struct drm_device *drm_dev,
> > + const enum mtk_ddp_comp_id *path, unsigned int
> > path_len)
> > +{
[...]
> > + for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
Hi Daniel,
Am Mittwoch, den 20.01.2016, 14:23 -0800 schrieb Daniel Kurtz:
> Hi Philipp,
>
> This driver is looking very good now to me.
>
> Sorry for the delay reviewing. Some comments inline below.
[...]
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > b/drivers/gpu/drm/mediatek/
On 2016-02-03 06:04, Thierry Reding wrote:
> On Wed, Jan 27, 2016 at 06:46:50PM -0800, Stefan Agner wrote:
> [...]
>> On 2015-11-18 18:42, Stefan Agner wrote:
> [...]
>> > diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
> [...]
>> > @@ -89,6 +91,15 @@ static void fsl_dcu_drm_crtc_mode_set_n
On 2016-02-03 06:00, Thierry Reding wrote:
> On Wed, Jan 27, 2016 at 06:46:50PM -0800, Stefan Agner wrote:
> [...]
>> > diff --git a/drivers/gpu/drm/panel/panel-simple.c
>> > b/drivers/gpu/drm/panel/panel-simple.c
>> > index f97b73e..fa68b56 100644
>> > --- a/drivers/gpu/drm/panel/panel-simple.c
>>
o the
mode flags changes in the remainder of the patch.
Thierry
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not very
clear to me. I don't think we have an equivalent DRM_MODE_FLAG_* but
we could add one if there's really a need.
Thierry
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This fixes the following build failure:
drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.o: In function
`msm_dsi_pll_28nm_8960_init':
dsi_pll_28nm.c:(.text+0x1198): multiple definition of
`msm_dsi_pll_28nm_8960_init'
drivers/gpu/drm/msm/dsi/pll/dsi_pll.o:dsi_pll.c:(.text+0x0): first defined here
Signed
On Wed, Feb 3, 2016 at 1:59 PM, Maxime Ripard
wrote:
> Hi Rob,
>
> On Thu, Jan 14, 2016 at 09:15:15PM -0600, Rob Herring wrote:
>> On Thu, Jan 14, 2016 at 04:25:00PM +0100, Maxime Ripard wrote:
>> > The display pipeline of the Allwinner A10 is involving several loosely
>> > coupled components.
>>
BIT_IRQS_ENABLED was never set because of incorrect test in
decon_vlank_enable() function, what resulted in lack of enabling vblank
support. This patch fixes this issue.
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 +-
1 file changed, 1 insertion(+), 1 de
Patch ebf3fd403b79ba6561bd1a4bb5a7cacc99da08e5 ("drm/exynos: add
pm_runtime to DECON 5433") removed some code from decon_enable()
function, but it left set_bit(BIT_SUSPENDED, &ctx->flags) call, which
was earlier called only in error path. This patch removes it, what
finally lets driver to go out of
Virtual DRM device is used for memory allocation for GEM objects. On
some architectures null dma operations are assigned for virtual devices
if no explicit initialization has been made.
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/exynos_drm_drv.c | 1 +
1 file changed, 1 insertion
This patch fixes issue introduced by commit
cf67cc9a29ac19c98bc4fa0e6d14b0c1f592d322 ("drm/exynos: remove struct
exynos_drm_display"), which removed assigning of drm bridge to drm
encoder. Lack of it caused that no bridge callbacks were called on
encoder enable/disable actions.
Signed-off-by: Mare
There is no point exposing all internal functions to global kernel name
space, so make all internals functions static.
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/exynos_drm_mic.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/exynos
MIC is SoC component and important part of kms pipeline on Exynos5433,
so convert it to use component framework like other KMS/CRTC drivers.
MIC driver is already listed on KMS component driver list in Exynos DRM
core, so without this conversion, initialization of Exynos DRM core
fails on Exynos 54
Drivers should use devm_clk* interface instead of of_clk* functions.
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/exynos_drm_mic.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_mic.c
b/drivers/gpu/drm/exynos/exynos_drm_m
This patch fixes compilation warnings (on 64bit architectures) and bugs
related to casting pointers through 32bit integers.
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/exynos_drm_g2d.c | 5 +++--
drivers/gpu/drm/exynos/exynos_drm_gem.c | 2 +-
drivers/gpu/drm/exynos/exynos_drm_v
Drivers should use %p for printing pointers instead of hardcoding them
as hexadecimal integers. This patch fixes compilation warnings on 64bit
architectures.
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c| 2 +-
drivers/gpu/drm/exynos/exynos_drm_gsc.c | 2
From: Joonyoung Shim
Because PLAT_SAMSUNG isn't include exynos SoCs for arm64, but
ARCH_EXYNOS can do it. And it also needs to add ARCH_S3C64XX instead of
PLAT_SAMSUNG.
Signed-off-by: Joonyoung Shim
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/Kconfig | 2 +-
1 file changed, 1 i
Hello all,
This patch series is a set of various fixes to get Exynos DRM working on
Exynos 5433 SoCs and 64bit ARM64 architecture.
Patches are based on top of v4.5-rc2 release.
Best regards
Marek Szyprowski
Samsung R&D Institute Poland
Patch summary:
Joonyoung Shim (1):
drm/exynos: depend o
Am 02.02.2016 um 22:52 schrieb Christian König:
> Am 02.02.2016 um 22:36 schrieb Alex Deucher:
>> It's used by iceland which is VI.
>>
>> Signed-off-by: Alex Deucher
>> Cc: stable at vger.kernel.org
>
> Nice work, the full set is Reviewed-by: Christian König
>
>
> Going to test it tomorrow as
Am 31.01.2016 um 19:50 schrieb Matthew Dawson:
> On Sunday, January 24, 2016 10:49:00 AM EST Christian König wrote:
>> Am 24.01.2016 um 07:18 schrieb Matthew Dawson:
>>> When the radeon driver resets a gpu, it attempts to test whether all the
>>> rings can successfully handle an IB. If these ring
Hi Daniel,
Am Dienstag, den 02.02.2016, 16:10 +0800 schrieb Daniel Kurtz:
> On Tue, Jan 5, 2016 at 1:36 AM, Philipp Zabel
> wrote:
> > From: CK Hu
> >
> > This patch adds the device nodes for the DISP function blocks
> > comprising the display subsystem.
> >
> > Signed-off-by: CK Hu
> > Signed
Hi Daniel,
Am Dienstag, den 02.02.2016, 21:32 +0800 schrieb Daniel Kurtz:
> Hi Philipp,
>
> I ran into some issues when trying to bring up just the DSI path of
> the Mediatek DRM driver.
> Things were failing in probe/bind that triggered some oopses in the
> unbind/error paths.
> This resulted in
Hi Daniel,
Am Mittwoch, den 03.02.2016, 00:24 +0800 schrieb Daniel Kurtz:
> Hi Philipp,
>
> Two more comments below...
>
> On Tue, Feb 2, 2016 at 4:10 PM, Daniel Kurtz wrote:
> > On Tue, Jan 5, 2016 at 1:36 AM, Philipp Zabel
> > wrote:
[...]
> >> +
> >> + dsi0: dsi at 1401b000 {
Hi Daniel,
Am Dienstag, den 02.02.2016, 16:10 +0800 schrieb Daniel Kurtz:
> On Tue, Jan 5, 2016 at 1:36 AM, Philipp Zabel
> wrote:
> > From: CK Hu
> >
> > This patch adds the device nodes for the DISP function blocks
> > comprising the display subsystem.
> >
> > Signed-off-by: CK Hu
> > Signed
Hi Jitao,
One more comment, inline...
On Mon, Feb 1, 2016 at 12:13 PM, Jitao Shi wrote:
> This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
>
> Signed-off-by: Jitao Shi
[snip]
> +static int ps8640_probe(struct i2c_client *client,
> + const struct i2c_d
From: Gustavo Padovan
struct sync_merge_data already have documentation on top of the
struct definition. No need to duplicate it.
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/uapi/sync.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/and
From: Gustavo Padovan
Play safe and add flags member to all structs. So we don't need to
break API or create new IOCTL in the future if new features that requires
flags arises.
v2: check if flags are valid (zero, in this case)
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/sync.c
From: Gustavo Padovan
We don't use the 'fence' name to refer to sync_file anymore. So rename it
to SYNC_IOC_FILE_INFO.
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/sync.c | 2 +-
drivers/staging/android/uapi/sync.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
di
From: Gustavo Padovan
The len member of struct sync_file_info was returning the size of the whole
buffer (struct sync_file_info + sync_fence_infos at the of it). This commit
change it to return only the size of the array of sync_fence_infos.
It also moves len to be right before the sync_fences_i
From: Gustavo Padovan
Inform userspace how many fences are in the sync_fence_info field.
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/sync.c | 2 ++
drivers/staging/android/uapi/sync.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/staging/android/sync.c b/dr
From: Gustavo Padovan
Turn sync_fence_info into __u64 type enable us to extend the struct in the
future without breaking the ABI.
v2: use type __u64 for fence_info
v3: fix commit message to reflect the v2 change
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/sync.c | 2 +-
d
From: Gustavo Padovan
After removing driver_data struct sync_fence_info has now a fixed size,
thus it doesn't need any field to tell its size, it is already known.
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/sync.c | 4 +---
drivers/staging/android/uapi/sync.h | 2 --
2 fil
From: Gustavo Padovan
It is unclear in what situations driver_data should be used thus better do
not upstream it for now. If a need arises in the future a discussion can
be started to re-add it.
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/sw_sync.c | 14 --
drivers
From: Gustavo Padovan
info_data is a bit redundant, let's keep it as only sync_file_info. It is
also smaller.
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/sync.c | 26 +-
drivers/staging/android/uapi/sync.h | 9 -
2 files changed, 17 insertio
From: Gustavo Padovan
As struct sync_pt doesn't exist anymore it is a good idea remove any
reference to it in the sync_framework. sync_pts were replaced directly by
fences and here we rename it to sync_fence_info to let the fence namespace
clean.
v2: rename fence_info to sync_fence_info (Maarten
From: Gustavo Padovan
This ioctl is replicating the work of poll() syscall so let's take the
opportunity that this is still on staging tree and remove the duplication
and force new users to use the poll() standard interface.
Signed-off-by: Gustavo Padovan
---
drivers/staging/android/sync.c
From: Gustavo Padovan
Hi,
This patch series clean up IOCTLs and abi of sync framework and it is a follow
up on the clean up series I've sent on Jan 21:
http://thread.gmane.org/gmane.comp.video.dri.devel/145509
The main changes here are:
* remove of SYNC_WAIT ioctl, poll() should be used inst
Hi Maarten,
2016-01-28 Maarten Lankhorst :
> This allows iteration over encoders without requiring connection_mutex.
>
> Changes since v1:
> - Add a set_best_encoder helper function and update encoder_mask inside
> it.
> Changes since v2:
> - Relax the WARN_ON(!crtc), with explanation.
> - Cal
Hi Maarten,
2016-01-07 Maarten Lankhorst :
> While we steal the encoder away from the connector the connector may
> be updated to use a different encoder.
>
> Without this change if 2 connectors swap encoders one of them will
> end up without a crtc.
>
> Signed-off-by: Maarten Lankhorst
> ---
Hi Maarten,
2016-01-07 Maarten Lankhorst :
> This should only be touched by drm_atomic_helper.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 --
> 1 file changed, 2 deletions(-)
Reviewed-by: Gustavo Padovan
Gustavo
Hi Maarten,
2016-01-07 Maarten Lankhorst :
> This is similar to the other drm_for_each_*_mask functions.
>
> Changes since v1:
> - Use for_each_if
>
> Signed-off-by: Maarten Lankhorst
> ---
> include/drm/drm_crtc.h | 11 +++
> 1 file changed, 11 insertions(+)
Reviewed-by: Gustavo Pad
Hi Maarten,
2016-01-07 Maarten Lankhorst :
> This is useful for adding encoder_mask in crtc_state.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/drm_crtc.c | 23 +++
> include/drm/drm_crtc.h | 1 +
> 2 files changed, 24 insertions(+)
Reviewed-by: Gustav
On Tue, Feb 2, 2016 at 5:07 PM, Alex Deucher wrote:
> On Tue, Feb 2, 2016 at 7:01 AM, Oded Gabbay wrote:
>> On Mon, Feb 1, 2016 at 7:01 PM, Alex Deucher
>> wrote:
>>>
>>> On Sat, Jan 30, 2016 at 4:57 AM, Christian König
>>> wrote:
>>> > Am 30.01.2016 um 06:59 schrieb Oded Gabbay:
>>> >>
>>> >
Op 02-02-16 om 21:28 schreef Gustavo Padovan:
> Hi Maarten,
>
> 2016-02-02 Maarten Lankhorst :
>
>> Op 02-02-16 om 14:23 schreef Gustavo Padovan:
>>> From: Gustavo Padovan
>>>
>>> Making fence_info a pointer enables us to extend the struct in the future
>>> without breaking the ABI.
>>>
>>> v2: us
On Wed, Feb 3, 2016 at 3:17 AM, Oded Gabbay wrote:
> On Tue, Feb 2, 2016 at 5:07 PM, Alex Deucher wrote:
>> On Tue, Feb 2, 2016 at 7:01 AM, Oded Gabbay wrote:
>>> On Mon, Feb 1, 2016 at 7:01 PM, Alex Deucher
>>> wrote:
On Sat, Jan 30, 2016 at 4:57 AM, Christian König
wrote:
>>
-Gen-7-Observation-Architecture/20160203-053423
config: i386-defconfig (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_perf.c: In function 'gen7_oa_read&#
Hi Stefan,
I will take PTO during Chinese Spring Festival, and I will rebase my
patches according to your tree and send out after 2/16/2016 ^_^
BR
Meng
> On Wednesday, February 03, 2016 5:56 AM, Stefan Agner [stefan at agner.ch]
> wrote:
>
> Hi Meng Yi,
>
> I plan to review the patchset t
assignee for the bug.
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Hi Philipp,
Sorry for the previous HTML email. Trying again...
Below are some more comments from my observations today trying to configure
Mediatek DRM to use just the MIPI/DSI path (no HDMI).
On Tue, Jan 12, 2016 at 11:15 PM, Philipp Zabel
wrote:
> From: CK Hu
>
> This patch adds an initial
m_driver, dev);
> + if (!drm)
> + return -ENOMEM;
> +
> + drm_dev_set_unique(drm, dev_name(dev));
> +
> + ret = drm_dev_register(drm, 0);
> + if (ret < 0)
> + goto err_free;
> +
> + drm->dev_private = private;
> + private->drm = drm;
> +
> + ret = mtk_drm_kms_init(drm);
> + if (ret < 0)
> + goto err_unregister;
> +
> + return 0;
> +
> +err_unregister:
> + drm_dev_unregister(drm);
> +err_free:
> + drm_dev_unref(drm);
> + return ret;
> +}
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Hi Philipp,
Two more comments below...
On Tue, Feb 2, 2016 at 4:10 PM, Daniel Kurtz wrote:
> On Tue, Jan 5, 2016 at 1:36 AM, Philipp Zabel
> wrote:
>> From: CK Hu
>>
>> This patch adds the device nodes for the DISP function blocks
>> comprising the display subsystem.
>>
>> Signed-off-by: CK H
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