https://bugzilla.kernel.org/show_bug.cgi?id=71461
Tom Yan changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On Fri, Oct 30, 2015 at 01:59:22PM -0700, Rafael Antognolli wrote:
> On Fri, Oct 30, 2015 at 12:04:17PM +0200, Ville Syrjälä wrote:
> > On Thu, Oct 29, 2015 at 04:23:45PM -0700, Rafael Antognolli wrote:
> > > This module is heavily based on i2c-dev. Once loaded, it provides one
> > > dev node per
On Fri, Oct 30, 2015 at 10:21 PM, Maxime Ripard
wrote:
> The TV encoder is used to drive VGA and composite display.
>
> Enable it on the CHIP
The commit message does not match the contents. Missing a patch? :)
ChenYu
>
> Signed-off-by: Maxime Ripard
> ---
> arch/arm/boot/dts/sun5i-r8.dtsi | 1
Apparently pre-nv50 pageflip events happen before the actual vblank
period. Therefore that functionality got semi-disabled in
commit af4870e406126b7ac0ae7c7ce5751f25ebe60f28
Author: Mario Kleiner
Date: Tue May 13 00:42:08 2014 +0200
drm/nouveau/kms/nv04-nv40: fix pageflip events via specia
https://bugzilla.kernel.org/show_bug.cgi?id=106431
--- Comment #3 from Daniel Vetter ---
Created attachment 191661
--> https://bugzilla.kernel.org/attachment.cgi?id=191661&action=edit
attempt at fixing pre-nv50 pageflip events
Ok, I made an attempt at correctly fixing this, i.e. the 3rd option
Hey there,
this question arose during some discussion with someone concerning the
Exynos mixer and G2D.
The question is the following. Consider the Exynos mixer when run under
the IOMMU (that's sysmmu_tv IIRC). What exactly does setup the IOMMU
mapping so that the mixer can scanout the framebuffe
https://bugzilla.kernel.org/show_bug.cgi?id=99041
Maximilian Böhm changed:
What|Removed |Added
CC||winlux at gmail.com
--- Comment #3 fro
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to come up with
a nice fix soon.
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Hi Dave,
The following changes since commit 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f:
Linux 4.3-rc1 (2015-09-12 16:35:56 -0700)
are available in the git repository at:
git://anongit.freedesktop.org/tegra/linux tags/drm/panel/for-4.4-rc1
for you to fetch changes up to f1811a8a641329d0dada7c
Hi Dave,
The following changes since commit 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f:
Linux 4.3-rc1 (2015-09-12 16:35:56 -0700)
are available in the git repository at:
git://anongit.freedesktop.org/tegra/linux tags/drm/tegra/for-4.4-rc1
for you to fetch changes up to 2bcdcbfae2895764372ef9
On 30 October 2015 at 14:28, Tobias Jakobi
wrote:
> OK, I see what you mean. However this shouldn't happen as long as the
> user properly zero initializes the event context structures, right?
>
It pains me to say it but in this day and age, not everyone zero
initializes their structs (be that via
e
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her patch.
Thierry
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d"
The -vid suffix needs to go away, otherwise the binding looks good to
me.
Thierry
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Tobias Jakobi wrote:
> Hello Hyungwon,
>
>
> Hyungwon Hwang wrote:
>> On Tue, 22 Sep 2015 17:54:57 +0200
>> Tobias Jakobi wrote:
>>
>>> This allows setting the two direction registers, which specify how
>>> the engine blits pixels. This can be used for overlapping blits,
>>> which happen e.g. wh
Hi Vincent,
On 10/30/2015 6:00 PM, Vincent ABRIOU wrote:
> Hi Archit,
>
> I tested fbdev_emulation module param and it works fine for the sti driver.
> I will abandon my patch and integrate yours. And if you don't mind, I
> will update your patch to remove the #ifdef CONFIG_DRM_FBDEV_EMULATION.
S
For all buffers backed by dmabuf, wait for its reservation object's fences
before committing.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i
If a buffer is backed by dmabuf, wait on its reservation object's fences
before flipping.
Signed-off-by: Alex Goins
---
drivers/gpu/drm/i915/intel_display.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_displ
Hello all,
For a while now, I've been working to fix tearing with PRIME. This is my second
version of the solution, revised according to Daniel Vetter's and Daniel Stone's
suggestions.
Rather than using fence callbacks to explicitly trigger flipping, fences are now
used to block flipping/atomic c
From: Werner Johansson
This adds support for the Panasonic panel found in some Xperia Z2
tablets.
Signed-off-by: Werner Johansson
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/panel/Kconfig | 10 +
drivers/gpu/drm/panel/Makefile | 1 +
.../gpu/
From: Werner Johansson
This patch adds bindings for the Panasonic VVX10F034N00
WUXGA panel.
Signed-off-by: Werner Johansson
Signed-off-by: Bjorn Andersson
---
.../bindings/panel/panasonic,vvx10f034n00.txt| 20
1 file changed, 20 insertions(+)
create mode 100644
From: Werner Johansson
The MIPI_DSI_TURN_ON_PERIPHERAL and MIPI_DSI_SHUTDOWN_PERIPHERAL
packets are required for some panels, one example being the
Panasonic VVX10F034N00 panel.
Signed-off-by: Werner Johansson
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/drm_mipi_dsi.c | 47
Hi,
On 30-10-15 17:01, Chen-Yu Tsai wrote:
> On Fri, Oct 30, 2015 at 10:20 PM, Maxime Ripard
> wrote:
>> The R8 has yet another array of gates for AHB. Let's add it to the list of
>> compatibles we can deal with.
>>
>> Signed-off-by: Maxime Ripard
>> ---
>> drivers/clk/sunxi/clk-simple-gates.c
Hi Dave,
could you merge these imx-drm fixups and additional color formats?
regards
Philipp
The following changes since commit 25cb62b76430a91cc6195f902e61c2cb84ade622:
Linux 4.3-rc5 (2015-10-11 11:09:45 -0700)
are available in the git repository at:
git://git.pengutronix.de/git/pza/linux
Am Montag, den 19.10.2015, 14:11 +0200 schrieb Lucas Stach:
> Dave,
>
> could you please pick this patch up as a fix for 4.3? It fixes a
> regression introduced in this cycle by the stricter parameter validation
> in the DW HDMI driver. Philipp is on holiday this week, so I guess he
> won't be abl
ee for the bug.
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https://bugzilla.kernel.org/show_bug.cgi?id=106851
Holger Hoffstätte changed:
What|Removed |Added
CC||holger.hoffstaette at googlema
On Tue, 22 Sep 2015 17:54:58 +0200
Tobias Jakobi wrote:
> We already have g2d_copy() which implements G2D copy
> operations from one buffer to another. However we can't
> do a overlapping copy operation in one buffer.
>
> Add g2d_move() which acts like the standard memmove()
> and properly handl
On Tue, 22 Sep 2015 17:54:57 +0200
Tobias Jakobi wrote:
> This allows setting the two direction registers, which specify how
> the engine blits pixels. This can be used for overlapping blits,
> which happen e.g. when 'moving' a rectangular region inside a
> fixed buffer.
Code itself looks good.
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On Fri, Oct 30, 2015 at 03:20:46PM +0100, Maxime Ripard wrote:
> Hi everyone,
>
> The Allwinner SoCs (except for the very latest ones) all share the
> same set of controllers, loosely coupled together to form the display
> pipeline.
>
> Depending on the SoC, the number of instances of the control
On Tue, 22 Sep 2015 17:54:52 +0200
Tobias Jakobi wrote:
> Currently only fast solid color clear performance is measured.
> A large buffer is allocated and solid color clear operations
> are executed on it with randomly chosen properties (position
> and size of the region, clear color). Execution
On Tue, 22 Sep 2015 17:54:55 +0200
Tobias Jakobi wrote:
> This tests async processing of G2D jobs. A separate thread is spawned
> to monitor the DRM fd for events and check whether a G2D job was
> completed.
>
> v2: Add GPLv2 header, argument handling and documentation.
> Test is only instal
On Fri, Oct 30, 2015 at 03:20:54PM +0100, Maxime Ripard wrote:
> The Allwinner A10 and subsequent SoCs share the same display pipeline, with
> variations in the number of controllers (1 or 2), or the presence or not of
> some output (HDMI, TV, VGA) or not.
>
> This hardware supports 4 layers and 3
On Tue, 22 Sep 2015 17:54:56 +0200
Tobias Jakobi wrote:
> This matches the G2D color mode that is used in the entire code.
> The previous (incorrect) RGBA would only work since the
> Exynos mixer did its configuration based on the bpp, and not
> based on the actual pixelformat.
>
> Signed-of
So far, the i915 driver and some other drivers set it to the drm_device,
which doesn't allow one to know which DP a given aux channel is related
to. Changing this to be the drm_connector provides proper nesting, still
allowing one to get the drm_device from it. Some drivers already set it
to the dr
This module is heavily based on i2c-dev. Once loaded, it provides one
dev node per DP AUX channel, named drm_dp_auxN, where N is an integer.
It's possible to know which connector owns this aux channel by looking
at the respective sysfs /sys/class/drm_aux_dev/drm_dp_auxN/connector, if
the connector
This series implement support to a drm_dp_aux chardev that allows reading and
writing an arbitrary amount of bytes to arbitrary dpcd register addresses using
regular read, write and lseek operations.
Rafael Antognolli (2):
drm/dp: Add a drm_aux-dev module for reading/writing dpcd registers.
dr
From: Werner Johansson
This adds support for the Sharp panel found on the Qualcomm
Snapdragon 800 Dragonboard (APQ8074)
Signed-off-by: Werner Johansson
Signed-off-by: Bjorn Andersson
---
Change since v1:
- Dropped -vid suffix from compatible
drivers/gpu/drm/panel/Kconfig |
From: Werner Johansson
Signed-off-by: Werner Johansson
Signed-off-by: Bjorn Andersson
---
Change since v1:
- Dropped -vid suffix from compatible
.../bindings/display/panel/sharp,ls043t1le01.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644
Documentation
Hey Emil,
Emil Velikov wrote:
> On 30 October 2015 at 11:28, Tobias Jakobi
> wrote:
>> Hello Emil,
>>
>>
>> Emil Velikov wrote:
>>> On 30 October 2015 at 11:16, Tobias Jakobi
>>> wrote:
Hello Hyungwon,
first of all thanks for reviewing the series!
Hyungwon Hwa
On 10/06/2015 11:24 AM, Archit Taneja wrote:
> A driver calling mipi_dsi_device_new might want to unregister the device
> once it's done. It might also require it in an error handling path in
> case something didn't go right.
>
> When the dsi host driver calls mipi_dsi_host_unregister, the devices
The TV encoder is used to drive VGA and composite display.
Enable it on the CHIP
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-r8.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
index d69df3a73cb
Add the gates definition to the R8 DTSI.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-r8.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
index 691d3de75b35..d69df3a73cbf 100644
-
The TCON and Display Engines are the two most important members of the
display pipeline.
With this alone, we can already use the display to an RGB interface.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i.dtsi | 40
1 file changed, 40 insertion
The DRAM gates control whether the image / display devices on the SoC have
access to the DRAM clock or not.
Enable it.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 5 +++--
arch/arm/boot/dts/sun5i-a13.dtsi | 2 +-
arch/arm/boot/dts/sun5i-r8.dtsi | 2 +-
arch/arm/bo
Enable the display and TCON (channel 0 and channel 1) clocks that are going
to be needed to drive the display engine, tcon and TV encoders.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 8 +++---
arch/arm/boot/dts/sun5i-a13.dtsi | 3 ++-
arch/arm/boot/dts/sun5i-r8.dtsi
Enable the pll3 and pll7 clocks in the DT that are used to drive the
display-related clocks.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i.dtsi | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
in
Add the settings to support the NTSC standard.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_tv.c | 45
1 file changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index 4b95d04ff457..b
Now that we have support for the composite output, we can start adding new
supported standards. Start with PAL, and we will add other eventually.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_tv.c | 42
1 file changed, 42 insertions(+)
dif
Some Allwinner SoCs have an IP called the TV encoder that is used to output
composite and VGA signals. In such a case, we need to use the second TCON
channel.
Add support for that TV encoder.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/Makefile| 1 +
drivers/gpu/drm/sun4i/sun4i
One of the A10 display pipeline possible output is an RGB interface to
drive LCD panels directly. This is done through the first channel of the
TCON that will output our video signals directly.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/Makefile| 2 +
drivers/gpu/drm/sun4i/sun4
The display pipeline of the Allwinner A10 is involving several loosely
coupled components.
Add a documentation for the bindings.
Signed-off-by: Maxime Ripard
---
.../devicetree/bindings/drm/sunxi/sun4i-drm.txt| 122 +
1 file changed, 122 insertions(+)
create mode 100644
The Allwinner A10 and subsequent SoCs share the same display pipeline, with
variations in the number of controllers (1 or 2), or the presence or not of
some output (HDMI, TV, VGA) or not.
This hardware supports 4 layers and 32 sprites, even though we only support
one primary layer for now.
Signed
Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple
panel driver.
It is a 480x272 panel connected through a 24-bits RGB interface.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/panel/panel-simple.c | 26 ++
1 file changed, 26 insertions(+)
diff --g
The R8 has yet another array of gates for AHB. Let's add it to the list of
compatibles we can deal with.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi/clk-simple-gates.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/sunxi/clk-simple-gates.c
b/drivers/clk/sunxi/clk-simpl
The Allwinner SoCs have a gate controller to gate the access to the DRAM
clock to the some devices that need to access the DRAM directly (mostly
display / image related IPs).
Use a simple gates driver to support it.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi/clk-simple-gates.c | 2 ++
1
The TCON is a controller generating the timings to output videos signals,
acting like both a CRTC and an encoder.
It has two channels depending on the output, each channel being driven by
its own clock (and own clock controller).
Add a driver for the channel 1 clock.
Signed-off-by: Maxime Ripard
The TCON is a controller generating the timings to output videos signals,
acting like both a CRTC and an encoder.
It has two channels depending on the output, each channel being driven by
its own clock (and own clock controller).
Add a driver for the channel 0 clock.
Signed-off-by: Maxime Ripard
The A10 SoCs and relatives have a PLL controller to drive the PLL3 and
PLL7, clocked from a 3MHz oscillator, that drives the display related
clocks (GPU, display engine, TCON, etc.)
Add a driver for it.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi/Makefile | 3 +-
drivers/clk/sun
The A10 SoCs and its relatives has a special clock controller to drive the
display engines (both frontend and backend).
Add a driver for it.
Signed-off-by: Maxime Ripard
---
drivers/clk/sunxi/Makefile| 1 +
drivers/clk/sunxi/clk-sun4i-display.c | 199 ++
Hi everyone,
The Allwinner SoCs (except for the very latest ones) all share the
same set of controllers, loosely coupled together to form the display
pipeline.
Depending on the SoC, the number of instances of the controller will
change (2 instances of each in the A10, only one in the A13, for
exa
ck a
proper fix?
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Hi Dave,
A few more updates for 4.4:
- Updated register headers for GFX 8.1 for Stoney
- Add some new CZ revisions
- minor pageflip optimizations
- Fencing clean up
The following changes since commit ed885b210752563b5e90dc0933e262f768ea9fa4:
drm/amdgpu: change VM size default to 64GB (2015-10-
On Wed, Aug 12, 2015 at 11:32 AM, Daniel Vetter wrote:
> On Wed, Aug 12, 2015 at 05:00:31PM +0200, Thierry Reding wrote:
>> From: Thierry Reding
>>
>> Name all references to the pipe number (CRTC index) consistently to make
>> it easier to distinguish which is a pipe number and which is a pointer
On 10/30, Maxime Ripard wrote:
> The TCON is a controller generating the timings to output videos signals,
> acting like both a CRTC and an encoder.
>
> It has two channels depending on the output, each channel being driven by
> its own clock (and own clock controller).
>
> Add a driver for the c
https://bugzilla.kernel.org/show_bug.cgi?id=106271
--- Comment #9 from Aneroid ---
Created attachment 191631
--> https://bugzilla.kernel.org/attachment.cgi?id=191631&action=edit
Xorg.log
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--- Comment #8 from Aneroid ---
Created attachment 191621
--> https://bugzilla.kernel.org/attachment.cgi?id=191621&action=edit
dmesg after Xorg fall
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--- Comment #7 from Aneroid ---
(In reply to Alex Deucher from comment #6)
>
> You've got the arguments reversed; the first is the offload device, the
> second is the display device. Try:
>
> xrandr --setprovideroffloadsink 0x46 0x7e
Ok.
[an
On 10/30, Maxime Ripard wrote:
> diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
> index a9e1a5885846..40c32ffd912c 100644
> --- a/drivers/clk/sunxi/Makefile
> +++ b/drivers/clk/sunxi/Makefile
> @@ -9,8 +9,9 @@ obj-y += clk-a10-mod1.o
> obj-y += clk-a10-pll2.o
> obj-y += clk-
On 10/30, Maxime Ripard wrote:
> diff --git a/drivers/clk/sunxi/clk-sun4i-display.c
> b/drivers/clk/sunxi/clk-sun4i-display.c
> new file mode 100644
> index ..f13b095c6d7a
> --- /dev/null
> +++ b/drivers/clk/sunxi/clk-sun4i-display.c
> @@ -0,0 +1,199 @@
> +/*
> + * Copyright 2015 Maxim
On Fri, Oct 30, 2015 at 12:04:17PM +0200, Ville Syrjälä wrote:
> On Thu, Oct 29, 2015 at 04:23:45PM -0700, Rafael Antognolli wrote:
> > This module is heavily based on i2c-dev. Once loaded, it provides one
> > dev node per DP AUX channel, named drm_dp_auxN, where N is an integer.
> >
> > It's po
On 10/06/2015 11:24 AM, Archit Taneja wrote:
> We don't check whether a previously registered mipi_dsi_device under the
> same host shares the same virtual channel.
>
> Before registering, check if any of the registered devices doesn't
> already have the same virtual channel.
>
> This wasn't crucia
On 10/06/2015 11:24 AM, Archit Taneja wrote:
> Add a device name field in mipi_dsi_device. This name is different from
> the actual dev name (which is of the format "hostname.reg"). When the
> device is created via DT, this name is set to the modalias string.
> In the non-DT case, the driver creati
Hi Archit,
I tested fbdev_emulation module param and it works fine for the sti driver.
I will abandon my patch and integrate yours. And if you don't mind, I
will update your patch to remove the #ifdef CONFIG_DRM_FBDEV_EMULATION.
Thanks
Vincent
Reviewed-by: Vincent Abriou
On 10/30/2015 11:25 A
On 10/30/2015 11:38 AM, Daniel Vetter wrote:
> On Thu, Oct 29, 2015 at 02:02:29PM +0100, Vincent Abriou wrote:
>> DRM_STI_FBDEV is removed and replaced by the fbdev module param.
>> By default, the fbdev compatibility is disabled.
>>
>> Signed-off-by: Vincent Abriou
>> Signed-off-by: Nicolas VAN
https://bugzilla.kernel.org/show_bug.cgi?id=60523
Martin Steghöfer changed:
What|Removed |Added
CC||martin at steghoefer.eu
--- Comment #
On 30 October 2015 at 11:28, Tobias Jakobi
wrote:
> Hello Emil,
>
>
> Emil Velikov wrote:
>> On 30 October 2015 at 11:16, Tobias Jakobi
>> wrote:
>>> Hello Hyungwon,
>>>
>>> first of all thanks for reviewing the series!
>>>
>>>
>>>
>>> Hyungwon Hwang wrote:
On Tue, 22 Sep 2015 17:54:55 +0200
Hello Emil,
Emil Velikov wrote:
> On 30 October 2015 at 11:16, Tobias Jakobi
> wrote:
>> Hello Hyungwon,
>>
>> first of all thanks for reviewing the series!
>>
>>
>>
>> Hyungwon Hwang wrote:
>>> On Tue, 22 Sep 2015 17:54:55 +0200
>>> Tobias Jakobi wrote:
>>>
>
+evhandler->evctx.base.v
On 10/06/2015 11:24 AM, Archit Taneja wrote:
> Simplify the mipi dsi device creation process. device_initialize and
> device_add don't need to be called separately when creating
> mipi_dsi_device's. Use device_register instead to simplify things.
>
> Create a helper function mipi_dsi_device_new whi
Hello Hyungwon,
Hyungwon Hwang wrote:
> On Tue, 22 Sep 2015 17:54:58 +0200
> Tobias Jakobi wrote:
>
>> We already have g2d_copy() which implements G2D copy
>> operations from one buffer to another. However we can't
>> do a overlapping copy operation in one buffer.
>>
>> Add g2d_move() which act
Hello Hyungwon,
Hyungwon Hwang wrote:
> On Tue, 22 Sep 2015 17:54:57 +0200
> Tobias Jakobi wrote:
>
>> This allows setting the two direction registers, which specify how
>> the engine blits pixels. This can be used for overlapping blits,
>> which happen e.g. when 'moving' a rectangular region i
Hello Hyungwon,
Hyungwon Hwang wrote:
> On Tue, 22 Sep 2015 17:54:52 +0200
> Tobias Jakobi wrote:
>
>> Currently only fast solid color clear performance is measured.
>> A large buffer is allocated and solid color clear operations
>> are executed on it with randomly chosen properties (position
>
Hello Hyungwon,
Hyungwon Hwang wrote:
> On Tue, 22 Sep 2015 17:54:56 +0200
> Tobias Jakobi wrote:
>
>> This matches the G2D color mode that is used in the entire code.
>> The previous (incorrect) RGBA would only work since the
>> Exynos mixer did its configuration based on the bpp, and not
Hello Hyungwon,
first of all thanks for reviewing the series!
Hyungwon Hwang wrote:
> On Tue, 22 Sep 2015 17:54:55 +0200
> Tobias Jakobi wrote:
>
>> This tests async processing of G2D jobs. A separate thread is spawned
>> to monitor the DRM fd for events and check whether a G2D job was
>> com
On 10/30/2015 11:23 AM, Daniel Vetter wrote:
> On Fri, Oct 30, 2015 at 02:42:44AM -0700, Thomas Hellstrom wrote:
>> Reduce the time in hardware irq context and hardware irq latency.
>>
>> Signed-off-by: Thomas Hellstrom
>> Reviewed-by: Sinclair Yeh
>> ---
>> drivers/gpu/drm/vmwgfx/vmwgfx_fence.c
On Thu, Oct 29, 2015 at 04:23:45PM -0700, Rafael Antognolli wrote:
> This module is heavily based on i2c-dev. Once loaded, it provides one
> dev node per DP AUX channel, named drm_dp_auxN, where N is an integer.
>
> It's possible to know which connector owns this aux channel by looking
> at the re
It defines the prototype of ffs that fixes the building error
on Android 6.0 64-bit image.
Signed-off-by: Chih-Wei Huang
---
intel/intel_bufmgr_fake.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/intel/intel_bufmgr_fake.c b/intel/intel_bufmgr_fake.c
index 551e05d..7f4c7b9 100644
--- a/int
On Wed, Oct 28, 2015 at 3:28 AM, Yakir Yang wrote:
> Rockchip DP driver is a helper driver of analogix_dp coder driver,
> so most of the DT property should be descriped in analogix_dp document.
>
> Reviewed-by: Heiko Stuebner
> Signed-off-by: Yakir Yang
> ---
Looks mostly fine to me.
[...]
>
On Thu, Oct 29, 2015 at 11:33:48AM +, Emil Velikov wrote:
> Hi Dan,
>
> Suspecting that these were meant for the intel-gfx list, although I
> doubt people will object seeing them here :-)
>
> On 29 October 2015 at 10:35, Daniel Stone wrote:
> > Add tests for KMS atomic modesetting, to exerci
On Wed, Oct 28, 2015 at 3:31 AM, Yakir Yang wrote:
> Add dt binding documentation for rockchip display port PHY.
>
> Reviewed-by: Heiko Stuebner
> Signed-off-by: Yakir Yang
Acked-by: Rob Herring
> ---
> Changes in v8:
> - Remove the specific address in the example node name. (Heiko)
>
> Chang
On Fri, Oct 30, 2015 at 9:20 AM, Maxime Ripard
wrote:
> The display pipeline of the Allwinner A10 is involving several loosely
> coupled components.
>
> Add a documentation for the bindings.
>
> Signed-off-by: Maxime Ripard
> ---
> .../devicetree/bindings/drm/sunxi/sun4i-drm.txt| 122
>
On Thu, Oct 29, 2015 at 02:02:29PM +0100, Vincent Abriou wrote:
> DRM_STI_FBDEV is removed and replaced by the fbdev module param.
> By default, the fbdev compatibility is disabled.
>
> Signed-off-by: Vincent Abriou
> Signed-off-by: Nicolas VANHAELEWYN
Already replied somewhere else, but we hav
On Thu, Oct 29, 2015 at 02:27:32PM +0200, Ander Conselvan De Oliveira wrote:
> On Thu, 2015-10-29 at 11:03 +0200, Jani Nikula wrote:
> > Cc: Yetunde Adebisi
> > Signed-off-by: Jani Nikula
> > ---
> > include/drm/drm_dp_helper.h | 36
> > 1 file changed, 36 in
On Wed, Oct 28, 2015 at 06:13:49PM +0100, Philipp Zabel wrote:
> Hi Daniel,
>
> Am Montag, den 19.10.2015, 10:56 +0200 schrieb Daniel Vetter:
> > On Fri, Oct 16, 2015 at 10:12:04PM +0200, Philipp Zabel wrote:
> > > From: CK Hu
> > >
> > > This patch adds an initial DRM driver for the Mediatek MT
On Tue, Oct 27, 2015 at 01:40:56PM +0530, Archit Taneja wrote:
> Instead of using a custom legacy fbdev emulation config option, use the
> top level DRM_FBDEV_EMULATION config option.
>
> There are 3 drivers which use custom config options: imx, sti and tegra.
> Since the last revision, i915 and m
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