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On Tue, Sep 15, 2015 at 09:27:27AM -0700, Rafael Antognolli wrote:
> On Tue, Sep 15, 2015 at 10:46:43AM +0300, Ville Syrjälä wrote:
> > On Mon, Sep 14, 2015 at 04:12:30PM -0700, Rafael Antognolli wrote:
> > > This list will be used to get the aux channels registered through the
> > > helpers. Two
On Tue, Sep 15, 2015 at 07:41:06PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 15, 2015 at 09:34:15AM -0700, Rafael Antognolli wrote:
> > On Tue, Sep 15, 2015 at 10:35:19AM +0300, Ville Syrjälä wrote:
> > > On Mon, Sep 14, 2015 at 04:12:29PM -0700, Rafael Antognolli wrote:
> > > > This is a tenta
On Tue, Sep 15, 2015 at 09:34:15AM -0700, Rafael Antognolli wrote:
> On Tue, Sep 15, 2015 at 10:35:19AM +0300, Ville Syrjälä wrote:
> > On Mon, Sep 14, 2015 at 04:12:29PM -0700, Rafael Antognolli wrote:
> > > This is a tentative implementation of a module that allows reading/writing
> > > arbitra
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ition vbios
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ping ;)
Andrew, should I re-send this patch? It was acked by Daniel and Dave
doesn't object.
Dave, I'll appreciate it if you ack it explicitly.
On 08/27, Oleg Nesterov wrote:
>
> It is hardly possible to enumerate all problems with block_all_signals()
> and unblock_all_signals(). Just for examp
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mail because:
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or the bug.
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This patch adds drm dts node for HiKey board using hi6220 SOC.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 34 +++
1 file changed, 3
This patch adds ldi interrupt to handle vblank.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
drivers/gpu/drm/hisilicon/hisi_ade.c | 71 +++-
drivers/gpu/drm/hisilicon/hisi_drm_crtc
If you config DRM_HISI_FBDEV optional, this patch will only support fbdev
mode while also supporting double buffer.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
drivers/gpu/drm/hisilicon/Kconfig
This patch enables the adv7533 module which is connecting hisilicon SOC
by dsi module. while using DSI module and adv7533 module to implement the
encoder/connector interface of DRM\KMS.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Sig
This patch uses ADE module which is responsibe for graphic overlay, graphic
post-processing, display timing control within hi6220 SoC to implement the
plane\ctrc interface of DRM\KMS.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signe
This patch makes the link with DRM/KMS interface by initializing the drm
plane/crtc/encoder/connector and adding the drm plane/crtc/encoder/
connector helper.
This patch is compatible with different hisilicon platform such as Hikey
series of boards and other series of boards.
Signed-off-by: Xinli
This patch creates this driver itself and register all the sub-components
which is from DTS inode, this driver uses components framework mechanism
to bind all the sub-components.
This patch also introduces a memory manager for hisilison drm. As cma
framebuffer helpers can no more be used.
Signed-
This adds documentation of device tree bindings for the
Graphics Processing Unit of hi6220 SOC.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
Signed-off-by: Jiwen Qi
Signed-off-by: Yu Gong
---
.../devicetree/bindings/gpu/hisilicon,hi6220.txt | 69
These patch set adds a new drm driver for Hisilicon's Hi6220 SoC.
Current testing and support board is Hikey board which is one of Linaro
96boards. It is an arm64 open source board. For more information about
this board, please access https://www.96boards.org.
1. Hardware Detail
The display su
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This module is heavily based on i2c-dev. Once loaded, it provides one
dev node per DP AUX channel, named drm_aux-N.
It's possible to know which connector owns this aux channel by looking
at the respective sysfs /sys/class/drm_aux-dev/drm_aux-N/connector, if
the connector device pointer was correct
This is useful to determine which connector owns this AUX channel.
Signed-off-by: Rafael Antognolli
---
drivers/gpu/drm/i915/intel_dp.c | 1 +
include/drm/drm_dp_helper.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
i
This list will be used to get the aux channels registered through the
helpers. One function is provided to set a callback for added/removed
aux channels, and another function to iterate over the list of aux
channels.
Signed-off-by: Rafael Antognolli
---
drivers/gpu/drm/drm_dp_helper.c | 73 +
Second attempt at implementing a module that allows reading/writing arbitrary
dpcd registers. Changes to this version:
- lseek is used to select the register to read/write;
- read/write are used instead of ioctl;
- no blocking_notifier is used, just a direct callback.
One t
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Hi Rob, Mark,
We've been trying to figure out the right way to represent a class
of display encoder devices in DT.
These devices have registers that are generally configured via i2c. Once
the device is configured, it takes in video data from the mipi
dsi bus.
Until now, all the devices we've su
Hi Rob, Mark,
We've been trying to figure out the right way to represent a class
of display encoder devices in DT.
These devices have registers that are generally configured via i2c. Once
the device is configured, it takes in video data from the mipi
dsi bus.
Until now, all the devices we've su
Hardware - Other
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https://bugzilla.kernel.org/show_bug.cgi?id=103271
--- Comment #21 from Kevin McCormack ---
Comment on attachment 187611
--> https://bugzilla.kernel.org/attachment.cgi?id=187611
Patch that removes the 5dfc71bc44d91d1620505c064fa22b0b3db58a9d commit
Here is the link to the commit that seems to
https://bugzilla.kernel.org/show_bug.cgi?id=103271
--- Comment #20 from Kevin McCormack ---
Created attachment 187611
--> https://bugzilla.kernel.org/attachment.cgi?id=187611&action=edit
Patch that removes the 5dfc71bc44d91d1620505c064fa22b0b3db58a9d commit
I created this patch which is just t
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https://bugzilla.kernel.org/show_bug.cgi?id=103561
--- Comment #1 from Christoph Haag ---
Created attachment 187601
--> https://bugzilla.kernel.org/attachment.cgi?id=187601&action=edit
same with 4.1 lqx
Indeed. This one is from linux 4.1 with mainline mesa git and mainline llvm
247518.
--
Yo
https://bugzilla.kernel.org/show_bug.cgi?id=86351
Gerion changed:
What|Removed |Added
CC||gerion-kernel at flump.de
--- Comment #18 from G
On Monday 14 September 2015 04:31:43 Alex Deucher wrote:
> On Sun, Sep 13, 2015 at 2:57 PM, Ondrej Zary
> wrote:
> > Hello,
> > I have a PC Chips A31G board with AGPro slot and found that nouveau does
> > not work properly with it. Console works but reverts to software mode,
> > X11 hangs with mo
?id=103271
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--- Comment #19 from Kevin McCormack ---
OK, I wasn't satisfied with the last bisect, so I decided to bisect again
between 4.0 and 4.2 to see if I could get anymore info. I think I have
identified the culprit!!
5dfc71bc44d91d1620505c064fa22b0b3d
On 09/15/2015 04:37 AM, Xinwei Kong wrote:
> If you config DRM_HISI_FBDEV optional, this patch will only support fbdev
> mode while also supporting double buffer.
This is a lot of duplicated code from CMA fbdev. Is double buffering the
only reason why CMA fbdev can't be used or are there some othe
On Wed, Sep 02, 2015 at 12:08:08PM +0530, Sudip Mukherjee wrote:
> coverity.com reported that memset was using a buffer of size 0, on
> checking the code it turned out that the function was not being used. So
> remove it.
>
> Signed-off-by: Sudip Mukherjee
> ---
A gentle ping.
regards
sudip
On 09/15/2015 04:37 AM, Xinwei Kong wrote:
> This adds documentation of device tree bindings for the
> Graphics Processing Unit of hi6220 SOC.
>
> Signed-off-by: Xinliang Liu
> Signed-off-by: Xinwei Kong
> Signed-off-by: Andy Green
> Signed-off-by: Jiwen Qi
> Signed-off-by: Yu Gong
> ---
> .
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On Mon, Sep 14, 2015 at 04:12:30PM -0700, Rafael Antognolli wrote:
> This list will be used to get the aux channels registered through the
> helpers. Two functions are provided to register/unregister notifier
> listeners on the list, and another functiont to iterate over the list of
> aux channels.
On 09/15/2015 05:32 AM, Archit Taneja wrote:
> Hi Rob, Mark,
>
> We've been trying to figure out the right way to represent a class
> of display encoder devices in DT.
I've been meaning to reply on this.
> These devices have registers that are generally configured via i2c. Once
> the device is c
On Mon, Sep 14, 2015 at 04:12:29PM -0700, Rafael Antognolli wrote:
> This is a tentative implementation of a module that allows reading/writing
> arbitrary dpcd registers, following the suggestion from Daniel Vetter. It
> assumes the drm aux helpers were used by the driver.
>
> I tried to follow t
On Tue, Sep 15, 2015 at 07:46:55PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 15, 2015 at 07:41:06PM +0300, Ville Syrjälä wrote:
> > On Tue, Sep 15, 2015 at 09:34:15AM -0700, Rafael Antognolli wrote:
> > > On Tue, Sep 15, 2015 at 10:35:19AM +0300, Ville Syrjälä wrote:
> > > > On Mon, Sep 14, 2
On Tue, Sep 15, 2015 at 10:35:19AM +0300, Ville Syrjälä wrote:
> On Mon, Sep 14, 2015 at 04:12:29PM -0700, Rafael Antognolli wrote:
> > This is a tentative implementation of a module that allows reading/writing
> > arbitrary dpcd registers, following the suggestion from Daniel Vetter. It
> > assu
send them out
later today.
This patch:
Reviewed-by: Thierry Reding
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Op 02-09-15 om 10:42 schreef Maarten Lankhorst:
> atomic->disabled_planes is a hack that had to exist because
> prepare_fb was only called when a new fb was set. This messed
> up fb tracking in some circumstances like aborts from
> interruptible waits. As a result interruptible waiting in
> prepare
On Tue, Sep 15, 2015 at 10:46:43AM +0300, Ville Syrjälä wrote:
> On Mon, Sep 14, 2015 at 04:12:30PM -0700, Rafael Antognolli wrote:
> > This list will be used to get the aux channels registered through the
> > helpers. Two functions are provided to register/unregister notifier
> > listeners on th
Pixel Extension are extra pixels fed to the QSEED2 scalar; this
information is needed to produce an output image. These values
depend on various parameters, such as scalar type, initial phase,
phase step, etc.
Pixel extension values used to be handled and calculated by
hardware; however, software
This change adds the basic MDP5 support for MSM8996.
Signed-off-by: Stephane Viau
---
Documentation/devicetree/bindings/drm/msm/mdp.txt | 2 +
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 95 ++-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 9 ++-
drivers/gpu/
In order to produce an image, the scalar needs to be fed extra
pixels. These top/bottom/left/right values depend on a various of
factors, including resolution, scaling type, phase step and
initial phase.
Pixel Extension are programmed by hardware in most targets - and
can be overwritten by softwar
When calculating phase steps, let's use the same enum
mdp_component_type in order to ease the readability; 0/1 indexes
are a bit confusing and we now have explicit values to index
this type of arrays.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 25 +--
This change is the output of Envytools change:
"rnndb: Add Pixel Extension registers"
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 82 +++-
drivers/gpu/drm/msm/mdp/mdp_common.xml.h | 11 -
2 files changed, 90 insertions(+),
The HDMI controller is new in MDP5 v1.7. As of now, this change
doesn't reflect the novelty and only adds the basics so the probe
gets triggered.
Signed-off-by: Stephane Viau
---
Documentation/devicetree/bindings/drm/msm/hdmi.txt | 3 +++
drivers/gpu/drm/msm/hdmi/hdmi.c| 17
On most recent chipsets, clients need to vote for SMMU power
(regulator and clock) themselves for as long as they want the
SMMU to be on, performing translations.
This change enables (disables) the SMMU power just before
attaching (after detaching) MDP5 device to the SMMU.
Signed-off-by: Stephane
The current behavior is to try to get optional clocks and print a
dev_err message in case of failure. This looks rather confusing
and may increase with the amount of optional clocks.
We may need a cleaner way to handle per-device clocks but in the
meantime, let's reduce the amount of dev_err messa
msm_iommu_new() can fail and this change makes sure that we
detect the failure and free the allocated domain before going
any further.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 1 +
drivers/gpu/drm/msm/msm_gpu.c | 8
2 files changed, 9 insertio
On certain targets (eg, MSM8996) we need to set the following
domain attribute for correct operation of the SMMU:
DOMAIN_ATTR_COHERENT_HTW_DISABLE.
Setting that attribute is very important on 8996. Without it, we would
see crazy translation faults.
Note:
There could be support for coherent hardwa
We want to make sure we control all the information being passed
down to SMP block. Having access to the cfg pointer here may create
bad things in the future.
Signed-off-by: Stephane Viau
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 2 +-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c | 8
2
This series of patches adds support for MSM8996, including MDP5 v1.7.
Note that only the HDMI interface is supported for now.
Stephane Viau (10):
drm/msm/mdp5: remove the cfg pointer from SMP struct
drm/msm/mdp5: Disable hardware translation table walks (MSM8996)
drm/msm: Fix IOMMU clean up
Fix the following 'make htmldocs' warnings:
.//drivers/gpu/drm/i915/intel_audio.c:439: warning: No description found for
parameter 'intel_encoder'
.//drivers/gpu/drm/i915/intel_audio.c:439: warning: Excess function parameter
'encoder' description in 'intel_audio_codec_disable'
.//drivers/g
Fix the following 'make htmldocs' warnings:
.//drivers/gpu/drm/i915/i915_gem.c:1729: warning: No description found for
parameter 'vma'
.//drivers/gpu/drm/i915/i915_gem.c:1729: warning: No description found for
parameter 'vmf'
.//drivers/gpu/drm/i915/i915_gem.c:4962: warning: No descriptio
Fix the following 'make htmldocs' warnings:
.//drivers/gpu/drm/i915/i915_gem_gtt.c:758: warning: No description found for
parameter 'length'
.//drivers/gpu/drm/i915/i915_gem_gtt.c:818: warning: No description found for
parameter 'length'
.//drivers/gpu/drm/i915/i915_gem_gtt.c:818: warning:
Fix the following 'make htmldocs' warnings:
.//drivers/gpu/drm/i915/intel_lrc.c:780: warning: No description found for
parameter 'req'
.//drivers/gpu/drm/i915/intel_lrc.c:780: warning: Excess function parameter
'request' description in 'intel_logical_ring_begin'
.//drivers/gpu/drm/i915/int
g the rendering.
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Aaron Lu changed:
What|Removed |Added
CC||aaron.lu at intel.com
Component|Hibe
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--- Comment #18 from Kevin McCormack ---
Alright, I seem to have reached the end of the bisect and got this:
There are only 'skip'ped commits left to test.
The first bad commit could be any of:
2f1b6b7d9a815f341b18dfd26a363f37d4d3c96a
524630d5824
In the event that TTM doesn't find a compatible memory type for the
driver's first placement choice (placement without eviction), TTM
returns -EINVAL without trying the driver's second choice.
This causes problems on vmwgfx when VRAM is disabled before first modeset
and during VT switches when fbde
On the guest kernel side, previously the FIFO has been mapped write-
combined. This has worked since VMs up to now has not honored the mapping
type and mapped the FIFO cached anyway. Since the FIFO is accessed cached
by the CPU on the virtual device side, this leads to inconsistent
mappings once th
If user space calls unreference on a user_dmabuf it will typically
kill the struct ttm_base_object member which is responsible for the
user-space visibility. However the dmabuf part may still be alive and
refcounted. In some situations, like for shared guest-backed surface
referencing/opening, the
This should be harmless.
Vmware will, due to old infrastructure reasons, be using a privileged
control client to supply GUI layout information rather than obtaining
it from the device. That control client will be needing access to DRM
version information.
Signed-off-by: Thomas Hellstrom
Reviewed-
A minor IOCTL permission change for control clients. If there are no
objections I'd like to add this to the next vmwgfx -fixes pull request.
Thanks,
Thomas
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