https://bugzilla.kernel.org/show_bug.cgi?id=50091
--- Comment #15 from schaefer.frank at gmx.net 2012-11-16 20:27:45 ---
Sorry, it's 5787640db6ae722aeadb394d480c7ca21b603e34 (the commit before it).
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On Sun, Oct 21, 2012 at 09:10:24AM +0200, Henrik Rydberg wrote:
> On Thu, Oct 18, 2012 at 11:58:09AM +0200, Henrik Rydberg wrote:
> > Hi Ben,
> >
> > 3.7-rc1 messed up the screen on my MacBookAir3,1 (nv50, 0xaf) pretty
> > badly. Not surprisingly,
> >
> > commit 3863c9bc887e9638a9d905d55f6038641e
Hi,
On Fri, Nov 16, 2012 at 03:16:09PM +0100, Michel D?nzer wrote:
> On Fre, 2012-11-16 at 11:54 +0200, Aaro Koskinen wrote:
> > Check that the AGP aperture can be mapped. This follows a similar change
> > done for Radeon (commit 365048ff, drm/radeon: AGP memory is only I/O if
> > the aperture ca
https://bugzilla.kernel.org/show_bug.cgi?id=50091
--- Comment #14 from Marcin Slusarz 2012-11-16
19:43:46 ---
Can you confirm 70ee6f1cd6911098ddd4c11ee21b69dbe51fb3f9 really is the first
commit which fails to initialize?
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Reposting from this kernel bug:
https://bugzilla.kernel.org/show_bug.cgi?id=50241
I've tested the patch and it solves a highly repeatable OOPS with the
CedarView driver that I'm porting.
Reviewed-by: Thomas Hellstrom
Changelog v2:
fix a little bit performance issue to previous patch.
- When drm framebuffer is destroyed, make sure that overlay
data are updated to real hardwrae for all encoders
instead of waiting for vblank every page flip request.
For this, it adds a new function,
exynos_drm_encoder_comp
Changelog v3:
use drm_file's file object instead of gem object's
- gem object's file represents the shmem storage so
process-unique file object should be used instead.
Changelog v2:
call mutex_lock before drm_vm_open_locked is called.
Changelog v1:
This patch makes it takes a reference to gem o
On Fri, Nov 16, 2012 at 6:47 PM, Alex Deucher wrote:
> Hey, I don't see the drm HPD fixes. Are you planning to put them in
> another pull request? It would be nice to get them upstream for 3.8
Since they only refine the drm helpers in the core, I've figured
there's no need to merge them through
Hi Dave,
Highlights of this -next round:
- ivb fdi B/C fixes
- hsw sprite/plane offset fixes from Damien
- unified dp/hdmi encoder for hsw, finally external dp support on hsw
(Paulo)
- kill-agp and some other prep work in the gtt code from Ben
- some fb handling fixes from Ville
- massive pile o
Fixes a null pointer dereference when reclocking on my fermi.
Signed-off-by: Maarten Lankhorst
---
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
index 39e73b9..41b7a6a 100644
--- a/drivers/gpu/drm/nouveau/core/include/subd
Required to find all performance levels on my nvc0.
Signed-off-by: Maarten Lankhorst
---
diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c
b/drivers/gpu/drm/nouveau/nouveau_perf.c
index 4fe883c..624cbd1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_perf.c
+++ b/drivers/gpu/drm/nouveau/nouveau
From: Ville Syrj?l?
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/i915_trace.h | 18 ++
drivers/gpu/drm/i915/intel_atomic.c |2 ++
2 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_trace
From: Ville Syrj?l?
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/i915_trace.h | 19 +++
drivers/gpu/drm/i915/intel_atomic.c |4
2 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_tr
From: Ville Syrj?l?
---
drivers/gpu/drm/i915/intel_atomic.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index 170ac6f..c6531b0 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+
From: Ville Syrj?l?
Add a module parameter that allows one to easily change between blocking
and non-blocking GPU synchronization with atomic page flips.
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/drm_stub.c |5 ++
drivers/gpu/drm/i915/i915_trace.h | 49 ++
d
From: Ville Syrj?l?
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_trace.h | 15 +++
drivers/gpu/drm/i915/intel_atomic.c |9 -
3 files changed, 24 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i9
From: Ville Syrj?l?
A new trace point for tracking changes to gem object pin count.
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/i915_gem.c |6 ++
drivers/gpu/drm/i915/i915_trace.h | 19 +++
2 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/dr
From: Ville Syrj?l?
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/intel_atomic.c | 36 +++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index 0aa8c93..6bec72b
From: Ville Syrj?l?
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/intel_display.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 48eeed5..acd5aa0 100644
--- a/drivers/gpu/drm/i91
From: Ville Syrj?l?
The register values are computed when the flip ioctl is issued, and
they're used only after we've waited for the GPU to finish rendering.
The computed values are store in the intel_crtc and intel_plane structs,
so issuing another flip before the previous one has been fully com
From: Ville Syrj?l?
If the GPU hangs, release all pending atomic flips from the queue.
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/i915_irq.c |1 +
drivers/gpu/drm/i915/intel_atomic.c | 29 +
drivers/gpu/drm/i915/intel_drv.h|1 +
3 files
From: Ville Syrj?l?
After the atomic flip has been split up into individual flip requests
for each scanout engine, put each such request into a FIFO. Then for
each flip request add new request to the ring(s) in order to get an
interrupt once the GPU has finished whatever it was doing with the
new
From: Ville Syrj?l?
Collect the part which takes care of issuing the flips to a new
function. This makes the following patch nicer to look at.
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/intel_atomic.c | 37 --
1 files changed, 22 insertions(+), 15 d
From: Ville Syrj?l?
Atomic code might need i915_gem_check_olr().
Signed-off-by: Ville Syrj?l?
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_gem.c |2 +-
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/dr
Here's my second attempt at making atomic page flips synchronize with the
GPU in a non-blocking manner.
What the code does by default is grap the last_write_seqno from the object,
call intel_gem_check_olr() on it, perform the lazy coherency check, and
if the seqno still hasn't passed it'll enable
On Fri, Nov 16, 2012 at 12:05:40PM -0800, Aaron Plattner wrote:
> At the suggestion of a few drm developers, I'm looking at abstracting the
> buffer
> sharing mechanism away from the individual drm drivers and treating it as a
> low-level interface that kernel subsystems use to communicate, rather
On Fre, 2012-11-16 at 11:54 +0200, Aaro Koskinen wrote:
> Check that the AGP aperture can be mapped. This follows a similar change
> done for Radeon (commit 365048ff, drm/radeon: AGP memory is only I/O if
> the aperture can be mapped by the CPU.).
>
> The patch fixes the following error seen on G
On 11/16/2012 03:11 PM, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Fri, Nov 16, 2012 at 02:48:55PM +0800, Mark Zhang wrote:
>> On 11/16/2012 02:43 PM, Thierry Reding wrote:
Old Signed by an unknown key
>>>
>>> On Fri, Nov 16, 2012 at 12:58:09PM +0800, Mark Zhang wrote:
On 11/16/2012 02:43 PM, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Fri, Nov 16, 2012 at 12:58:09PM +0800, Mark Zhang wrote:
>> This patch is based on Thierry's drm patch for Tegra20:
>> - [PATCH v2 0/6] Device tree updates for host1x support
>> - [PATCH v3 0/2] NVIDIA Tegra DRM
I sent this to the lkml but i got no reply. maybe im missing something
obvious? my report lacks information? or this list is the apropiate
place to send ;)
-- Forwarded message --
From: Tomas M
Date: Thu, Nov 8, 2012 at 5:51 PM
Subject: [i915] linux-3.7-rc1 onwards, backlight w
On Friday 16 November 2012 11:36:36 Alex Courbot wrote:
> On Friday 16 November 2012 05:28:21 Thierry Reding wrote:
> > This third version of the patch series cleans up some minor issues that
> > were found in the previous versions, such as deferred probe not working
> > properly and the display re
This patch adds a exynos drm specific implementation of fb_mmap.
The root framebuffer is allocated using dma_alloc_attrs which can
allocate a contig or noncontig buffer depending on whether an iommu
is attached to drm device or not. The default fb_mmap function
always assumes the root fb to be cont
On Fri, Nov 16, 2012 at 12:05:40PM -0800, Aaron Plattner wrote:
> At the suggestion of a few drm developers, I'm looking at abstracting the
> buffer
> sharing mechanism away from the individual drm drivers and treating it as a
> low-level interface that kernel subsystems use to communicate, rather
Return -ENOMEM if dmm_txn_init cannot allocate a refill engine.
v2: Fix typing issue seen with newer compilers
Signed-off-by: Andy Gross
---
drivers/staging/omapdrm/omap_dmm_tiler.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.
This patch is based on Thierry's drm patch for Tegra20:
- [PATCH v2 0/6] Device tree updates for host1x support
- [PATCH v3 0/2] NVIDIA Tegra DRM driver
It adds the support for NVIDIA Tegra30.
Signed-off-by: Mark Zhang
---
drivers/gpu/drm/tegra/dc.c |1 +
drivers/gpu/drm/tegra/host1x.c
On Fri, Nov 16, 2012 at 12:17 PM, Daniel Vetter wrote:
> Hi Dave,
>
> Highlights of this -next round:
> - ivb fdi B/C fixes
> - hsw sprite/plane offset fixes from Damien
> - unified dp/hdmi encoder for hsw, finally external dp support on hsw
> (Paulo)
> - kill-agp and some other prep work in the
On Thu, Nov 15, 2012 at 12:06:09PM -0800, Ben Widawsky wrote:
> drivers/gpu/drm/i915/i915_drv.h:1545:2: warning: '__f' is static but
> declared in inline function 'i915_gem_chipset_flush' which is not static
>
> Reported-by: kbuild test robot
> dri-devel-Reference: <50a4d41c.586VhmwghPuKZbkB%
On Friday 16 November 2012 05:28:21 Thierry Reding wrote:
> This third version of the patch series cleans up some minor issues that
> were found in the previous versions, such as deferred probe not working
> properly and the display remaining enabled after the driver is removed.
>
> I've also put
https://bugzilla.kernel.org/show_bug.cgi?id=50091
--- Comment #15 from schaefer.fr...@gmx.net 2012-11-16 20:27:45 ---
Sorry, it's 5787640db6ae722aeadb394d480c7ca21b603e34 (the commit before it).
--
Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email
--- You are receiv
On Friday 16 November 2012 12:14 PM, Archit Taneja wrote:
> On Friday 16 November 2012 05:30 AM, Rob Clark wrote:
if (!obj)
>> @@ -565,14 +344,6 @@ static int dev_load(struct drm_device *dev,
>> unsigned long flags)
>>
>> dev->dev_private = priv;
>>
>> -ret = omapdss_compat_init();
On Friday 16 November 2012 05:30 AM, Rob Clark wrote:
> This patch changes the omapdrm KMS to bypass the omapdss "compat"
> layer and use the core omapdss API directly. This solves some layering
> issues that would cause unpin confusion vs GO bit status, because we
> would not know whether a parti
https://bugzilla.kernel.org/show_bug.cgi?id=50091
--- Comment #13 from schaefer.frank at gmx.net 2012-11-16 12:10:49 ---
Doesn't change anything. This is what happens with commit
70ee6f1cd6911098ddd4c11ee21b69dbe51fb3f9:
...
[3.619558] [drm] Initialized drm 1.1.0 20060810
[3.680948]
At the suggestion of a few drm developers, I'm looking at abstracting the buffer
sharing mechanism away from the individual drm drivers and treating it as a
low-level interface that kernel subsystems use to communicate, rather than as
something drivers should be accessing directly. This would also
At the suggestion of a few drm developers, I'm looking at abstracting the buffer
sharing mechanism away from the individual drm drivers and treating it as a
low-level interface that kernel subsystems use to communicate, rather than as
something drivers should be accessing directly. This would also
Thierry,
By the way, when do you plan to send drm patches for Tegra 3?
I'm wondering if you don't have a Tegra 3 board for testing, I can do
that for you.
Mark
On 11/16/2012 05:28 AM, Thierry Reding wrote:
> This third version of the patch series cleans up some minor issues that
> were found in t
Hi Thierry,
Thank you for your hard work.
The series,
Acked-by: Mark Zhang
Reviewed-by: Mark Zhang
Tested-by: Mark Zhang
On Ventana, LVDS and HDMI worked.
PS: Alex's power sequence patch is needed to enable panel and backlight.
Also we need to define dc and hdmi nodes in tegra20-ventana.
Check that the AGP aperture can be mapped. This follows a similar change
done for Radeon (commit 365048ff, drm/radeon: AGP memory is only I/O if
the aperture can be mapped by the CPU.).
The patch fixes the following error seen on G5 iMac:
nouveau E[ DRM] failed to create kernel channe
https://bugzilla.kernel.org/show_bug.cgi?id=50091
--- Comment #14 from Marcin Slusarz 2012-11-16
19:43:46 ---
Can you confirm 70ee6f1cd6911098ddd4c11ee21b69dbe51fb3f9 really is the first
commit which fails to initialize?
--
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On Sun, Oct 21, 2012 at 09:10:24AM +0200, Henrik Rydberg wrote:
> On Thu, Oct 18, 2012 at 11:58:09AM +0200, Henrik Rydberg wrote:
> > Hi Ben,
> >
> > 3.7-rc1 messed up the screen on my MacBookAir3,1 (nv50, 0xaf) pretty
> > badly. Not surprisingly,
> >
> > commit 3863c9bc887e9638a9d905d55f6038641e
Return -ENOMEM if dmm_txn_init cannot allocate a refill engine.
v2: Fix typing issue seen with newer compilers
Signed-off-by: Andy Gross
---
drivers/staging/omapdrm/omap_dmm_tiler.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/staging/omapdrm/omap_dmm_tiler.
software rendering for Planeshift?
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Hi Grant,
On Thu, Nov 15, 2012 at 06:03:59PM +, Grant Likely wrote:
> On Thu, 15 Nov 2012 17:00:57 +0100, Laurent Pinchart ideasonboard.com> wrote:
> > Hi Grant,
> >
> > On Thursday 15 November 2012 15:47:53 Grant Likely wrote:
> > > On Thu, 15 Nov 2012 10:23:52 +0100, Steffen Trumtrar wrote
On Fri, Nov 16, 2012 at 6:47 PM, Alex Deucher wrote:
> Hey, I don't see the drm HPD fixes. Are you planning to put them in
> another pull request? It would be nice to get them upstream for 3.8
Since they only refine the drm helpers in the core, I've figured
there's no need to merge them through
On Fri, Nov 16, 2012 at 12:17 PM, Daniel Vetter wrote:
> Hi Dave,
>
> Highlights of this -next round:
> - ivb fdi B/C fixes
> - hsw sprite/plane offset fixes from Damien
> - unified dp/hdmi encoder for hsw, finally external dp support on hsw
> (Paulo)
> - kill-agp and some other prep work in the
On 11/15/2012 09:58 PM, Mark Zhang wrote:
> This patch is based on Thierry's drm patch for Tegra20:
> - [PATCH v2 0/6] Device tree updates for host1x support
> - [PATCH v3 0/2] NVIDIA Tegra DRM driver
> diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> index 216cd0f..6e9f1b4 1
On 15.11.2012 23:28, Thierry Reding wrote:
> This third version of the patch series cleans up some minor issues that
> were found in the previous versions, such as deferred probe not working
> properly and the display remaining enabled after the driver is removed.
>
> I've also put the two patches
On Fri, Nov 16, 2012 at 07:19:01PM +0200, Jonathan Morton wrote:
> Reposting from this kernel bug:
> https://bugzilla.kernel.org/show_bug.cgi?id=50241
>
> I've tested the patch and it solves a highly repeatable OOPS with the
> CedarView driver that I'm porting.
>
> Reviewed-by: Thomas Hellstrom
On 11/15/2012 09:58 PM, Mark Zhang wrote:
> This patch is based on Thierry's drm patch for Tegra20:
> - [PATCH v2 0/6] Device tree updates for host1x support
> - [PATCH v3 0/2] NVIDIA Tegra DRM driver
>
> It adds the support for NVIDIA Tegra30.
Mark, I tried to apply this for testing locally, but
Hi Dave,
Highlights of this -next round:
- ivb fdi B/C fixes
- hsw sprite/plane offset fixes from Damien
- unified dp/hdmi encoder for hsw, finally external dp support on hsw
(Paulo)
- kill-agp and some other prep work in the gtt code from Ben
- some fb handling fixes from Ville
- massive pile o
Fixes a null pointer dereference when reclocking on my fermi.
Signed-off-by: Maarten Lankhorst
---
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
index 39e73b9..41b7a6a 100644
--- a/drivers/gpu/drm/nouveau/core/include/subd
Required to find all performance levels on my nvc0.
Signed-off-by: Maarten Lankhorst
---
diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c
b/drivers/gpu/drm/nouveau/nouveau_perf.c
index 4fe883c..624cbd1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_perf.c
+++ b/drivers/gpu/drm/nouveau/nouveau
On 11/15/2012 09:58 PM, Mark Zhang wrote:
> This patch is based on Thierry's drm patch for Tegra20:
> - [PATCH v2 0/6] Device tree updates for host1x support
> - [PATCH v3 0/2] NVIDIA Tegra DRM driver
> diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> index 216cd0f..6e9f1b4 1
On 11/15/2012 09:58 PM, Mark Zhang wrote:
> This patch is based on Thierry's drm patch for Tegra20:
> - [PATCH v2 0/6] Device tree updates for host1x support
> - [PATCH v3 0/2] NVIDIA Tegra DRM driver
>
> It adds the support for NVIDIA Tegra30.
Mark, I tried to apply this for testing locally, but
On Thursday 15 November 2012, Rob Clark wrote:
>
> From: Rob Clark
>
> A new atomic modeset/pageflip ioctl being developed in DRM requires
> get_user() to work for 64bit types (in addition to just put_user()).
>
> v1: original
> v2: pass correct size to check_uaccess, and better handling of nar
ches into the branch that David will pull from.
Thierry
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2012/11/15 Prathyush K
> This patch adds a exynos drm specific implementation of fb_mmap.
> The root framebuffer is allocated using dma_alloc_attrs which can
> allocate a contig or noncontig buffer depending on whether an iommu
> is attached to drm device or not. The default fb_mmap function
> al
On Fri, Nov 16, 2012 at 12:44 AM, Archit Taneja wrote:
> On Friday 16 November 2012 05:30 AM, Rob Clark wrote:
>>
>> +static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
>> + const struct dss_lcd_mgr_config *config)
>> +{
>> + struct omap_crtc *omap_crtc = co
drm_fb_mmap,
> .fb_fillrect= cfb_fillrect,
> .fb_copyarea= cfb_copyarea,
> .fb_imageblit = cfb_imageblit,
> --
> 1.7.0.4
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>
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nd arch/arm/mach-tegra (v2)
patches I sent a few hours ago?
Thierry
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From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_trace.h | 18 ++
drivers/gpu/drm/i915/intel_atomic.c |2 ++
2 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_trace
From: Ville Syrjälä
Add a module parameter that allows one to easily change between blocking
and non-blocking GPU synchronization with atomic page flips.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_stub.c |5 ++
drivers/gpu/drm/i915/i915_trace.h | 49 ++
d
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_trace.h | 19 +++
drivers/gpu/drm/i915/intel_atomic.c |4
2 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_tr
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 48eeed5..acd5aa0 100644
--- a/drivers/gpu/drm/i91
From: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index 170ac6f..c6531b0 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_trace.h | 15 +++
drivers/gpu/drm/i915/intel_atomic.c |9 -
3 files changed, 24 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i9
From: Ville Syrjälä
A new trace point for tracking changes to gem object pin count.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_gem.c |6 ++
drivers/gpu/drm/i915/i915_trace.h | 19 +++
2 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/dr
From: Ville Syrjälä
Collect the part which takes care of issuing the flips to a new
function. This makes the following patch nicer to look at.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 37 --
1 files changed, 22 insertions(+), 15 d
Here's my second attempt at making atomic page flips synchronize with the
GPU in a non-blocking manner.
What the code does by default is grap the last_write_seqno from the object,
call intel_gem_check_olr() on it, perform the lazy coherency check, and
if the seqno still hasn't passed it'll enable
From: Ville Syrjälä
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic.c | 36 +++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index 0aa8c93..6bec72b
From: Ville Syrjälä
The register values are computed when the flip ioctl is issued, and
they're used only after we've waited for the GPU to finish rendering.
The computed values are store in the intel_crtc and intel_plane structs,
so issuing another flip before the previous one has been fully com
From: Ville Syrjälä
After the atomic flip has been split up into individual flip requests
for each scanout engine, put each such request into a FIFO. Then for
each flip request add new request to the ring(s) in order to get an
interrupt once the GPU has finished whatever it was doing with the
new
From: Ville Syrjälä
If the GPU hangs, release all pending atomic flips from the queue.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_irq.c |1 +
drivers/gpu/drm/i915/intel_atomic.c | 29 +
drivers/gpu/drm/i915/intel_drv.h|1 +
3 files
From: Ville Syrjälä
Atomic code might need i915_gem_check_olr().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h |1 +
drivers/gpu/drm/i915/i915_gem.c |2 +-
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/dr
On Fre, 2012-11-16 at 11:54 +0200, Aaro Koskinen wrote:
> Check that the AGP aperture can be mapped. This follows a similar change
> done for Radeon (commit 365048ff, drm/radeon: AGP memory is only I/O if
> the aperture can be mapped by the CPU.).
>
> The patch fixes the following error seen on G
On Fri, Nov 16, 2012 at 12:44 AM, Archit Taneja wrote:
> On Friday 16 November 2012 05:30 AM, Rob Clark wrote:
>>
>> +static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
>> + const struct dss_lcd_mgr_config *config)
>> +{
>> + struct omap_crtc *omap_crtc = co
Hi Linus,
all pretty normal, one TTM oops fix, one radeon, a few intel and a vmwgfx
fix.
Dave.
The following changes since commit 77b67063bb6bce6d475e910d3b886a606d0d91f7:
Linux 3.7-rc5 (2012-11-11 13:44:33 +0100)
are available in the git repository at:
git://people.freedesktop.org/~air
Check that the AGP aperture can be mapped. This follows a similar change
done for Radeon (commit 365048ff, drm/radeon: AGP memory is only I/O if
the aperture can be mapped by the CPU.).
The patch fixes the following error seen on G5 iMac:
nouveau E[ DRM] failed to create kernel channe
On Thu, Nov 15, 2012 at 06:00:58PM -0600, Rob Clark wrote:
> This patch changes the omapdrm KMS to bypass the omapdss "compat"
> layer and use the core omapdss API directly. This solves some layering
> issues that would cause unpin confusion vs GO bit status, because we
> would not know whether a
On Thu, Nov 15, 2012 at 06:00:58PM -0600, Rob Clark wrote:
> This patch changes the omapdrm KMS to bypass the omapdss "compat"
> layer and use the core omapdss API directly. This solves some layering
> issues that would cause unpin confusion vs GO bit status, because we
> would not know whether a
https://bugzilla.kernel.org/show_bug.cgi?id=50091
--- Comment #13 from schaefer.fr...@gmx.net 2012-11-16 12:10:49 ---
Doesn't change anything. This is what happens with commit
70ee6f1cd6911098ddd4c11ee21b69dbe51fb3f9:
...
[3.619558] [drm] Initialized drm 1.1.0 20060810
[3.680948] nou
0x001c in ?? ()
#29 0x0001 in ?? ()
#30 0x7fffe7e3 in ?? ()
#31 0x in ?? ()
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On Thu, Nov 15, 2012 at 12:06:09PM -0800, Ben Widawsky wrote:
> drivers/gpu/drm/i915/i915_drv.h:1545:2: warning: '__f' is static but
> declared in inline function 'i915_gem_chipset_flush' which is not static
>
> Reported-by: kbuild test robot
> dri-devel-Reference: <50a4d41c.586vhmwghpukzbkb%
Changelog v2:
fix a little bit performance issue to previous patch.
- When drm framebuffer is destroyed, make sure that overlay
data are updated to real hardwrae for all encoders
instead of waiting for vblank every page flip request.
For this, it adds a new function,
exynos_drm_encoder_comp
https://bugs.freedesktop.org/show_bug.cgi?id=57173
Michel Dänzer changed:
What|Removed |Added
Assignee|dri-devel@lists.freedesktop |mesa-dev@lists.freedesktop.
Changelog v3:
use drm_file's file object instead of gem object's
- gem object's file represents the shmem storage so
process-unique file object should be used instead.
Changelog v2:
call mutex_lock before drm_vm_open_locked is called.
Changelog v1:
This patch makes it takes a reference to gem o
Hi Grant,
On Thu, Nov 15, 2012 at 06:03:59PM +, Grant Likely wrote:
> On Thu, 15 Nov 2012 17:00:57 +0100, Laurent Pinchart
> wrote:
> > Hi Grant,
> >
> > On Thursday 15 November 2012 15:47:53 Grant Likely wrote:
> > > On Thu, 15 Nov 2012 10:23:52 +0100, Steffen Trumtrar wrote:
> > > > Add d
On 15.11.2012 23:28, Thierry Reding wrote:
> This third version of the patch series cleans up some minor issues that
> were found in the previous versions, such as deferred probe not working
> properly and the display remaining enabled after the driver is removed.
>
> I've also put the two patches
This patch adds a exynos drm specific implementation of fb_mmap.
The root framebuffer is allocated using dma_alloc_attrs which can
allocate a contig or noncontig buffer depending on whether an iommu
is attached to drm device or not. The default fb_mmap function
always assumes the root fb to be cont
On Friday 16 November 2012 11:36:36 Alex Courbot wrote:
> On Friday 16 November 2012 05:28:21 Thierry Reding wrote:
> > This third version of the patch series cleans up some minor issues that
> > were found in the previous versions, such as deferred probe not working
> > properly and the display re
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