[PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

Hi Ville, I skipped explanation about NV12M and other two formats because these formats are already in kernel drm_fourcc.h. I think it is better to add a difference between NV12 and NV12M here. NV12M has Y plane and CbCr plane and these are in non contiguous memory region. Compared with NV12, NV

[PATCH 8/8 v7] drm/i915/intel_i2c: use DRM_ERROR on timeouts

GMBUS should hopefully actually work now in most cases. So, report any timeout conditions using DRM_ERROR(), especially for the case where the timeout causes fallback to bit-bang mode.

[PATCH 7/8 v7] drm/i915/intel_i2c: remove POSTING_READ() from gmbus transfers

The POSTING_READ() calls were originally added to make sure the writes were flushed before any timing delays and across loops. Now that the code has settled a bit, let's remove them. Signed-off-by: Daniel Kurtz --- drivers/gpu/drm/i915/intel_i2c.c |3 --- 1 files changed, 0 insertions(+), 3

[PATCH 6/8 v7] drm/i915/intel_i2c: reuse GMBUS2 value read in polling loop

Save the GMBUS2 value read while polling for state changes, and then reuse this value when determining for which reason the loops were exited. This is a small optimization which saves a couple of bus accesses for memory mapped IO registers. To avoid "assigning in if clause" checkpatch errors", use

[PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

It is very common for an i2c device to require a small 1 or 2 byte write followed by a read. For example, when reading from an i2c EEPROM it is common to write and address, offset or index followed by a reading some values. The i915 gmbus controller provides a special "INDEX" cycle for performing

[PATCH 4/8 v7] drm/i915/intel_i2c: use WAIT cycle, not STOP

The i915 is only able to generate a STOP cycle (i.e. finalize an i2c transaction) during a DATA or WAIT phase. In other words, the controller rejects a STOP requested as part of the first transaction in a sequence. Thus, for the first transaction we must always use a WAIT cycle, detect when the d

[PATCH 3/8 v7] drm/i915/intel_i2c: always wait for IDLE before clearing NAK

The GMBUS controller can report a NAK condition while a transaction is still active. If the driver is fast enough, and the bus is slow enough, the driver may clear the NAK condition while the controller is still busy, resulting in a confused GMBUS controller. This will leave the controller in a ba

[PATCH 2/8 v7] drm/i915/intel_i2c: use double-buffered writes

The GMBUS controller GMBUS3 register is double-buffered. Take advantage of this by writing two 4-byte words before the first wait for HW_RDY. This helps keep the GMBUS controller from becoming idle during long writes. In fact, during experiments using the GMBUS interrupts, the HW_RDY interrupt w

[PATCH 1/8 v7] drm/i915/intel_i2c: handle zero-length writes

A common method of probing an i2c bus is trying to do a zero-length write. Handle this case by checking the length first before decrementing it. This is actually important, since attempting a zero-length write is one of the ways that i2cdetect and i2c_new_probed_device detect whether there is devi

[PATCH 0/8 v7] fix gmbus writes and related issues

This patchset addresses a couple of issues with the i915 gmbus implementation. v7 adds a final patch to switch to using DRM_ERROR for reporting timeouts. Daniel Kurtz (8): drm/i915/intel_i2c: handle zero-length writes drm/i915/intel_i2c: use double-buffered writes drm/i915/intel_i2c: always

[PATCH RFC] drm: support for rotated scanout

From: Rob Clark For drivers that can support rotated scanout, the extra parameter checking in drm-core, while nice, tends to get confused. To solve this drivers can set the crtc or plane invert_dimensions field so that the dimension checking takes into account the rotation that the driver is per

[PATCH 0/8 v7] fix gmbus writes and related issues

On Fri, Mar 30, 2012 at 01:49:17PM +0100, Chris Wilson wrote: > On Fri, 30 Mar 2012 19:46:35 +0800, Daniel Kurtz > wrote: > > This patchset addresses a couple of issues with the i915 gmbus > > implementation. > > > > v7 adds a final patch to switch to using DRM_ERROR for reporting timeouts. > >

[Bug 47955] Celestia hit fallback on r300g from git?

https://bugs.freedesktop.org/show_bug.cgi?id=47955 --- Comment #17 from Andrew Randrianasulu 2012-03-30 09:38:25 PDT --- (In reply to comment #16) > Is this bug present in Mesa 8.0 and if yes, is it present in 7.11 as well? yes, at minimum in 8.0 and 7.11 git _branches_. With 7.11 it was a bit

[PATCH 4/8] drm: add generic ioctls to get/set properties on any object

On Thu, Mar 29, 2012 at 06:27:22PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > Useless for connector properties (since they already have their own > ioctls), but useful when we add properties to CRTCs, planes and other > objects. > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/

[PATCH RFC] drm: support for rotated scanout

From: Rob Clark For drivers that can support rotated scanout, the extra parameter checking in drm-core, while nice, tends to get confused. To solve this drivers can set the crtc or plane invert_dimensions field so that the dimension checking takes into account the rotation that the driver is per

[PATCH 3/8] drm: create struct drm_object_properties and use it

On Thu, Mar 29, 2012 at 06:27:21PM -0300, Paulo Zanoni wrote: > diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h > index c3d429a..84880a7 100644 > --- a/include/drm/drm_crtc.h > +++ b/include/drm/drm_crtc.h > @@ -36,6 +36,8 @@ > struct drm_device; > struct drm_mode_set; > struct drm_

[PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

On Fri, Mar 30, 2012 at 08:07:16PM +0900, ??? wrote: > Hi Ville, > > I skipped explanation about NV12M and other two formats because these > formats are already in kernel drm_fourcc.h. > > I think it is better to add a difference between NV12 and NV12M here. > > NV12M has Y plane and CbCr plane

[PATCH] drm: add valid pixel formats for fb

This patch adds multi buffer plane pixel formats into valid pixel format list for fb since they are missed from the list. Signed-off-by: Seung-Woo Kim Signed-off-by: Inki Dae Signed-off-by: Kyungmin Park --- drivers/gpu/drm/drm_crtc.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-

[git pull] drm dma-buf prime support

Hi Linus, This isn't a majorly urgent thing to have, but we'd like to set the stage for working on dma-buf support in the drm drivers for the next merge window, so I'd like to push in the initial submission now so people have something that we can build on top of. The code just introduces the u

[PATCH RFC xf86-video-intel 2/2] Add underscan properties

On Thu, Mar 29, 2012 at 11:19:59PM +0100, Chris Wilson wrote: > On Thu, 29 Mar 2012 18:30:20 -0300, Paulo Zanoni > wrote: > > From: Paulo Zanoni > > > > In the Kernel side, these are crtc properties (since in the hardware, > > underscan use the panel fitters, which are attached to the pipes). >

[PATCH RFC 1/2] drm: add bitmask property type

2012/3/30 Paulo Zanoni : > Can't we try to add some document > (or header file) defining the standard properties and add a way to > distinguish between? Documentation/drm/properties.txt? > After looking at the list names, maybe we should define that standard properties should be named with "BIG LE

i915_driver_irq_handler: irq 42: nobody cared

On 03/30/2012 12:45 PM, Chris Wilson wrote: > On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby wrote: >> I don't know what to dump more, because iir is obviously zero too. What >> other sources of interrupts are on the (G33) chip? > > IIR is the master interrupt, with chained secondary interrupt st

[PATCH RFC 1/2] drm: add bitmask property type

2012/3/30 Ville Syrj?l? : > > I would suggest we either A) define some namespace for standard > properties, or B) introduce some new property mechanism that actually > uses integer property IDs. In either case new properties or changes to > existing standard properties should be carefully reviewed.

[git pull] drm intel hibernation fix

On Thu, Mar 29, 2012 at 16:43, richard -rw- weinberger wrote: > On Thu, Mar 29, 2012 at 9:34 AM, Keith Packard wrote: >> <#part sign=pgpmime> >> On Thu, 29 Mar 2012 08:14:08 +0100 (IST), Dave Airlie >> wrote: >> >>> Dave Airlie (1): >>> ? ? ? drm/i915: suspend fbdev device around suspend/hibern

[PATCH 0/8 v7] fix gmbus writes and related issues

On Fri, 30 Mar 2012 19:46:35 +0800, Daniel Kurtz wrote: > This patchset addresses a couple of issues with the i915 gmbus > implementation. > > v7 adds a final patch to switch to using DRM_ERROR for reporting timeouts. > > Daniel Kurtz (8): > drm/i915/intel_i2c: handle zero-length writes > d

[PATCH RFC 1/2] drm: add bitmask property type

On Thu, Mar 29, 2012 at 08:15:48PM -0500, Rob Clark wrote: > On Thu, Mar 29, 2012 at 8:02 PM, Rob Clark wrote: > > From: Rob Clark > > > > A bitmask property is similar to an enum. ?The enum value is a bit > > position (0-63), and valid property values consist of a mask of > > zero or more of (1

i915_driver_irq_handler: irq 42: nobody cared

On Fri, 30 Mar 2012 14:11:47 +0200, Jiri Slaby wrote: > On 03/30/2012 12:45 PM, Chris Wilson wrote: > > On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby wrote: > >> I don't know what to dump more, because iir is obviously zero too. What > >> other sources of interrupts are on the (G33) chip? > > >

No subject

when the corresponding pins are not actually hooked up to anything. In these cases, there is no NAK, nor timeout, nor any other indication from the GMBUS controller that a transaction fails. The first gmbus transaction timeout is caught by the "wait_for" timeout, causing the transition to bit-ban

[PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

On Fri, Mar 30, 2012 at 11:54:50AM +0900, Seung-Woo Kim wrote: > Multi buffer plane pixel formats are added as like kernel header. > > Signed-off-by: Seung-Woo Kim > --- > include/drm/drm_fourcc.h |7 +++ > 1 files changed, 7 insertions(+), 0 deletions(-) > > diff --git a/include/drm/dr

[PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

On 03/30/2012 12:12 PM, Ville Syrj?l? wrote: >> +#define DRM_FORMAT_NV12MT fourcc_code('T', 'M', '1', '2') /* 2x2 >> subsampled Cr:Cb plane 64x32 macroblocks */ > This one is more difficult. Until now tiling was always handled in > driver specific manner. OTOH if this format is really supported

[PATCH RFC 1/2] drm: add bitmask property type

On 03/30/2012 12:37 PM, Ville Syrj?l? wrote: > On Thu, Mar 29, 2012 at 08:15:48PM -0500, Rob Clark wrote: >> On Thu, Mar 29, 2012 at 8:02 PM, Rob Clark wrote: >>> From: Rob Clark >>> >>> A bitmask property is similar to an enum. The enum value is a bit >>> position (0-63), and valid property valu

[Bug 47955] Celestia hit fallback on r300g from git?

https://bugs.freedesktop.org/show_bug.cgi?id=47955 --- Comment #16 from Marek Ol??k 2012-03-30 05:41:30 PDT --- Is this bug present in Mesa 8.0 and if yes, is it present in 7.11 as well? -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this m

i915_driver_irq_handler: irq 42: nobody cared

On 03/27/2012 10:42 AM, Jiri Slaby wrote: > On 03/27/2012 10:40 AM, Jiri Slaby wrote: >> Hi, >> >> I'm getting spurious interrupts leading to disabling the interrupt: >> 42:19168532471662 PCI-MSI-edge i915 at pci::00:02.0 >> >> The message: >> irq 42: nobody cared (try booting w

[PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

Multi buffer plane pixel formats are added as like kernel header. Signed-off-by: Seung-Woo Kim --- include/drm/drm_fourcc.h |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h index 85facb0..7cfd95a 100644 --- a/inclu

i915_driver_irq_handler: irq 42: nobody cared

On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby wrote: > I don't know what to dump more, because iir is obviously zero too. What > other sources of interrupts are on the (G33) chip? IIR is the master interrupt, with chained secondary interrupt statuses. If IIR is 0, the interrupt wasn't raised by

[PATCH] drm/radeon/kms: add register definitions for audio

W dniu 30 marca 2012 11:09 u?ytkownik Rafa? Mi?ecki napisa?: > 2012/3/28 ?: >> From: Alex Deucher >> >> This adds register definitions for HDMI/DP audio on >> DCE2/3/4/5 hardware. > > OK, AICS we got PLL regs and HDMI blocks regs. May I ask about audio block > regs? > > Did you just missed them

[PATCH] drm/radeon/kms: add register definitions for audio

2012/3/28 : > From: Alex Deucher > > This adds register definitions for HDMI/DP audio on > DCE2/3/4/5 hardware. OK, AICS we got PLL regs and HDMI blocks regs. May I ask about audio block regs? Did you just missed them or do they need passing some additional review first? I mean: #define EVERGR

regression(?) 3.3-rc4 -> 3.3-rc5: drm intel hangs

Hi everyone, is there anything else I can provide? On Fr, 09 M?r 2012, Norbert Preining wrote: > Hi everyone, > > currently 3.3.0-rc6+ I just was hit by that after wake up from ram: > > On Di, 28 Feb 2012, Daniel Vetter wrote: > > > Feb 28 11:42:47 mithrandir kernel: [15627.756071] > > > [drm:

Re: [PATCH RFC 1/2] drm: add bitmask property type

2012/3/30 Paulo Zanoni : > Can't we try to add some document > (or header file) defining the standard properties and add a way to > distinguish between? Documentation/drm/properties.txt? > After looking at the list names, maybe we should define that standard properties should be named with "BIG LE

Re: [PATCH RFC 1/2] drm: add bitmask property type

2012/3/30 Ville Syrjälä : > > I would suggest we either A) define some namespace for standard > properties, or B) introduce some new property mechanism that actually > uses integer property IDs. In either case new properties or changes to > existing standard properties should be carefully reviewed.

Re: [git pull] drm intel hibernation fix

On Thu, Mar 29, 2012 at 16:43, richard -rw- weinberger wrote: > On Thu, Mar 29, 2012 at 9:34 AM, Keith Packard wrote: >> <#part sign=pgpmime> >> On Thu, 29 Mar 2012 08:14:08 +0100 (IST), Dave Airlie >> wrote: >> >>> Dave Airlie (1): >>>       drm/i915: suspend fbdev device around suspend/hibern

[PATCH RFC 1/2] drm: add bitmask property type

On Thu, 29 Mar 2012 20:02:45 -0500, Rob Clark wrote: > + } else if (property->flags & DRM_MODE_PROP_BITMASK) { > + int i; > + __u64 valid_mask = 0; > + for (i = 0; i < property->num_values; i++) > + valid_mask |= (1 << property->values[i]

[Bug 47955] Celestia hit fallback on r300g from git?

https://bugs.freedesktop.org/show_bug.cgi?id=47955 --- Comment #17 from Andrew Randrianasulu 2012-03-30 09:38:25 PDT --- (In reply to comment #16) > Is this bug present in Mesa 8.0 and if yes, is it present in 7.11 as well? yes, at minimum in 8.0 and 7.11 git _branches_. With 7.11 it was a bit

[PATCH] drm/radeon: Don't dereference possibly-NULL pointer.

2012/3/29 Michel D?nzer : > From: Michel D?nzer > > Reported-by: Dan Carpenter > Signed-off-by: Michel D?nzer Reviewed-by: Alex Deucher > --- > > Third time's the charm, I hope... > > ?drivers/gpu/drm/radeon/radeon_object.c | ? ?3 ++- > ?1 files changed, 2 insertions(+), 1 deletions(-) > > di

[Bug 42876] System doesn't boot with GTX 550 Ti

https://bugzilla.kernel.org/show_bug.cgi?id=42876 --- Comment #10 from Vlad 2012-03-30 09:10:08 --- Forgot to mention that I'm using nouveau. -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the

[Bug 42876] System doesn't boot with GTX 550 Ti

https://bugzilla.kernel.org/show_bug.cgi?id=42876 Vlad changed: What|Removed |Added CC||vovan at vovan.nl --- Comment #9 from Vlad 2

[PATCH] drm/radeon/kms: add register definitions for audio

For those that are interested, I pulled together most of my original hdmi code if someone wants to finish it up: http://people.freedesktop.org/~agd5f/0001-WIP-port-of-hdmi-dp-audio-code-to-newer-kernel.patch It needs: - helper functions for calculating the infoframes and checksums - helper function

[PATCH] drm/radeon/kms: fix up audio interrupt handling

From: Alex Deucher - add support for rs6xx - add support for DCE4/5 - fixup 6xx/7xx Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/evergreen.c | 128 +++ drivers/gpu/drm/radeon/r600.c | 115 ++-- drivers/gpu/drm/radeo

[PATCH] drm/radeon/kms: fix fans after resume

2012/3/30 Michel D?nzer : > On Don, 2012-03-29 at 19:04 -0400, alexdeucher at gmail.com wrote: >> From: Alex Deucher >> >> On pre-R600 asics, the SpeedFanControl table is not >> executed as part of ASIC_Init as it is on newer asics. >> >> Fixes: >> https://bugzilla.kernel.org/show_bug.cgi?id=29412

Re: [PATCH 0/8 v7] fix gmbus writes and related issues

On Fri, Mar 30, 2012 at 01:49:17PM +0100, Chris Wilson wrote: > On Fri, 30 Mar 2012 19:46:35 +0800, Daniel Kurtz wrote: > > This patchset addresses a couple of issues with the i915 gmbus > > implementation. > > > > v7 adds a final patch to switch to using DRM_ERROR for reporting timeouts. > > >

[PATCH] drm/radeon/kms: fix fans after resume

On Don, 2012-03-29 at 19:04 -0400, alexdeucher at gmail.com wrote: > From: Alex Deucher > > On pre-R600 asics, the SpeedFanControl table is not > executed as part of ASIC_Init as it is on newer asics. > > Fixes: > https://bugzilla.kernel.org/show_bug.cgi?id=29412 > > Signed-off-by: Alex Deuche

[PATCH RFC 1/2] drm: add bitmask property type

On Fri, Mar 30, 2012 at 5:37 AM, Ville Syrj?l? wrote: > On Thu, Mar 29, 2012 at 08:15:48PM -0500, Rob Clark wrote: >> On Thu, Mar 29, 2012 at 8:02 PM, Rob Clark wrote: >> > From: Rob Clark >> > >> > A bitmask property is similar to an enum. ?The enum value is a bit >> > position (0-63), and vali

[git pull] drm dma-buf prime support

Hi Linus, This isn't a majorly urgent thing to have, but we'd like to set the stage for working on dma-buf support in the drm drivers for the next merge window, so I'd like to push in the initial submission now so people have something that we can build on top of. The code just introduces the u

[PATCH 2/8 v7] drm/i915/intel_i2c: use double-buffered writes

The GMBUS controller GMBUS3 register is double-buffered. Take advantage of this by writing two 4-byte words before the first wait for HW_RDY. This helps keep the GMBUS controller from becoming idle during long writes. In fact, during experiments using the GMBUS interrupts, the HW_RDY interrupt w

[PATCH 8/8 v7] drm/i915/intel_i2c: use DRM_ERROR on timeouts

GMBUS should hopefully actually work now in most cases. So, report any timeout conditions using DRM_ERROR(), especially for the case where the timeout causes fallback to bit-bang mode. >From observations, the GMBUS transfers timeout and switch to Bit-Banging when the corresponding pins are not act

[PATCH 7/8 v7] drm/i915/intel_i2c: remove POSTING_READ() from gmbus transfers

The POSTING_READ() calls were originally added to make sure the writes were flushed before any timing delays and across loops. Now that the code has settled a bit, let's remove them. Signed-off-by: Daniel Kurtz --- drivers/gpu/drm/i915/intel_i2c.c |3 --- 1 files changed, 0 insertions(+), 3

[PATCH 6/8 v7] drm/i915/intel_i2c: reuse GMBUS2 value read in polling loop

Save the GMBUS2 value read while polling for state changes, and then reuse this value when determining for which reason the loops were exited. This is a small optimization which saves a couple of bus accesses for memory mapped IO registers. To avoid "assigning in if clause" checkpatch errors", use

[PATCH 5/8 v7] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

It is very common for an i2c device to require a small 1 or 2 byte write followed by a read. For example, when reading from an i2c EEPROM it is common to write and address, offset or index followed by a reading some values. The i915 gmbus controller provides a special "INDEX" cycle for performing

[PATCH 4/8 v7] drm/i915/intel_i2c: use WAIT cycle, not STOP

The i915 is only able to generate a STOP cycle (i.e. finalize an i2c transaction) during a DATA or WAIT phase. In other words, the controller rejects a STOP requested as part of the first transaction in a sequence. Thus, for the first transaction we must always use a WAIT cycle, detect when the d

[PATCH 3/8 v7] drm/i915/intel_i2c: always wait for IDLE before clearing NAK

The GMBUS controller can report a NAK condition while a transaction is still active. If the driver is fast enough, and the bus is slow enough, the driver may clear the NAK condition while the controller is still busy, resulting in a confused GMBUS controller. This will leave the controller in a ba

[PATCH 1/8 v7] drm/i915/intel_i2c: handle zero-length writes

A common method of probing an i2c bus is trying to do a zero-length write. Handle this case by checking the length first before decrementing it. This is actually important, since attempting a zero-length write is one of the ways that i2cdetect and i2c_new_probed_device detect whether there is devi

[PATCH 0/8 v7] fix gmbus writes and related issues

This patchset addresses a couple of issues with the i915 gmbus implementation. v7 adds a final patch to switch to using DRM_ERROR for reporting timeouts. Daniel Kurtz (8): drm/i915/intel_i2c: handle zero-length writes drm/i915/intel_i2c: use double-buffered writes drm/i915/intel_i2c: always

Re: [PATCH] drm/radeon: Don't dereference possibly-NULL pointer.

2012/3/29 Michel Dänzer : > From: Michel Dänzer > > Reported-by: Dan Carpenter > Signed-off-by: Michel Dänzer Reviewed-by: Alex Deucher > --- > > Third time's the charm, I hope... > >  drivers/gpu/drm/radeon/radeon_object.c |    3 ++- >  1 files changed, 2 insertions(+), 1 deletions(-) > > di

Re: [PATCH] drm/radeon/kms: add register definitions for audio

For those that are interested, I pulled together most of my original hdmi code if someone wants to finish it up: http://people.freedesktop.org/~agd5f/0001-WIP-port-of-hdmi-dp-audio-code-to-newer-kernel.patch It needs: - helper functions for calculating the infoframes and checksums - helper function

Re: [PATCH 4/8] drm: add generic ioctls to get/set properties on any object

On Thu, Mar 29, 2012 at 06:27:22PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > Useless for connector properties (since they already have their own > ioctls), but useful when we add properties to CRTCs, planes and other > objects. > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/

[PATCH] drm/radeon/kms: fix up audio interrupt handling

From: Alex Deucher - add support for rs6xx - add support for DCE4/5 - fixup 6xx/7xx Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/evergreen.c | 128 +++ drivers/gpu/drm/radeon/r600.c | 115 ++-- drivers/gpu/drm/radeo

Re: [PATCH] drm/radeon/kms: fix fans after resume

2012/3/30 Michel Dänzer : > On Don, 2012-03-29 at 19:04 -0400, alexdeuc...@gmail.com wrote: >> From: Alex Deucher >> >> On pre-R600 asics, the SpeedFanControl table is not >> executed as part of ASIC_Init as it is on newer asics. >> >> Fixes: >> https://bugzilla.kernel.org/show_bug.cgi?id=29412 >>

Re: [PATCH 3/8] drm: create struct drm_object_properties and use it

On Thu, Mar 29, 2012 at 06:27:21PM -0300, Paulo Zanoni wrote: > diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h > index c3d429a..84880a7 100644 > --- a/include/drm/drm_crtc.h > +++ b/include/drm/drm_crtc.h > @@ -36,6 +36,8 @@ > struct drm_device; > struct drm_mode_set; > struct drm_

Re: [PATCH 0/8 v7] fix gmbus writes and related issues

On Fri, 30 Mar 2012 19:46:35 +0800, Daniel Kurtz wrote: > This patchset addresses a couple of issues with the i915 gmbus > implementation. > > v7 adds a final patch to switch to using DRM_ERROR for reporting timeouts. > > Daniel Kurtz (8): > drm/i915/intel_i2c: handle zero-length writes > dr

[Bug 47955] Celestia hit fallback on r300g from git?

https://bugs.freedesktop.org/show_bug.cgi?id=47955 --- Comment #16 from Marek Olšák 2012-03-30 05:41:30 PDT --- Is this bug present in Mesa 8.0 and if yes, is it present in 7.11 as well? -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this ma

Re: [PATCH RFC 1/2] drm: add bitmask property type

On Fri, Mar 30, 2012 at 5:37 AM, Ville Syrjälä wrote: > On Thu, Mar 29, 2012 at 08:15:48PM -0500, Rob Clark wrote: >> On Thu, Mar 29, 2012 at 8:02 PM, Rob Clark wrote: >> > From: Rob Clark >> > >> > A bitmask property is similar to an enum.  The enum value is a bit >> > position (0-63), and vali

Re: i915_driver_irq_handler: irq 42: nobody cared

On Fri, 30 Mar 2012 14:11:47 +0200, Jiri Slaby wrote: > On 03/30/2012 12:45 PM, Chris Wilson wrote: > > On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby wrote: > >> I don't know what to dump more, because iir is obviously zero too. What > >> other sources of interrupts are on the (G33) chip? > > >

Re: [PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

On Fri, Mar 30, 2012 at 08:07:16PM +0900, 김승우 wrote: > Hi Ville, > > I skipped explanation about NV12M and other two formats because these > formats are already in kernel drm_fourcc.h. > > I think it is better to add a difference between NV12 and NV12M here. > > NV12M has Y plane and CbCr plane

Re: i915_driver_irq_handler: irq 42: nobody cared

On 03/30/2012 12:45 PM, Chris Wilson wrote: > On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby wrote: >> I don't know what to dump more, because iir is obviously zero too. What >> other sources of interrupts are on the (G33) chip? > > IIR is the master interrupt, with chained secondary interrupt st

Re: [PATCH RFC xf86-video-intel 2/2] Add underscan properties

On Thu, Mar 29, 2012 at 11:19:59PM +0100, Chris Wilson wrote: > On Thu, 29 Mar 2012 18:30:20 -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni > > > > In the Kernel side, these are crtc properties (since in the hardware, > > underscan use the panel fitters, which are attached to the pipes). > >

Re: [PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

On 03/30/2012 12:12 PM, Ville Syrjälä wrote: +#define DRM_FORMAT_NV12MT fourcc_code('T', 'M', '1', '2') /* 2x2 subsampled Cr:Cb plane 64x32 macroblocks */ This one is more difficult. Until now tiling was always handled in driver specific manner. OTOH if this format is really supported by d

Re: [PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

Hi Ville, I skipped explanation about NV12M and other two formats because these formats are already in kernel drm_fourcc.h. I think it is better to add a difference between NV12 and NV12M here. NV12M has Y plane and CbCr plane and these are in non contiguous memory region. Compared with NV12, N

Re: [PATCH RFC 1/2] drm: add bitmask property type

On 03/30/2012 12:37 PM, Ville Syrjälä wrote: On Thu, Mar 29, 2012 at 08:15:48PM -0500, Rob Clark wrote: On Thu, Mar 29, 2012 at 8:02 PM, Rob Clark wrote: From: Rob Clark A bitmask property is similar to an enum. The enum value is a bit position (0-63), and valid property values consist of a

[Bug 47955] Celestia hit fallback on r300g from git?

https://bugs.freedesktop.org/show_bug.cgi?id=47955 --- Comment #15 from Andrew Randrianasulu 2012-03-29 20:54:13 PDT --- .. and spriteblast mesa demo surely don't work correctly here. (I see something remotely like _giant_ sprites flashing on screen) -- Configure bugmail: https://bugs.freedesk

Re: i915_driver_irq_handler: irq 42: nobody cared

On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby wrote: > I don't know what to dump more, because iir is obviously zero too. What > other sources of interrupts are on the (G33) chip? IIR is the master interrupt, with chained secondary interrupt statuses. If IIR is 0, the interrupt wasn't raised by

Re: [PATCH RFC 1/2] drm: add bitmask property type

On Thu, Mar 29, 2012 at 08:15:48PM -0500, Rob Clark wrote: > On Thu, Mar 29, 2012 at 8:02 PM, Rob Clark wrote: > > From: Rob Clark > > > > A bitmask property is similar to an enum.  The enum value is a bit > > position (0-63), and valid property values consist of a mask of > > zero or more of (1

Re: [PATCH libdrm] libdrm: update drm/drm_fourcc.h from kernel to add multi plane formats

On Fri, Mar 30, 2012 at 11:54:50AM +0900, Seung-Woo Kim wrote: > Multi buffer plane pixel formats are added as like kernel header. > > Signed-off-by: Seung-Woo Kim > --- > include/drm/drm_fourcc.h |7 +++ > 1 files changed, 7 insertions(+), 0 deletions(-) > > diff --git a/include/drm/dr

Re: i915_driver_irq_handler: irq 42: nobody cared

On 03/27/2012 10:42 AM, Jiri Slaby wrote: > On 03/27/2012 10:40 AM, Jiri Slaby wrote: >> Hi, >> >> I'm getting spurious interrupts leading to disabling the interrupt: >> 42:19168532471662 PCI-MSI-edge i915@pci::00:02.0 >> >> The message: >> irq 42: nobody cared (try booting with

Re: [PATCH] drm/radeon/kms: add register definitions for audio

W dniu 30 marca 2012 11:09 użytkownik Rafał Miłecki napisał: > 2012/3/28  : >> From: Alex Deucher >> >> This adds register definitions for HDMI/DP audio on >> DCE2/3/4/5 hardware. > > OK, AICS we got PLL regs and HDMI blocks regs. May I ask about audio block > regs? > > Did you just missed them

[Bug 42876] System doesn't boot with GTX 550 Ti

https://bugzilla.kernel.org/show_bug.cgi?id=42876 --- Comment #10 from Vlad 2012-03-30 09:10:08 --- Forgot to mention that I'm using nouveau. -- Configure bugmail: https://bugzilla.kernel.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are watching the

Re: [PATCH] drm/radeon/kms: add register definitions for audio

2012/3/28 : > From: Alex Deucher > > This adds register definitions for HDMI/DP audio on > DCE2/3/4/5 hardware. OK, AICS we got PLL regs and HDMI blocks regs. May I ask about audio block regs? Did you just missed them or do they need passing some additional review first? I mean: #define EVERGR

[Bug 42876] System doesn't boot with GTX 550 Ti

https://bugzilla.kernel.org/show_bug.cgi?id=42876 Vlad changed: What|Removed |Added CC||vo...@vovan.nl --- Comment #9 from Vlad 2012

Re: [PATCH RFC 1/2] drm: add bitmask property type

On Thu, 29 Mar 2012 20:02:45 -0500, Rob Clark wrote: > + } else if (property->flags & DRM_MODE_PROP_BITMASK) { > + int i; > + __u64 valid_mask = 0; > + for (i = 0; i < property->num_values; i++) > + valid_mask |= (1 << property->values[i]