Eric Blossom wrote:
On Sun, Feb 01, 2009 at 12:30:58AM -0500, Paul Creekmore wrote:
The FPGA on USRP1 sends an extra two bits of data with each 16-bit word
(to the FX2 chip). If I'm not mistaken, the first bit is set when
accompanying a sample from rx channel 0, and the second bit is set
On Sun, Feb 01, 2009 at 12:30:58AM -0500, Paul Creekmore wrote:
> The FPGA on USRP1 sends an extra two bits of data with each 16-bit word
> (to the FX2 chip). If I'm not mistaken, the first bit is set when
> accompanying a sample from rx channel 0, and the second bit is set when
> accompanyi
The FPGA on USRP1 sends an extra two bits of data with each 16-bit word
(to the FX2 chip). If I'm not mistaken, the first bit is set when
accompanying a sample from rx channel 0, and the second bit is set when
accompanying an inphase (as opposed to quadrature) sample (presumably
from channels
