On Thu, Jul 27, 2006 at 08:35:08PM -0700, Oussama Sekkat wrote:
> Hi
> I am looking at the usrp_std.v module and the schematics for the FPGA and
> the FX2/FPGA interface.
> It seems to me that the data of course arrives as a serial input to the
> FX2
> chip. Then, it gets to the FPGA as a 16bit pa
HiI am looking at the usrp_std.v module and the schematics for the FPGA and the FX2/FPGA interface.It seems to me that the data of course arrives as a serial input to the FX2 chip. Then, it gets to the FPGA as a 16bit parallel input from the GPIF bus. That input is called usb_data in the FPGA. Howe
On Wed, Jul 19, 2006 at 06:50:09PM -0700, Oussama Sekkat wrote:
> Hi Matt,
> I am looking at the USRP FPGA/FX2 interface schematics. I see that there are
> different modules such as U412 and U101. Is there any documentation I could
> read about the role of those modules. I am basically trying to fi
Hi Matt,I am looking at the USRP FPGA/FX2 interface schematics. I see that there are different modules such as U412 and U101. Is there any documentation I could read about the role of those modules. I am basically trying to figure out how the data is sent from the Cypress FX2 to the usrp_std.v modu