Hi
I just wanted clarification on somethings:
1) For creating customs blocks, I wasn't sure on the
compiling process. Once you've generated the three
files needed for your custom block, and placed them in
the correct place, does one simply compile them in
their folder using the ./bootstrap -> ./c
--- Eric Blossom <[EMAIL PROTECTED]> wrote:
> On Sun, Oct 07, 2007 at 04:09:48PM -0700, seph 004
> wrote:
> > I was wondering if someone could perhaps clarify
> how the gr_message_sink works . I'm trying to make
> a modified version of the fft_sink. I noticed that
I was wondering if someone could perhaps clarify how the gr_message_sink works
. I'm trying to make a modified version of the fft_sink. I noticed that the
sample stream is turned into a vector streasm and then sent to a message sink.
When the data is unpacked from the messages, then it se
help you
> get past the stage.
>
> the command is: env LD_LIBRARY_PATH=/directory
>
> where "directory" is where
>
> libgnuradio-core.la is found.
>
> - jeff
>
>
> On 7/30/07, seph 004 <[EMAIL PROTECTED]> wrote:
> >
> >
> > ---
--- Johnathan Corgan <[EMAIL PROTECTED]>
wrote:
> seph 004 wrote:
>
> > I'm using
> >
> > autoconf 2.61
> > automake 1.9.6
> > libtool 1.5.22
> > gcc 4.0.4
>
> Can you post your:
>
> OS and version (uname -a)
&g
I tried installing the new gnu radio 3.04 version
tarball but I can't get past the make stage. I get the
following error:
creating libgnuradio-core-qa.la
/bin/sed: can't read
Software/gnuradio-3.0.4/gnuradio-core/src/lib/libgnuradio-core.la:
No such file or directory
libtool: link:
`Software/gnur
--- Matt Ettus <[EMAIL PROTECTED]> wrote:
> seph 004 wrote:
> > My question is about the correct setup to receive
> > pulses. I've managed to get my system to transmit
> 1
> > second pulses at 16 ms intervals.
> >
> > I wanted to test how the usrp r
My question is about the correct setup to receive
pulses. I've managed to get my system to transmit 1
second pulses at 16 ms intervals.
I wanted to test how the usrp receives these pulses
again by routing the output of the basic TX board, to
the input of the basic RX board. This seems to work
for
> > Or does anybody have a suggestion of an USB-2
> addon card for a notebook (pccard) that works with
> the USRP.
> >
>
> Jim Perkins recently told me the following:
>
> I recently tested an inexpensive Zonet USB 2.0
> add-on card. It has
> the Via VT6212L chipset. The Via based card wor
Matt Ettus <[EMAIL PROTECTED]> wrote: seph 004 wrote:
> This would mean that to obtain a total rate of 32 Msamples/sec to the
> DAC, the data rate of the I and Q channels would have to be 16
> Msamples/sec each, and thus 128 000 samples/sec each into the txchain
> modules
I've managed to store a sample set on the FPGA and transmit it periodically.
The problem I'm experiencing is that the transmitted pulse is shorter than what
I expected.
I worked out that by setting an interp value of 500 from python, that the FPGA
interpolator would basically be set to 125 to g
There were just a couple of things I wasn't sure about:
If the RX chain is disabled inside the FPGA, but a receive application is
still running on the host pc, will samples still arrive on the host pc (like
16 bit zeros)?
If wrreq for the FIFO in the RX buffer module is de-asserted, b
n block to make the
signal, but if it is producing complex output, does that mean I'm actually
sending 5000 samples?
At the moment, sending my 2500 samples produces an output only 1 msec long.
Regards
Lance
- Original Message
From: Eric Blossom <[EMAIL PROTECTED]>
To: seph
- Original Message
From: Eric Blossom <[EMAIL PROTECTED]>
To: David Scaperoth <[EMAIL PROTECTED]>
Cc: seph 004 <[EMAIL PROTECTED]>; discuss-gnuradio@gnu.org
Sent: Thursday, March 1, 2007 11:32:45 PM
Subject: Re: [Discuss-gnuradio] The shortest pulse length
On Thu, Mar 01
7;m pretty sure (0, 0) is TXA, and (1, 0) is TXB. My
waveform does appear at the TXB output when I run the script. The problem is
the pulse duration I'm seeing is much shorter (about 1/10) than what I expect.
Regards
Lance
- Original Message
From: David Scaperoth <[EMAIL
)
u.set_tx_freq (1, duc1)
fg.connect (vsource, fmmod, amp, u)
return fg
I modified a version of siggen_min2.py into the above.
Regards
Lance
- Original Message
From: David Scaperoth <[EMAIL PROTECTED]>
To: seph 004 <[EMAIL PROTECTED]>
Cc: Lee Patton <[EMAIL PROTE
d the
TX db output and RX db input, and used the gr.oscope block to view your
signals?
Regards
Lance
- Original Message
From: Lee Patton <[EMAIL PROTECTED]>
To: seph 004 <[EMAIL PROTECTED]>
Cc: discuss-gnuradio@gnu.org
Sent: Tuesday, February 27, 2007 12:58:31 AM
Subject:
to take note of?
Regards
Lance
- Original Message
From: Lee Patton <[EMAIL PROTECTED]>
To: seph 004 <[EMAIL PROTECTED]>
Cc: discuss-gnuradio@gnu.org
Sent: Friday, February 23, 2007 6:07:45 PM
Subject: Re: [Discuss-gnuradio] The shortest pulse length
The shortest pulse duratio
Hi
Does anyone know what the shortest duration pulse is which the USRP can
transmit? I've tried to test it by using gr.head to limit the number of samples
to produce a short waveform, but I can't catch anything appearing at the
output. Is there a simple test I could do to check?
Regards
Lance
Hi
It seems the more I read through the fpga code, the more confused I get. There
are a few things I'm unsure about:
In the fpga DDC, are I and Q samples being generated from complex samples? The
adc_interface module just seems to multiplex the same complex sample on to 2
lines. It would seem
I was just wondering if anyone tried to create a vector waveform file (.vwf) to
simulate the usrp FPGA in quartus. At first glance it seemed to me that there
would be too many signaIs to reproduce, but is it possible/viable?
Regards
Lance
___
Dis
Message: 4
Date: Mon, 20 Nov 2006 08:15:50 -0800
From: Eric Blossom <[EMAIL PROTECTED]>
Subject: Re: [Discuss-gnuradio] Re: Help with Verilog: write_count
To: seph 004 <[EMAIL PROTECTED]>
Cc: discuss-gnuradio@gnu.org
Message-ID: <[EMAIL PROTECTED]>
Content-Type: text/plain
Message: 1
Date: Fri, 17 Nov 2006 09:14:28 -0800
From: Eric Blossom
Subject: Re: [Discuss-gnuradio] Re: Help with verilog: write_count
To: seph 004
Cc: discuss-gnuradio@gnu.org
Message-ID: <[EMAIL PROTECTED]>
Content-Type: text/plain; charset=us-ascii
On Fri, Nov 17, 2006 at 01:02:31AM
--
Message: 3
Date: Thu, 16 Nov 2006 12:44:48 -0800
From: Eric Blossom <[EMAIL PROTECTED]>
Subject: Re: [Discuss-gnuradio] Help with Verilog: write_count[8]
To: seph 004 <[EMAIL PROTECTED]>
Cc: discuss-gnuradio@gnu.org
Message-ID: <[EMAIL PROTECTED
Hi
I'm still trying to figure out the problem in my code. I think that along the
way I misunderstood the purpose of the write_count register. How does it
actually work? WR triggers every time a 16 bit packet is ready from the FX2
doesn't it?
The wreq trigger of the FIFO is triggered by (WR & ~
Message: 2Date: Fri, 10 Nov 2006 08:03:11 -0800From: Eric Blossom <[EMAIL PROTECTED]>Subject: Re: [Discuss-gnuradio] Re: Help with VerilogTo: seph 004 <[EMAIL PROTECTED]>Cc: discuss-gnuradio@gnu.orgMessage-ID: <[EMAIL PROTECTED]>Content-Type: text/plain; charset=us-asciiOn Fri,
From: "Oussama Sekkat" <[EMAIL PROTECTED]>Subject: Re: [Discuss-gnuradio] Help with VerilogTo: "seph 004" <[EMAIL PROTECTED]>Cc: discuss-gnuradio@gnu.orgMessage-ID:<[EMAIL PROTECTED]>Content-Type: text/plain; charset="iso-8859-1"Hi Lance,On 1
HiI've been bashing my head against this problem for a few weeks now, but I can't seem to figure it out. I've been making a few modifications to the verilog code, in particular the tx_buffer.v module. What I want to do is send a signal from the pc and trap it in the fpga. I've tried doing this by r
HiI am having some trouble trying to get register writing and reading from the C++ level to work. I've created two methods:for writingstatic boolwrite_a_reg (usrp_basic *u, int address, int amount){ bool isit = u->_write_fpga_reg (address, amount); return isit;}for reading intread_a_reg (usrp_ba
HiI was doing some tinkering with the Verilog code, especially in the tx_buffer module. I'm experimenting with trying to replace the FIFO in the tx_buffer module with a quartus generated altsyncram module. I want to see if I can trap the incoming signal and control when it's released. I tried the f
HiI am having a bit of trouble trying to work out how to write to FPGA registers from a c++ program. I found two methods that would do it, namely '_write_fpga_reg' in 'usrp_basic' and 'usrp_write_fpga reg' in 'usrp_prims'. I tried to use the usrp_prims method, but it requires a handle on the usb wh
Hi
I am having trouble with transmiting from a Basic TX daughterboard
(it's the only one I have for the time being). I've tried connecting an
oscilloscope to the output while running siggen.py, but there is no
signal coming out. Also, I notice a continuous stream of 'usrp
underrun' messages. Has a
HiI recently finished a modified FPGA build and I wanted to compile a C++ program to test it. The program is based on the test_usrp_standard_tx program. I wanted to know how I would go about compiling the program so that all the proper header files are correctly included.Sorry if this is a silly qu
HiI just wanted to confirm something. If the cordic in tx_chain is disabled, how is tuning to the IF frequency acheived? Is it done with only the cordic on the DAC?RegardsLance
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D
HiI just had a few questions regarding the frequency modulatig block. The current input sample is used in conjuction with the sensitivity parameter to determine the new phase value. Is this correct? I'm just a bit confused as to how the phase calculations and the sensitivity parameter relate to the
HiDuring my installation of gnuradio-core, make check keeps failing with this error:ake[3]: Entering directory `/home/lance/gr-build/gnuradio-core/src/tests'.Testing gr_vmcircbuf_createfilemapping_factory...gr_vmcircbuf_createfilemapping: createfilemapping is not available... gr_vmcircbuf_creat
Hi Still bungling through setting up gnuradio, I've run into another problem. One of the online tuts mentioned that to test if gr-wxgui was working, you could try running the slider.py demo. Unfortunately, this doesn't work, and it stops with the following error: Traceback (most recent call last)
Hi I am experiencing some trouble trouble checking out the gnuradio stuff. So far gnuradio-core, gr-usrp, gr-wxgui, gr-audio-portaudio, gr-audio-jack, gr-howto-write-a-block have successfully checked out. However the process breaks down with the following message: svn: PROPFIND request failed on
Hi At the moment I would like to see if I can generate a chirp signal. Looking through what gnuradio blocks are available, I assumed I could use the gr_fxpt_nco block to do something like this. I was wondering firstly if it would be possible, and secondly, how this block works and behaves when it'
Hi My earlier usb problem seems to be related to the cable I was using. I tried my home printer's cable and it began to work. I could load the firmware and the standard tx and rx programs worked perfectly. I tried out the usrp_fft.py script. It worked initially and then I got a stream of usb proto
Hi My earlier usb problem seems to be related to the cable I was using. I tried my home printer's cable and it began to work. I could load the firmware and the standard tx and rx programs worked perfectly. I tried out the usrp_fft.py script. It worked initially and then I got a stream of usb proto
Hi Thanks Patrick, your suggestion worked. Everything seems ok now. Regards Lance __Do You Yahoo!?Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com ___
Discuss-gnuradio
Hi I'm trying to reinstall the gnuradio files from cvs. I get all the files and start the ./bootstrap then ./configure procedure. When it comes to executing 'make' however, it keeps breaking down with the following error: make[4]: Entering directory `/home/lance/gr-build/gnuradio-core/src/lib/swi
Hi A strange thing happened when I tried to connect to the USRP again. This time dmesg shows that the device connected. When I try to load the firmware though, I get the following: usrper: found unconfigured usrp; needs firmware. write_internal_ram failed: error sending control message: Protocol
Hi I am struggling at the moment to get the USB to my USRP board working again. When I try to run any programs, it returns with usrp: failed to find usrp[0] My dmesg output looks like this when I connect my USRP: usb 3-2: new high speed USB device using ehci_hcd and address 6 usb 3-2: unable to
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