How does one determine the initial phase for the cordic unit (cordic.v)?
and is there a dpll implemented for the usrp_standard build? (If there is, I
can't find it)
Thanks a lot.
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thanks, that really clarifies a lot of things for me. I'm slowly beginning
to understand the inner workings of the FPGA. Thanks again.
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Hello GNURadio community,
I'm really interested in the GNURadio project and I want to have a better
understanding of the FPGA code (usrp_std.v etc...). I've been trying to
learn it on my own but some parts are hard to understand when all you have
is the source code. So here I am and here are my qu