I've been using many USRP2s for my project. Today one of the USRP2s cannot be
recognized through Ethernet.
Only the green LED on the Ethernet port lights up.
I hooked up the Serial debug port and it says,
ethernet flow control: SYMMETRIC
LANSR:
LINK_GOOD
ethernet flow control: SYMMETRIC
Hi all,
I'm working on implementation of MIMO system based on USRP2+UHD.
I used MIMO method #3, which uses 10Mhz and 1PPS external reference clock.
Also multiple USRP2s are connected to one PC though multiple Gbit Ethernet
connections.
I used multiple uhd_single_usrp_source and uhd_single_usrp_
Hi all,
I've used USRP1 and GR 3.1.3 since 2007. Now I try to move to USRP2 and GR
3.3 version.
The most important reason is that I hope to have more bandwidth and to
access timestamp information of sampled data.
The thing is that GR and USRP2 architecture looks evolved so much since two
years a
ng to the 'rx_gain'
value?
Thanks in advance again.
Matt Ettus wrote:
>
> On 01/23/2010 09:48 AM, Yong J. Chang wrote:
>>
>> All,
>>
>> I'm trying to set all USRP and RFX2400 parameters comparable with Micaz
>> in
>> the context of receiver
All,
I'm trying to set all USRP and RFX2400 parameters comparable with Micaz in
the context of receiver sensitivity. But I've observed a non-linear behavior
of ADC.
By using usrp_fft.py, we can see noise floor level. When I change a rx-gain
in a range of 0~45dB, noise floor level does not change
Hi folks!
I have a question about setting up USRP. Is it possible to for two RF front
ends (one at 900 MHz and one at 2.4GHz, for example) to be connected to one
USRP?
Thanks in advance!
--
View this message in context:
http://www.nabble.com/Two-different-D%27board-on-one-USRP-tp24291659p24291
Hi all,
Now I'm having interesting observation. I have three USRP and RFX2400 and
I'm testing broadcast ( 1 transmitter and 2 receivers). I hooked the
oscilloscope probes up right after AD8347-out (pin 4,3) in RFX2400 board.
Although the two receivers are located very closely, there is a relati
Thank you Eric,
But I still have a problem. I simply made two blocks.
1) First One
gr_data_parser::gr_data_parser ()
: gr_block ("gr_data_parser",
gr_make_io_signature (1, 1, sizeof (gr_complex)),
gr_make_io_signature (1, 2, sizeof (gr_complex)))
2) Seco
Hi all,
Now I'm building some signaling blocks having dual output streams.
But if I try to make dual output streams which have different data type from
input stream, 'Segmentation fault' error is occurred. How can I make dual
outputs which have different data type from input stream?
Thanks in ad
Hi all,
Now I'm working on measuring Round Trip Time (
FPGA(RXFIFO)->USB->PC->USB->FPGA(TXFIFO) ).
Since I'm using 128kbps bitrate and 10 samples per symbol, sample rate is
1.28Msps.
And I do not give any options about FUSB_BLOCK_SIZE and FUSB_NBLOCKS. So
they might be 0.
In this case, the resu
Hi all,
Since I'm not familiar with USB architecture, it might seem like stupid
question.
Now I'm receiving some data(called RxData) from USRP and obviously USRP is
set as a receiver mode. At the same time, I have a data to be
transmitted(called TxData) which is not related with received data. Th
Hi all,
I'm studying on GNURadio and USRP with RFX2400. So far I was successfully
able to make new signal blocks (e.g noncoherent FSK demodulator) with using
benchmark_rx.py and benchmark_tx.py and it works fine.
Now I'm interested in inband signaling. I want to know exact time of arrival
of rec
Thanks Don for previous question!
I successfully configured and compiled GNURadio trunk on Cygwin and tried to
run example.
But I'm getting following error:
Traceback (most recent call last):
File "./benchmark_tx.py", line 23, in
from gnuradio import gr, gru, modulation_utils
File "/us
Hi all,
I'm trying to use GNU radio on Cygwin environment. It has taken couple of
days to compile depedent stuffs. I'm on my almost final stage. I have
following error messages when I compile 'gnuradio-core'.
*** Warning: This system can not link to static lib archive
/usr/local/lib/libgsl.la.
*
Hi all,
Now I'm working on OOK modulation/demodulation with RFX2400 d'board.
I modified dbpsk.py and psk.py in order to get [1+0*j , 0+0*j] baseband
signal and verified this signal is sending to USRP board. Since I'm using tx
amplitude=14000, the range is [+14000,0] in real axis.
But, I read th
Hi all,
Now I'm confusing intermediate frequency of RFX2400. I cannot find any
references about that.
As I know so far, RFX2400 converts carrier frequency(we selected it on
python script) band freq to 10Mhz intermediate freq. This 10Mhz signal is
passed to FPGA. Therefore, DDC frequency is fixed
Thanks all!
As I know so far, RFX2400 doesn't have amplifier we can control. So
set_gain() doesn't affect any transmit power. Right?
Now I'm trying to control PGA gain on FPGA side, but I confused. AD9862 has
pga which can be controled in range [0 ~ -20dB].
self.u.set_pga(0,-20)
pga_gain = self
Hi, all!
Now I'm using USRP1 and RFX2400 d'board. In our project, we have to be able
to reduce transmit power down to -40dBm. Please correct me if my approach is
wrong.
If we set tx_pga=0dB, the transmit power only depends on the level of
signal. So, +/-32767 can give us maximum transmit power 1
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