Has anyone else noticed that when using the u2_rev3_alias fpga code, the
spectrum is inverted?
The zeroing out of the coeffs in the hb_dec.v and small_hb_dev.v files, is
causing either the I&Q samples to be swapped due to a misalignment, or is
causing the conjugate to occur.
The standard fpga load
Hi Matteo,
It sounds like you are using one of the BLOCK I/O xilinx FFT cores. As you
said, the core loads the
input i & q values, performs computation, then outputs the i & q FFT
results. And yes, during the load
and computation latency periods, there will be the lack of useable output
samples
I downloaded the ise12 branch of the fpga code. Compiled it using the
makefile, and ISE12.2 gui tool. Both did not work in the usrp2, giving the
same results...what a shame.
SteveChrepta wrote:
>
> I am preparing to make small changes to the fpga code. First I wanted to
> compile t
