On Mon, 18 May 2009 19:26:58 -0400, Marcus D. Leech
wrote:
Matt Ettus wrote:
Paul Mathews wrote:
Paul,
Thanks for your analysis of the situation. C73 and C74 are not
actually capacitors, they are, as you say, electrostatic discharge
protectors, part number PESD0402-060. I have not seen any
On Sat, 09 May 2009 18:01:12 -0400, Dominik Auras
wrote:
Hi!
Well, as I promised, I am going to share my results with the community.
So here it is:
http://www.dominikauras.de/gnuradio/usrp_fx2.html
Condensed into a patch file. I have uploaded a few bitstreams and a
binary of the fir
On Sun, 22 Mar 2009 14:51:55 -0400, William Harding
wrote:
When I try to make the howto package (from the "How to write a signal
processing block" tutorial), I get and error which says:
Version mismatch error. This is libtool 2.2.6, but the definition of
this
LT_INIT comes from libtool 2
In DSP based radar related systems I've worked on, gating typically
occurs as close as possible to the data acq side,
rather than close to the CPU or intermediate data transfer circuitry.
Can't you zero ADC input inside the FPGA on the
alignment that you need and basically let the system "push
I have been working on modifications to the USRP board so that I can pass
a gating signal through the basic RX daughterboard to gate signal
collection for a pulsed radar application. This is somewhat working, but I
am having problems with data alignment when stopping and starting the
system
Hans Glitsch wrote:
Hello,
I currently have four complex input signals coming in through
USB and I have a 1pps timing pulse coming from a gps source that I
need to synchronize the 64MHz clock to and also pass on to the PC so
that I know exactly which sample it occurred
Marcus Leech wrote:
Robert McGwier wrote:
The wideband engine, Mercury:
http://hpsdr.org/wiki/index.php?title=MERCURY
is almost ready to release and its accompanying transmitter Penelope
will follow shortly. BOTH of these boards will have ANOTHER Cyclone
II on them with almost 100% of the
The ADCs I've been looking at can apparently somehow sample
frequencies above their sampling rate aswell. I'm not really sure how
this works, but I don't think it's an issue I must bother with right
now. Added value for later, I think. Right now I'm only interested in
shortwave transmissions, bu
Vincenzo Pellegrini wrote:
Hi everybody,
just a quick question: has anybody managed so far to provide the usrp
with the 8 Complex Msps needed to transmit an 8 MHz wide band?
My problem is that such a bandwidth yields a 32MiBps throughput and,
even if the USB2 bus and the CPU speed of my machine
This is good news. I was wondering when something like this would happen.
Thanks again,
Ryan
Kyle wrote:
For any Gentoo users out there I've created a couple of ebuilds to
install GNU Radio and, more importantly, its dependencies.
The 3.0.2 tarball based ebuild has been submitted to the Gentoo
Philip Covington wrote:
Highlights:
16 bit 130 MSPS ADC
HPF, LPF, RF AMP Switchable Front End
0-31.5 dB Attenuator in 0.5 dB steps
Cyclone II FPGA
Two AD6620 DDC co-processors
USB 2.0 480 Mbps High Speed Interface to PC
0.1 to 33 MHz coverage (0.1 to 65 MHz extended)
RX bandwidths from 33 MHz to
I am working on the plotting widgets every chance I get. At the moment
this is not at the top of my list but I am making progress. I have run
into one problem with wxWidgets that someone might be able to answer:
Using the DrawRotatedText function from the wxDC class seems to produce
a clipped,
For what it's worth, matplotlib http://matplotlib.sourceforge.net/
produces beautiful contour plots. It is python based and easy to use.
--Ryan
L. Miguel Bazdresch Sierra wrote:
Marcus Leech, el 11/29/06 22:12:
I have some X,Y,Z data that I want to turn into a gray or colour
mapped contour
I have been working on a wxWidget based oscilloscope/spectrum widget and
have a few questions:
First, let me cover my idea of an oscilloscope/FFT program:
1. Data is provided from a source (USRP or file).
2. Data is formatted to fit the plotting window (transform matrix).
3. Data is sent to the
I am using an external clock, currently at 64 MHz, but will drop to 50
MHz so I can place a 30MHz IF signal in the right spot for
down-conversion. Here is my question:
The file usrp_basic.h has the following member:
long fpga_master_clock_freq () const {
return 6400; }
If I want my sys
Eric Blossom wrote:
On Fri, Nov 17, 2006 at 11:15:22AM -0500, Don Ward wrote:
I haven't been playing with the fft scope for a while until yesterday,
when I realized that it frequently hangs on my fc5 with two weeks ago
trunk gnuradio... The scope freezes (in all modes) and it needs to be
ki
Don Ward wrote:
I haven't been playing with the fft scope for a while until
yesterday, when I realized that it frequently hangs on my fc5 with
two weeks ago trunk gnuradio... The scope freezes (in all modes) and
it needs to be killed to get the control back. No underruns or any
messgae that co
rom a frequency synthesizer so I think I was unconsciously making
assumptions (bad news).
Thanks for the reply,
--Ryan
Matt Ettus wrote:
Ryan,
I am looking into this problem. I will let you know if I find anything.
You are using a 3.3V clock signal, right?
Matt
Ryan Seal wrote:
Wh
Lin Ji wrote:
Hi,
There is one thing that I can not figure out:
The ADC on the USRP has a sampling rate at 64Msps, that is, for a
data at 1Mbps, for every incoming bit there will be 64 samples.
Suppose every sample is 16bits, the bit rate is 1024Mbps,that is a
huge amount of data flow. Now
You don't use fast convolution when using an FPGA. Do this in the time
domain. That's the purpose of using hardware over software. Expand your
algorithm for complex cross correlation and you will end up with a
string of simple algebraic terms. You will have to look at your losses
using fixed
When running both usrp_oscope and usrp_fft, I lose the signal and the
GUI becomes unresponsive after 5 - 30 minutes of operation. I had
previously ran this system for more than 24 hours with an installation
on a laptop back in July. Here is a short summary of my setup:
1. Dual HT Intel 64-bit
When running both usrp_oscope and usrp_fft, I lose the
signal and the GUI becomes unresponsive after 5 - 30 minutes of
operation. I had previously ran this system for more than 24 hours with
an installation on a laptop back in July. Here is a short summary of my
setup:
1. Dual HT Intel 64-bit
22 matches
Mail list logo
