Hi all,
I used the usrp1 for implementing a UHF gen2 reader(not the entire
functionality though). I have used a single board at the same frequency without
any problem. RFX900 has 2 antenna ports TX/RX and rx2 so tx and rx antennas can
be connected simultaneously.
However I found a major problem
I am trying to transmit an ASK packet from the usrp fpga(verilog) without
using usb data. I cant figure out where should I put the I-q data in
verilog.
does anyone know what clock(rate) is used to transfer it to ad9862? I
observed that the tx_sync signal decides whether data on tx_a[13..0] is
I tried to use the usrp for implementing rfid protocols, however the USB
latency is causing a bottleneck and I cannot generate and send the reply
packet before the timeout(I need to send the reply within 80-120 us).
upon reading Thomas Schimd's
paper(http://nesl.ee.ucla.edu/document/show/242), i
I am trying to modify the fpga verilog code for usrp1. I have installed
Quartus-II on windows. does anyone know how to build the code? is there a
project file?
I need a single Tx and Rx channel(both I-Q). can I modify the verilog code
along the lines of inband1rxhb_1tx.rbf ?
This would free u