Where I could find the explanation of the various modules of the FPGA,
especially the module dsp_rx_old?
Thx
Gabriel
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What the module cordic_z24 in the fpga should do with the data?
Thank you
Gabriel
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Do you have a 1000Mb/s port on your pc. USRP2 works only with a 1000Mb/s.
- Original Message -
From: Tommaso P
To: discuss-gnuradio@gnu.org
Sent: Friday, March 11, 2011 6:30 AM
Subject: [Discuss-gnuradio] USRP2: Ethernet port doesn't work
Hi, i'm trying to connect the USRP
- Original Message -
From: Eduardo Lloret Fuentes
To: discuss-gnuradio
Sent: Monday, February 28, 2011 10:10 AM
Subject: Re: [Discuss-gnuradio] Doubt about FPGA code and firmware
Hello,
Sorry for answering so late.
@Gabriel Morel
For my Master Thesis I had to implement a
Hi, I finally managed to run ISE 10.1 on Linux to compile the raw internet
version of the fpga project,
but when I call 'make bin', the following error appears:
ERROR:HDLCompilers:87 - "../../../fifo/fifo_2clock.v" line 26 Could not find
module/primitive 'fifo_xlnx_2Kx36_2clk'
I checked in th
enFAQ section:
http://gnuradio.org/redmine/wiki/gnuradio/USRP2GenFAQ#How-does-the-USRP2-boot-How-is-the-FPGA-firmware-loaded
If I don't have a processor, the second step is not necessary but I don't
know if the first (loading of FPGA design) is accomplished properly. What do
you think?
Will you start from a new project or just modify the old one. I try to compile
the raw ethernet version but I have many problem. Give some news of your works
plz.
Gabriel
- Original Message -
From: Eduardo Lloret Fuentes
To: discuss-gnuradio
Sent: Wednesday, February 09, 201
Hi, I try to run USRP2 with my own binary file, and some lights would mean crc
error. When I turn on the USRP2, the F light is on and would mean
PROGRAM_DONE, but the led D202 on the board is also high but not suppose to.
This light means the INIT_B pin of the FPGA is low, and the datasheet of
Hi, I need some help for ram_loader.v. I have a bug with start-up of the usrp2
and I think that ram_loader module may be the problem. Some process in that
file aren't clocked. Can somebody knowing verilog language help me. I know
some, bug i'm not a expert, can a state machine run without cl
Hi everyone,
I thought I had a problem with my FPGA image, but the led F
means that the FPGA is well programed. The led E would mean that the FPGA have
load the firmware. I compiled the raw internet version of the FPGA with ISE
10.1 and i tried it with Raw Ethernet firmware
I'm looking for details about the initialization process of the FPGA as the
order of lightsand their meanings. I studied the verilog files and significance
of signal configurations.
I think the CPLD program the FPGA and the FPGA turns on a light, the
configuration signal DONE at the end of th
Do you know how can I send a email with pictures. I just tried to send one and
he was fired.
Gabriel
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- Original Message -
From: "Patrick Strasser"
To:
Sent: Monday, January 17, 2011 2:34 PM
Subject: [Discuss-gnuradio] Re: Finally compiled USRP2 code works
finewithUDPimage ...but not with compiled Raw Ethernet Image
schrieb Gabriel Morel am 2011-01-17 19:27:
I had try
I had try 'make' in commad prompt of windows but 'command not found', i had
try it in cygwin but problem with ise_helper.tcl. I'm trying with gnumake
but I don't understand how to work with it for the moment. I know you don't
have to teach me how to use somethings like this, but do you have an
- Original Message -
From: "Josh Blum"
To:
Sent: Thursday, January 13, 2011 2:00 PM
Subject: Re: [Discuss-gnuradio] Finally compiled USRP2 code works fine
withUDPimage ...but not with compiled Raw Ethernet Image
I tried it with cygwin but it didn't find ise_helper.tcl. I don't
If you don't trust me, try it. Use Xilinx on Windows, create a project
and put in all file of all different makefile in the repo for USRP2 with
u2_rev3.v in top. Implement top module and create the bin file. After,
give me some news plz. It's not loosing time, nobody had answer to my
question an
- Original Message -
From: "Matt Ettus"
To: "Gabriel Morel"
Cc:
Sent: Wednesday, January 12, 2011 2:43 PM
Subject: Re: [Discuss-gnuradio] Finally compiled USRP2 code works fine with
UDPimage ...but not with compiled Raw Ethernet Image
Matt: If the raw
- Original Message -
From: "Matt Ettus"
To: "anirudh2059."
Cc:
Sent: Wednesday, January 12, 2011 2:10 PM
Subject: Re: [Discuss-gnuradio] Finally compiled USRP2 code works fine with
UDPimage ...but not with compiled Raw Ethernet Image
On 01/12/2011 05:13 AM, anirudh2059. wrote:
H
will need to use the ise12 branch of the repo with ise12
(no exceptions).
-Josh
On 01/05/2011 12:13 PM, Gabriel Morel wrote:
I'm using ISE 12.1 on windows, not on linux, is it different? I think
is different for the method of calling command, not on the result. The
bin file is suppose to b
ns).
If you want to build the FPGA image for USRP2 over ipv4/udp (UHD
driver), you will need to use the ise12 branch of the repo with ise12
(no exceptions).
-Josh
On 01/05/2011 12:13 PM, Gabriel Morel wrote:
I'm using ISE 12.1 on windows, not on linux, is it different? I think
is different
I'm using ISE 12.1 on windows, not on linux, is it different? I think is
different for the method of calling command, not on the result. The bin
file is suppose to be the same on linux or on windows, no?
Gab
- Original Message -
From: "Nick Foster"
To: "Gabri
- Original Message -
From: "Matthias Wilhelm"
To: "Gabriel Morel"
Cc:
Sent: Wednesday, January 05, 2011 4:41 AM
Subject: Re: [Discuss-gnuradio] Need help in emergency for the fpga image
Hello Gabriel,
there are many possible reasons why it wouldn't work,
- Original Message -
From: "Nick Foster"
To: "Gabriel Morel"
Sent: Tuesday, January 04, 2011 1:48 PM
Subject: Re: [Discuss-gnuradio] Need help in emergency for the fpga image
I asked you a bunch of questions you didn't answer the last time you
posted. I
Hello everyone, I must find a way to compile the FPGA project for the USRP2 to
continue my Masters. I use ISE 12.1
and the top project u2_rev3 in the repository
git://ettus.sourcerepo.com/ettus/fpga.git using all the files in different
makefile.
The compilation works well and I get the bin file
Where is the ISE 12 branch? Because when you download the repository, they
don't have ISE 12 folder. The top file is in fpga/usrp2/top/u2_rev3 path.
How to know is it ok for ISE 12? Which verilog file is only for ISE 12.
Verilog is verilog, it suppose to be ok for all version of ISE, no?
Ga
For the moment i have the same problem. I tried ISE 10.1 and 12.1 and
nothing works fine. It have a bug with the sd card too i think. Some mail
talk about that, but i don't try at this time.
Gab
- Original Message -
From: "anirudh2059."
To:
Sent: Thursday, December 23, 2010 1:53
Which version of ISE do you use? What is the size of the bin file that you
create?
- Original Message -
From: "anirudh2059."
To:
Sent: Tuesday, December 21, 2010 5:52 AM
Subject: [Discuss-gnuradio] usrp2 not found (F LED light is glowing and D
LED light is not glowing)
Hi,
Wh
The input of the adc is between 0 and Vref (i don't know this value). The gain
and the offset are to place the input value between V- and V+ (this values are
chosen by you). The decimation step down the sampling frequency. I know the
operation of the verilog block, but i don't know how to pro
io] Diff between raw and udp
On 12/17/2010 02:21 PM, Gabriel Morel wrote:
So if i have to validate a block on Matlab, i have to use the udp, is it
that?. But if i don't need this option, is it better to use the raw
internet or they don't have any difference between both?
Validat
2010 02:21 PM, Gabriel Morel wrote:
So if i have to validate a block on Matlab, i have to use the udp, is it
that?. But if i don't need this option, is it better to use the raw
internet or they don't have any difference between both?
Validate a block what?
See the notes at the t
on
getting USRP2 to talk over UDP has continued on in the UHD driver
project for USRP hardware.
-Josh
On 12/17/2010 11:00 AM, Gabriel Morel wrote:
Hi everybody, someone can tell me the major difference between the raw
ethernet version and the udp versio
Hi everybody, someone can tell me the major difference between the raw ethernet
version and the udp version for the fpga image?
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Hi everyone, im a student from the ETS of Montreal, so excuse my english plz.
I have to recompile the USRP2 fpga project because i will use the mictor conn
to talk with another fpga. First, I tried to compile the original project, the
one in the directory git://ettus.sourcerepo.com/ettus/fpga.
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